From be6f5563b4526b7c949beb8400a66a2fc810341c Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Fri, 17 May 2019 12:33:45 +0800 Subject: [PATCH] esp32: Add reset uart Fixed the case when the first part of log was missed this was happened when: * CONFIG_CONSOLE_UART_CUSTOM option is selected (UART1) * The selected CONSOLE_UART port is used also for the console component * in code esp_restart() or abort() functions were called. --- components/bootloader_support/src/bootloader_init.c | 4 ++++ components/esp32/system_api.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/components/bootloader_support/src/bootloader_init.c b/components/bootloader_support/src/bootloader_init.c index 0ab8145166..9e6aa9e46b 100644 --- a/components/bootloader_support/src/bootloader_init.c +++ b/components/bootloader_support/src/bootloader_init.c @@ -441,6 +441,7 @@ static void uart_console_configure(void) // (arrays should be optimized away by the compiler) const uint32_t tx_idx_list[3] = { U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX }; const uint32_t rx_idx_list[3] = { U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX }; + const uint32_t uart_reset[3] = { DPORT_UART_RST, DPORT_UART1_RST, DPORT_UART2_RST }; const uint32_t tx_idx = tx_idx_list[uart_num]; const uint32_t rx_idx = rx_idx_list[uart_num]; @@ -449,6 +450,9 @@ static void uart_console_configure(void) gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0); gpio_matrix_in(uart_rx_gpio, rx_idx, 0); + + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]); } #endif // CONFIG_CONSOLE_UART_CUSTOM diff --git a/components/esp32/system_api.c b/components/esp32/system_api.c index 7edb8a6997..ce52e96fe2 100644 --- a/components/esp32/system_api.c +++ b/components/esp32/system_api.c @@ -317,7 +317,7 @@ void IRAM_ATTR esp_restart_noos() // Reset timer/spi/uart DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, - DPORT_TIMERS_RST | DPORT_SPI01_RST | DPORT_UART_RST); + DPORT_TIMERS_RST | DPORT_SPI01_RST | DPORT_UART_RST | DPORT_UART1_RST | DPORT_UART2_RST); DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0); // Set CPU back to XTAL source, no PLL, same as hard reset