kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/esp32s3_rom_has_ets_printf_issue_v5.0' into 'release/v5.0'
esp_rom: fix esp32s3 rom ets_printf bug (backport to v5.0) See merge request espressif/esp-idf!20798pull/10970/head
commit
bdf2153a88
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@ -47,12 +47,7 @@ void bootloader_console_init(void)
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{
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const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
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#if !ESP_ROM_SUPPORT_MULTIPLE_UART
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/* esp_rom_install_channel_put is not available unless multiple UARTs are supported */
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esp_rom_install_uart_printf();
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#else
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esp_rom_install_channel_putc(1, esp_rom_uart_putc);
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#endif
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// Wait for UART FIFO to be empty.
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esp_rom_uart_tx_wait_idle(0);
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@ -61,10 +56,10 @@ void bootloader_console_init(void)
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// Some constants to make the following code less upper-case
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const int uart_tx_gpio = CONFIG_ESP_CONSOLE_UART_TX_GPIO;
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const int uart_rx_gpio = CONFIG_ESP_CONSOLE_UART_RX_GPIO;
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// Switch to the new UART (this just changes UART number used for esp_rom_printf in ROM code).
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#if ESP_ROM_SUPPORT_MULTIPLE_UART
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esp_rom_uart_set_as_console(uart_num);
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#endif
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// If console is attached to UART1 or if non-default pins are used,
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// need to reconfigure pins using GPIO matrix
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if (uart_num != 0 ||
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@ -15,10 +15,6 @@ config ESP_ROM_HAS_JPEG_DECODE
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bool
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default y
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config ESP_ROM_SUPPORT_MULTIPLE_UART
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bool
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default y
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config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
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bool
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default y
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@ -9,5 +9,4 @@
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#define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian
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#define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian
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#define ESP_ROM_HAS_JPEG_DECODE (1) // ROM has JPEG decode library
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#define ESP_ROM_SUPPORT_MULTIPLE_UART (1) // ROM has multiple UARTs available for logging
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#define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing
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@ -28,6 +28,7 @@ PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
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PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
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PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
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PROVIDE ( esp_rom_uart_rx_string = UartRxString );
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PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
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PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
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PROVIDE ( esp_rom_mbedtls_md5_starts_ret = mbedtls_md5_starts_ret );
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@ -30,6 +30,7 @@ PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
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PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
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PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
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PROVIDE ( esp_rom_uart_rx_string = UartRxString );
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PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
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PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
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@ -30,6 +30,7 @@ PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
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PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
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PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
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PROVIDE ( esp_rom_uart_rx_string = UartRxString );
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PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
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PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
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@ -7,10 +7,6 @@ config ESP_ROM_HAS_CRC_LE
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bool
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default y
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config ESP_ROM_SUPPORT_MULTIPLE_UART
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bool
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default y
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config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
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bool
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default y
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@ -7,5 +7,4 @@
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#pragma once
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#define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian
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#define ESP_ROM_SUPPORT_MULTIPLE_UART (1) // ROM has multiple UARTs available for logging
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#define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing
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@ -15,10 +15,6 @@ config ESP_ROM_HAS_JPEG_DECODE
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bool
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default y
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config ESP_ROM_SUPPORT_MULTIPLE_UART
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bool
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default y
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config ESP_ROM_UART_CLK_IS_XTAL
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bool
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default y
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@ -46,3 +42,7 @@ config ESP_ROM_HAS_HAL_WDT
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config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
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bool
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default y
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config ESP_ROM_HAS_ETS_PRINTF_BUG
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bool
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default y
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@ -9,7 +9,6 @@
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#define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian
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#define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian
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#define ESP_ROM_HAS_JPEG_DECODE (1) // ROM has JPEG decode library
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#define ESP_ROM_SUPPORT_MULTIPLE_UART (1) // ROM has multiple UARTs available for logging
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#define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM
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#define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking
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#define ESP_ROM_USB_SERIAL_DEVICE_NUM (4) // The serial port ID (UART, USB, ...) of USB_SERIAL_JTAG in the ROM.
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@ -17,3 +16,4 @@
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#define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency`
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#define ESP_ROM_HAS_HAL_WDT (1) // ROM has the implementation of Watchdog HAL driver
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#define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing
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#define ESP_ROM_HAS_ETS_PRINTF_BUG (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
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@ -9,6 +9,7 @@
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#include "esp_attr.h"
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#include "sdkconfig.h"
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#include "hal/uart_ll.h"
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#include "hal/efuse_hal.h"
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#if CONFIG_IDF_TARGET_ESP32
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/**
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@ -24,3 +25,25 @@ IRAM_ATTR void esp_rom_uart_set_clock_baudrate(uint8_t uart_no, uint32_t clock_h
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{
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uart_ll_set_baudrate(UART_LL_GET_HW(uart_no), baud_rate, clock_hz);
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}
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#if CONFIG_IDF_TARGET_ESP32C3
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/**
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* The ESP32-C3 ROM has released two versions, one is the ECO3 version,
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* and the other is the version before ECO3 (include ECO0 ECO1 ECO2).
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* These two versions of the ROM code do not list uart_tx_switch wrap
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* function in the ROM interface, so here use the uart_tx_switch direct
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* address instead.
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*/
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IRAM_ATTR void esp_rom_uart_set_as_console(uint8_t uart_no)
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{
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typedef void (*rom_func_t)(uint8_t);
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rom_func_t uart_tx_switch = NULL;
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if (efuse_hal_chip_revision() < 3) {
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uart_tx_switch = (rom_func_t)0x4004b8ca;
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} else {
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uart_tx_switch = (rom_func_t)0x4004c166;
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}
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uart_tx_switch(uart_no);
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}
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#endif
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