kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/xtensa_sol_frame_saves_extra_registers_v4.4' into 'release/v4.4'
freertos: Xtensa solicited stack frame should save threadptr register (v4.4) See merge request espressif/esp-idf!18853pull/9422/head
commit
bdaeab5de7
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@ -449,6 +449,10 @@ _frxt_dispatch:
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.L_frxt_dispatch_sol:
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/* Solicited stack frame. Restore minimal context and return from vPortYield(). */
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#if XCHAL_HAVE_THREADPTR
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l32i a2, sp, XT_SOL_THREADPTR
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wur.threadptr a2
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#endif
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l32i a3, sp, XT_SOL_PS
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#ifdef __XTENSA_CALL0_ABI__
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l32i a12, sp, XT_SOL_A12
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@ -536,6 +540,10 @@ vPortYield:
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rsr a2, PS
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s32i a0, sp, XT_SOL_PC
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s32i a2, sp, XT_SOL_PS
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#if XCHAL_HAVE_THREADPTR
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rur.threadptr a2
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s32i a2, sp, XT_SOL_THREADPTR
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#endif
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#ifdef __XTENSA_CALL0_ABI__
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s32i a12, sp, XT_SOL_A12 /* save callee-saved registers */
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s32i a13, sp, XT_SOL_A13
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@ -188,6 +188,14 @@ STRUCT_END(XtExcFrame)
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by the callee according to the compiler's ABI conventions, some space to save
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the return address for returning to the caller, and the caller's PS register.
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Note: Although the xtensa ABI considers the threadptr as "global" across
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functions (meaning it is neither caller or callee saved), it is treated as a
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callee-saved register in a solicited stack frame. This omits the need for the
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OS to include extra logic to save "global" registers on each context switch.
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Only the threadptr register is treated as callee-saved, as all other NCP
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(non-coprocessor extra) registers are caller-saved. See "tie.h" for more
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details.
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For Windowed ABI, this stack frame includes the caller's base save area.
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Note on XT_SOL_EXIT field:
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@ -204,7 +212,11 @@ STRUCT_BEGIN
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STRUCT_FIELD (long, 4, XT_SOL_EXIT, exit)
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STRUCT_FIELD (long, 4, XT_SOL_PC, pc)
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STRUCT_FIELD (long, 4, XT_SOL_PS, ps)
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STRUCT_FIELD (long, 4, XT_SOL_NEXT, next)
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#if XCHAL_HAVE_THREADPTR
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STRUCT_FIELD (long, 4, XT_SOL_THREADPTR, threadptr)
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#else
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STRUCT_FIELD (long, 4, XT_SOL_NEXT, next) /* Dummy register for 16-byte alignment */
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#endif
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STRUCT_FIELD (long, 4, XT_SOL_A12, a12) /* should be on 16-byte alignment */
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STRUCT_FIELD (long, 4, XT_SOL_A13, a13)
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STRUCT_FIELD (long, 4, XT_SOL_A14, a14)
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@ -213,7 +225,11 @@ STRUCT_FIELD (long, 4, XT_SOL_A15, a15)
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STRUCT_FIELD (long, 4, XT_SOL_EXIT, exit)
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STRUCT_FIELD (long, 4, XT_SOL_PC, pc)
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STRUCT_FIELD (long, 4, XT_SOL_PS, ps)
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STRUCT_FIELD (long, 4, XT_SOL_NEXT, next)
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#if XCHAL_HAVE_THREADPTR
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STRUCT_FIELD (long, 4, XT_SOL_THREADPTR, threadptr)
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#else
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STRUCT_FIELD (long, 4, XT_SOL_NEXT, next) /* Dummy register for 16-byte alignment */
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#endif
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STRUCT_FIELD (long, 4, XT_SOL_A0, a0) /* should be on 16-byte alignment */
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STRUCT_FIELD (long, 4, XT_SOL_A1, a1)
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STRUCT_FIELD (long, 4, XT_SOL_A2, a2)
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