diff --git a/components/esp32/int_wdt.c b/components/esp32/int_wdt.c
index 8179fca5d8..debd675c41 100644
--- a/components/esp32/int_wdt.c
+++ b/components/esp32/int_wdt.c
@@ -29,7 +29,7 @@
 #include "soc/timer_group_struct.h"
 #include "soc/timer_group_reg.h"
 #include "driver/timer.h"
-
+#include "driver/periph_ctrl.h"
 #include "esp_int_wdt.h"
 
 #if CONFIG_INT_WDT
@@ -71,6 +71,7 @@ static void IRAM_ATTR tick_hook(void) {
 
 
 void esp_int_wdt_init() {
+    periph_module_enable(PERIPH_TIMG1_MODULE);
     TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
     TIMERG1.wdt_config0.sys_reset_length=7;                 //3.2uS
     TIMERG1.wdt_config0.cpu_reset_length=7;                 //3.2uS
diff --git a/components/esp32/task_wdt.c b/components/esp32/task_wdt.c
index dc46e1c9b8..0e0b87c658 100644
--- a/components/esp32/task_wdt.c
+++ b/components/esp32/task_wdt.c
@@ -33,7 +33,7 @@
 #include "soc/timer_group_reg.h"
 #include "esp_log.h"
 #include "driver/timer.h"
-
+#include "driver/periph_ctrl.h"
 #include "esp_task_wdt.h"
 
 //Assertion macro where, if 'cond' is false, will exit the critical section and return 'ret'
@@ -183,6 +183,7 @@ esp_err_t esp_task_wdt_init(uint32_t timeout, bool panic)
         ESP_ERROR_CHECK(esp_intr_alloc(ETS_TG0_WDT_LEVEL_INTR_SOURCE, 0, task_wdt_isr, NULL, &twdt_config->intr_handle))
 
         //Configure hardware timer
+        periph_module_enable(PERIPH_TIMG0_MODULE);
         TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;               //Disable write protection
         TIMERG0.wdt_config0.sys_reset_length=7;                 //3.2uS
         TIMERG0.wdt_config0.cpu_reset_length=7;                 //3.2uS