fix(spi): fix dma data error, change xtal as default source

components/esp_driver_spi/include/esp_private/spi_common_internal.h

@@ -13,6 +13,7 @@
 #include "freertos/FreeRTOS.h"
 #include "hal/spi_types.h"
 #include "hal/dma_types.h"
+#include "soc/ext_mem_defs.h"   //for SOC_NON_CACHEABLE_OFFSET
 #include "esp_private/spi_dma.h"
 #include "esp_pm.h"
 #include "esp_private/spi_share_hw_ctrl.h"

components/esp_driver_spi/test_apps/components/spi_bench_mark/include/spi_performance.h

@@ -68,12 +68,11 @@
 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA         54
 
 #elif CONFIG_IDF_TARGET_ESP32P4
-//TODO: IDF-8313 update after chips back and PLL setup
-#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ                            10*1000*1000
-#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                1000
-#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING                   1000
-#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA         1000
-#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA            1000
+#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ                            26*1000*1000
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                44
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING                   27
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA         26
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA            12
 
 #elif CONFIG_IDF_TARGET_ESP32C5
 //TODO: IDF-10002 update after chips back and PLL setup

components/soc/esp32p4/include/soc/clk_tree_defs.h

@@ -466,7 +466,8 @@ typedef enum {
     SPI_CLK_SRC_XTAL     = SOC_MOD_CLK_XTAL,        /*!< Select XTAL as SPI source clock */
     SPI_CLK_SRC_RC_FAST  = SOC_MOD_CLK_RC_FAST,     /*!< Select RC_FAST_20M as SPI source clock */
     SPI_CLK_SRC_SPLL     = SOC_MOD_CLK_SPLL,        /*!< Select SPLL as SPI source clock */
-    SPI_CLK_SRC_DEFAULT  = SOC_MOD_CLK_SPLL,        /*!< Select SPLL as SPI source clock */
+    // TODO: IDF-8313, use PLL as default
+    SPI_CLK_SRC_DEFAULT  = SOC_MOD_CLK_XTAL,        /*!< Select XTAL as default source clock */
 } soc_periph_spi_clk_src_t;
 
 /////////////////////////////////////////////////PSRAM////////////////////////////////////////////////////////////////////