kopia lustrzana https://github.com/espressif/esp-idf
change(psram): atomic set clock and reset
rodzic
0f852ec0da
commit
b75f8561e5
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@ -8,10 +8,15 @@
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_private/periph_ctrl.h"
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#include "../esp_psram_impl.h"
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#include "rom/opi_flash.h"
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#include "hal/psram_ctrlr_ll.h"
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// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
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#define PSRAM_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
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#define AP_HEX_PSRAM_SYNC_READ 0x0000
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#define AP_HEX_PSRAM_SYNC_WRITE 0x8080
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#define AP_HEX_PSRAM_BURST_READ 0x2020
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@ -324,12 +329,17 @@ static void s_configure_psram_ecc(void)
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esp_err_t esp_psram_impl_enable(void)
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{
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PSRAM_RCC_ATOMIC() {
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psram_ctrlr_ll_enable_module_clock(PSRAM_CTRLR_LL_MSPI_ID_2, true);
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psram_ctrlr_ll_reset_module_clock(PSRAM_CTRLR_LL_MSPI_ID_2);
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psram_ctrlr_ll_select_clk_source(PSRAM_CTRLR_LL_MSPI_ID_2, PSRAM_CLK_SRC_XTAL);
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}
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s_set_psram_cs_timing();
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#if CONFIG_SPIRAM_ECC_ENABLE
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s_configure_psram_ecc();
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#endif
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//enter MSPI slow mode to init PSRAM device registers
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psram_ctrlr_ll_select_clk_source(PSRAM_CTRLR_LL_MSPI_ID_2, PSRAM_CLK_SRC_XTAL);
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psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_2, 2);
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psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_2, true);
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psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_3, true);
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@ -274,7 +274,6 @@ static inline void psram_ctrlr_ll_enable_rd_splice(uint32_t mspi_id, bool en)
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SPIMEM2.mem_ctrl1.mem_ar_splice_en = en;
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}
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/**
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* @brief Enable PSRAM module clock
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*
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@ -285,9 +284,32 @@ __attribute__((always_inline))
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static inline void psram_ctrlr_ll_enable_module_clock(uint32_t mspi_id, bool en)
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{
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(void)mspi_id;
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HP_SYS_CLKRST.peri_clk_ctrl00.reg_psram_pll_clk_en = en;
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HP_SYS_CLKRST.soc_clk_ctrl0.reg_psram_sys_clk_en = en;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define psram_ctrlr_ll_enable_module_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; psram_ctrlr_ll_enable_module_clock(__VA_ARGS__)
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/**
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* @brief Reset PSRAM module clock
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*
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* @param mspi_id mspi_id
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*/
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__attribute__((always_inline))
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static inline void psram_ctrlr_ll_reset_module_clock(uint32_t mspi_id)
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{
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(void)mspi_id;
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HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dual_mspi_axi = 1;
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HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dual_mspi_axi = 0;
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HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dual_mspi_apb = 1;
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HP_SYS_CLKRST.hp_rst_en0.reg_rst_en_dual_mspi_apb = 0;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define psram_ctrlr_ll_reset_module_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; psram_ctrlr_ll_reset_module_clock(__VA_ARGS__)
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/**
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* @brief Select PSRAM clock source
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*
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@ -317,9 +339,14 @@ static inline void psram_ctrlr_ll_select_clk_source(uint32_t mspi_id, soc_periph
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break;
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}
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HP_SYS_CLKRST.peri_clk_ctrl00.reg_psram_pll_clk_en = 1;
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HP_SYS_CLKRST.peri_clk_ctrl00.reg_psram_clk_src_sel = clk_val;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define psram_ctrlr_ll_select_clk_source(...) (void)__DECLARE_RCC_ATOMIC_ENV; psram_ctrlr_ll_select_clk_source(__VA_ARGS__)
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/**
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* @brief Set PSRAM core clock
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*
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