uart: fixed reset logic on ESP32-S3

components/hal/esp32s3/include/hal/uart_ll.h

@@ -55,6 +55,18 @@ typedef enum {
     UART_INTR_WAKEUP           = (0x1 << 19),
 } uart_intr_t;
 
+/**
+ * @brief  Configure the UART core reset.
+ *
+ * @param  hw Beginning address of the peripheral registers.
+ * @param  core_rst_en True to enable the core reset, otherwise set it false.
+ *
+ * @return None.
+ */
+static inline void uart_ll_set_reset_core(uart_dev_t *hw, bool core_rst_en)
+{
+    hw->clk_conf.rst_core = core_rst_en;
+}
 
 /**
  * @brief  Set the UART source clock.

components/soc/esp32s3/include/soc/Kconfig.soc_caps.in

@@ -695,6 +695,10 @@ config SOC_UART_SUPPORT_XTAL_CLK
     bool
     default y
 
+config SOC_UART_REQUIRE_CORE_RESET
+    bool
+    default y
+
 config SOC_USB_PERIPH_NUM
     bool
     default y

components/soc/esp32s3/include/soc/soc_caps.h

@@ -273,6 +273,7 @@
 #define SOC_UART_SUPPORT_WAKEUP_INT (1)        /*!< Support UART wakeup interrupt */
 #define SOC_UART_SUPPORT_RTC_CLK    (1)     /*!< Support RTC clock as the clock source */
 #define SOC_UART_SUPPORT_XTAL_CLK   (1)     /*!< Support XTAL clock as the clock source */
+#define SOC_UART_REQUIRE_CORE_RESET (1)
 
 /*-------------------------- USB CAPS ----------------------------------------*/
 #define SOC_USB_PERIPH_NUM 1