From 7a0d40582e8a569f229086de7dcabea21ff320a9 Mon Sep 17 00:00:00 2001 From: Jakob Hasse Date: Thu, 1 Jul 2021 14:59:51 +0800 Subject: [PATCH] [spi_flash]: Disable deadlock test from S3 --- components/spi_flash/test/test_spi_flash.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/components/spi_flash/test/test_spi_flash.c b/components/spi_flash/test/test_spi_flash.c index cc5e1d276a..954412da4d 100644 --- a/components/spi_flash/test/test_spi_flash.c +++ b/components/spi_flash/test/test_spi_flash.c @@ -337,6 +337,8 @@ TEST_CASE("Test spi_flash read/write performance", "[spi_flash]") #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) +// TODO: This test is disabled on S3 with legacy impl - IDF-3505 +#if !CONFIG_SPI_FLASH_USE_LEGACY_IMPL && CONFIG_IDF_TARGET_ESP32S3 #if portNUM_PROCESSORS > 1 TEST_CASE("spi_flash deadlock with high priority busy-waiting task", "[spi_flash][esp_flash]") @@ -396,6 +398,8 @@ TEST_CASE("spi_flash deadlock with high priority busy-waiting task", "[spi_flash } #endif // portNUM_PROCESSORS > 1 +#endif // !CONFIG_SPI_FLASH_USE_LEGACY_IMPL && CONFIG_IDF_TARGET_ESP32S3 + TEST_CASE("WEL is cleared after boot", "[spi_flash]") { esp_rom_spiflash_chip_t *legacy_chip = &g_rom_flashchip;