diff --git a/components/ulp/cmake/CMakeLists.txt b/components/ulp/cmake/CMakeLists.txt index c097bcace7..08b5af497f 100644 --- a/components/ulp/cmake/CMakeLists.txt +++ b/components/ulp/cmake/CMakeLists.txt @@ -76,6 +76,7 @@ if(ULP_COCPU_IS_RISCV) target_link_options(${ULP_APP_NAME} PRIVATE SHELL:-T ${IDF_PATH}/components/ulp/ld/${IDF_TARGET}.peripherals.ld) target_link_options(${ULP_APP_NAME} PRIVATE "-Wl,--no-warn-rwx-segments") target_compile_definitions(${ULP_APP_NAME} PRIVATE IS_ULP_COCPU) + target_compile_definitions(${ULP_APP_NAME} PRIVATE ULP_RISCV_REGISTER_OPS) elseif(ULP_COCPU_IS_LP_CORE) list(APPEND ULP_S_SOURCES diff --git a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_adc_ulp_core.h b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_adc_ulp_core.h index 9c27834c12..5d189109f6 100644 --- a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_adc_ulp_core.h +++ b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_adc_ulp_core.h @@ -6,6 +6,7 @@ #pragma once +#include "ulp_riscv_register_ops.h" #include "hal/adc_ll.h" #ifdef __cplusplus diff --git a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_gpio.h b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_gpio.h index 6e02ea70f9..c675279152 100644 --- a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_gpio.h +++ b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_gpio.h @@ -12,7 +12,7 @@ extern "C" { #include "soc/rtc_io_reg.h" #include "soc/sens_reg.h" - +#include "ulp_riscv_register_ops.h" typedef enum { GPIO_NUM_0 = 0, /*!< GPIO0, input and output */ diff --git a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h index ce99f229ae..52e7925b8e 100644 --- a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h +++ b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h @@ -5,13 +5,11 @@ */ #pragma once -#define ULP_RISCV_REGISTER_OPS #ifdef __cplusplus extern "C" { #endif - //Registers Operation {{ /* diff --git a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_touch_ulp_core.h b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_touch_ulp_core.h index 2313567c33..86bdd504f5 100644 --- a/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_touch_ulp_core.h +++ b/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_touch_ulp_core.h @@ -7,6 +7,7 @@ #pragma once #include "esp_err.h" +#include "ulp_riscv_register_ops.h" #include "hal/touch_sensor_types.h" #ifdef __cplusplus