kopia lustrzana https://github.com/espressif/esp-idf
fix reboot or crash when enable lightsleep on esp32s2
rodzic
8ff8a05334
commit
aa43ed8bb8
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@ -22,3 +22,8 @@ set_source_files_properties(
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startup.c
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PROPERTIES COMPILE_FLAGS
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-fno-stack-protector)
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if(NOT CMAKE_BUILD_EARLY_EXPANSION)
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set_source_files_properties("${CMAKE_CURRENT_LIST_DIR}/sleep_modes.c" PROPERTIES
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COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion")
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endif()
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@ -71,10 +71,10 @@
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#endif
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#if defined(CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS) || defined(CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS)
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#define LIGHT_SLEEP_TIME_OVERHEAD_US (650 + 30 * 240 / DEFAULT_CPU_FREQ_MHZ)
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#define LIGHT_SLEEP_TIME_OVERHEAD_US (1650 + 30 * 240 / DEFAULT_CPU_FREQ_MHZ)
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#define DEEP_SLEEP_TIME_OVERHEAD_US (650 + 100 * 240 / DEFAULT_CPU_FREQ_MHZ)
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#else
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#define LIGHT_SLEEP_TIME_OVERHEAD_US (250 + 30 * 240 / DEFAULT_CPU_FREQ_MHZ)
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#define LIGHT_SLEEP_TIME_OVERHEAD_US (1250 + 30 * 240 / DEFAULT_CPU_FREQ_MHZ)
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#define DEEP_SLEEP_TIME_OVERHEAD_US (250 + 100 * 240 / DEFAULT_CPU_FREQ_MHZ)
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#endif
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@ -232,11 +232,9 @@ static void IRAM_ATTR resume_uarts(void)
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REG_CLR_BIT(UART_FLOW_CONF_REG(i), UART_FORCE_XON);
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#elif CONFIG_IDF_TARGET_ESP32S2
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if (periph_ll_periph_enabled(PERIPH_UART0_MODULE + i)) {
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REG_CLR_BIT(UART_FLOW_CONF_REG(i), UART_FORCE_XON);
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REG_SET_BIT(UART_FLOW_CONF_REG(i), UART_SW_FLOW_CON_EN | UART_FORCE_XOFF);
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while (REG_GET_FIELD(UART_FSM_STATUS_REG(i), UART_ST_UTX_OUT) != 0) {
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;
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}
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REG_CLR_BIT(UART_FLOW_CONF_REG(i), UART_FORCE_XOFF);
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REG_SET_BIT(UART_FLOW_CONF_REG(i), UART_FORCE_XON);
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REG_CLR_BIT(UART_FLOW_CONF_REG(i), UART_SW_FLOW_CON_EN | UART_FORCE_XON);
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}
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#endif
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}
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@ -370,10 +370,17 @@ IRAM_ATTR ESP_SYSTEM_INIT_FN(init_components0, BIT(0))
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esp_pm_impl_init();
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#ifdef CONFIG_PM_DFS_INIT_AUTO
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int xtal_freq = (int) rtc_clk_xtal_freq_get();
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#ifdef CONFIG_IDF_TARGET_ESP32
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esp_pm_config_esp32_t cfg = {
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.max_freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ,
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.min_freq_mhz = xtal_freq,
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};
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#else
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esp_pm_config_esp32s2_t cfg = {
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.max_freq_mhz = CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ,
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.min_freq_mhz = xtal_freq,
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};
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#endif
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esp_pm_configure(&cfg);
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#endif //CONFIG_PM_DFS_INIT_AUTO
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#endif //CONFIG_PM_ENABLE
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@ -274,7 +274,7 @@ static inline void periph_ll_reset(periph_module_t periph)
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static inline bool IRAM_ATTR periph_ll_periph_enabled(periph_module_t periph)
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{
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return DPORT_REG_GET_BIT(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)) != 0 &&
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return DPORT_REG_GET_BIT(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)) == 0 &&
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DPORT_REG_GET_BIT(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)) != 0;
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}
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