mirror
/
esp-idf
kopia lustrzana https://github.com/espressif/esp-idf
1
0
Forkuj 0
Kod Zgłoszenia Projekty Wydania Wiki Aktywność

Merge branch 'bugfix/fix_gpio_wakeup_related_issues_in_ssc_sleep_test_backport_v4.4' into 'release/v4.4' 

sleep: fix gpio wakeup related issues(backport v4.4)

See merge request espressif/esp-idf!22333
pull/10984/head
Jiang Jiang Jian 2023-02-14 10:36:51 +08:00
rodzic 23ec5e1944 8c491be452
commit a75a62431a
14 zmienionych plików z 7 dodań i 43 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

10
components/driver/gpio.c
Wyświetl plik

@ -562,7 +562,7 @@ esp_err_t gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
#endif
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type);
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
#endif
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
@ -585,7 +585,7 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num)
#endif
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_wakeup_disable(gpio_context.gpio_hal, gpio_num);
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
#endif
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
@ -723,7 +723,6 @@ void gpio_iomux_out(uint8_t gpio_num, int func, bool oen_inv)
gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func, (uint32_t)oen_inv);
}
#if SOC_GPIO_SUPPORT_SLP_SWITCH
static esp_err_t gpio_sleep_pullup_en(gpio_num_t gpio_num)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
@ -895,7 +894,6 @@ esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num)
return ESP_OK;
}
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#endif // SOC_GPIO_SUPPORT_SLP_SWITCH
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
@ -910,7 +908,7 @@ esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t int
}
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_deepsleep_wakeup_enable(gpio_context.gpio_hal, gpio_num, intr_type);
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
gpio_hal_sleep_sel_dis(gpio_context.gpio_hal, gpio_num);
#endif
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
@ -925,7 +923,7 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num)
}
portENTER_CRITICAL(&gpio_context.gpio_spinlock);
gpio_hal_deepsleep_wakeup_disable(gpio_context.gpio_hal, gpio_num);
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
gpio_hal_sleep_sel_en(gpio_context.gpio_hal, gpio_num);
#endif
portEXIT_CRITICAL(&gpio_context.gpio_spinlock);

2
components/driver/include/driver/gpio.h
Wyświetl plik

@ -449,7 +449,6 @@ esp_err_t gpio_force_hold_all(void);
esp_err_t gpio_force_unhold_all(void);
#endif
#if SOC_GPIO_SUPPORT_SLP_SWITCH
/**
* @brief Enable SLP_SEL to change GPIO status automantically in lightsleep.
* @param gpio_num GPIO number of the pad.
@ -496,7 +495,6 @@ esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode);
* - ESP_ERR_INVALID_ARG : Parameter error
*/
esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull);
#endif
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP

2
components/driver/include/esp_private/gpio.h
Wyświetl plik

@ -12,7 +12,6 @@
#include "soc/soc_caps.h"
#include "driver/gpio.h"
#if SOC_GPIO_SUPPORT_SLP_SWITCH
#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
/**
* @brief Emulate ESP32S2 behaviour to backup FUN_PU, FUN_PD information
@ -34,4 +33,3 @@ esp_err_t gpio_sleep_pupd_config_apply(gpio_num_t gpio_num);
*/
esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num);
#endif
#endif

4
components/esp_hw_support/include/esp_private/sleep_gpio.h
Wyświetl plik

@ -18,7 +18,7 @@ extern "C" {
* This file contains declarations of GPIO related functions in light sleep mode.
*/
#if SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
/**
* @brief Save GPIO pull-up and pull-down configuration information in the wake-up state
@ -39,7 +39,7 @@ void gpio_sleep_mode_config_apply(void);
*/
void gpio_sleep_mode_config_unapply(void);
#endif // SOC_GPIO_SUPPORT_SLP_SWITCH && CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#ifdef __cplusplus
}

2
components/esp_hw_support/include/esp_sleep.h
Wyświetl plik

@ -458,7 +458,6 @@ void esp_deep_sleep_disable_rom_logging(void);
esp_err_t esp_sleep_cpu_pd_low_init(bool enable);
#endif
#if SOC_GPIO_SUPPORT_SLP_SWITCH
/**
* @brief Configure to isolate all GPIO pins in sleep state
*/
@ -469,7 +468,6 @@ void esp_sleep_config_gpio_isolate(void);
* @param enable decide whether to switch status or not
*/
void esp_sleep_enable_gpio_switch(bool enable);
#endif
#if CONFIG_MAC_BB_PD
/**

4
components/esp_hw_support/sleep_gpio.c
Wyświetl plik

@ -25,8 +25,6 @@
static const char *TAG = "sleep";
#if SOC_GPIO_SUPPORT_SLP_SWITCH
#if CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
void gpio_sleep_mode_config_apply(void)
{
@ -95,8 +93,6 @@ void esp_sleep_enable_gpio_switch(bool enable)
}
}
#endif // SOC_GPIO_SUPPORT_SLP_SWITCH
// IDF does not officially support esp32h2 in v4.4
#if !CONFIG_IDF_TARGET_ESP32H2
IRAM_ATTR void esp_sleep_isolate_digital_gpio(void)

7
components/esp_pm/pm_impl.c
Wyświetl plik

@ -301,10 +301,6 @@ esp_err_t esp_pm_configure(const void* vconfig)
s_config_changed = true;
portEXIT_CRITICAL(&s_switch_lock);
#if CONFIG_PM_SLP_DISABLE_GPIO && SOC_GPIO_SUPPORT_SLP_SWITCH
esp_sleep_enable_gpio_switch(config->light_sleep_enable);
#endif
#if CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP && SOC_PM_SUPPORT_CPU_PD
esp_err_t ret = esp_sleep_cpu_pd_low_init(config->light_sleep_enable);
if (config->light_sleep_enable && ret != ESP_OK) {
@ -737,9 +733,6 @@ void esp_pm_impl_init(void)
esp_pm_trace_init();
#endif
#if CONFIG_PM_SLP_DISABLE_GPIO && SOC_GPIO_SUPPORT_SLP_SWITCH
esp_sleep_config_gpio_isolate();
#endif
ESP_ERROR_CHECK(esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "rtos0",
&s_rtos_lock_handle[0]));
ESP_ERROR_CHECK(esp_pm_lock_acquire(s_rtos_lock_handle[0]));

2
components/esp_system/startup.c
Wyświetl plik

@ -459,7 +459,7 @@ IRAM_ATTR ESP_SYSTEM_INIT_FN(init_components0, BIT(0))
{
esp_timer_init();
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND && !CONFIG_PM_SLP_DISABLE_GPIO
#if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
// Configure to isolate (disable the Input/Output/Pullup/Pulldown
// function of the pin) all GPIO pins in sleep state
esp_sleep_config_gpio_isolate();

2
components/hal/include/hal/gpio_hal.h
Wyświetl plik

@ -374,7 +374,6 @@ void gpio_hal_intr_disable(gpio_hal_context_t *hal, gpio_num_t gpio_num);
#define gpio_hal_force_unhold_all() gpio_ll_force_unhold_all()
#endif
#if SOC_GPIO_SUPPORT_SLP_SWITCH
/**
* @brief Enable pull-up on GPIO when system sleep.
*
@ -472,7 +471,6 @@ void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, gpio_num_t gpio_n
*/
void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, gpio_num_t gpio_num);
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#endif //SOC_GPIO_SUPPORT_SLP_SWITCH
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP

3
components/soc/esp32/include/soc/soc_caps.h
Wyświetl plik

@ -134,9 +134,6 @@
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM: 1, 3, 5, 6, 7, 8, 9, 10, 11, 16, 17, 18, 19, 21, 22, 23)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0xEF0FEAULL
// Support to configure slept status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
/*-------------------------- I2C CAPS ----------------------------------------*/
// ESP32 have 2 I2C.
#define SOC_I2C_NUM (2)

3
components/soc/esp32c3/include/soc/soc_caps.h
Wyświetl plik

@ -119,9 +119,6 @@
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_21)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFFC0ULL
// Support to configure sleep status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */

3
components/soc/esp32h2/include/soc/soc_caps.h
Wyświetl plik

@ -105,9 +105,6 @@
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_40)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x000001FFFFFFFFC0ULL
// Support to configure sleep status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */

3
components/soc/esp32s2/include/soc/soc_caps.h
Wyświetl plik

@ -117,9 +117,6 @@
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_46)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00007FFFFC000000ULL
// Support to configure slept status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
/*-------------------------- Dedicated GPIO CAPS ---------------------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */

3
components/soc/esp32s3/include/soc/soc_caps.h
Wyświetl plik

@ -116,9 +116,6 @@
// digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_26~GPIO_NUM_48)
#define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0001FFFFFC000000ULL
// Support to configure slept status
#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)
/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */
#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */