From a5a171926b8278493997720f1ae8f2fe6c93e5c4 Mon Sep 17 00:00:00 2001 From: morris Date: Tue, 2 Aug 2022 18:05:47 +0800 Subject: [PATCH] rmt: add test with -O0 --- components/driver/rmt/rmt_encoder.c | 1 + .../driver/test_apps/rmt/sdkconfig.ci.iram_safe | 2 +- components/hal/esp32/include/hal/rmt_ll.h | 13 +++++++++++++ components/hal/esp32c3/include/hal/rmt_ll.h | 15 +++++++++++++++ components/hal/esp32h2/include/hal/rmt_ll.h | 15 +++++++++++++++ components/hal/esp32s2/include/hal/rmt_ll.h | 17 +++++++++++++++++ components/hal/esp32s3/include/hal/rmt_ll.h | 16 ++++++++++++++++ 7 files changed, 78 insertions(+), 1 deletion(-) diff --git a/components/driver/rmt/rmt_encoder.c b/components/driver/rmt/rmt_encoder.c index 25d8b0e7ef..35e330f986 100644 --- a/components/driver/rmt/rmt_encoder.c +++ b/components/driver/rmt/rmt_encoder.c @@ -46,6 +46,7 @@ static esp_err_t rmt_bytes_encoder_reset(rmt_encoder_t *encoder) return ESP_OK; } +__attribute__((always_inline)) static inline uint8_t _bitwise_reverse(uint8_t n) { n = ((n & 0xf0) >> 4) | ((n & 0x0f) << 4); diff --git a/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe b/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe index 620e832479..086b2260dd 100644 --- a/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe +++ b/components/driver/test_apps/rmt/sdkconfig.ci.iram_safe @@ -1,6 +1,6 @@ CONFIG_COMPILER_DUMP_RTL_FILES=y CONFIG_RMT_ISR_IRAM_SAFE=y - +CONFIG_COMPILER_OPTIMIZATION_NONE=y # silent the error check, as the error string are stored in rodata, causing RTL check failure CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y diff --git a/components/hal/esp32/include/hal/rmt_ll.h b/components/hal/esp32/include/hal/rmt_ll.h index 5dd7ad62cb..b1735e5e6b 100644 --- a/components/hal/esp32/include/hal/rmt_ll.h +++ b/components/hal/esp32/include/hal/rmt_ll.h @@ -139,6 +139,7 @@ static inline void rmt_ll_tx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.mem_rd_rst = 1; @@ -153,6 +154,7 @@ static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.tx_start = 1; @@ -189,6 +191,7 @@ static inline void rmt_ll_tx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->conf_ch[channel].conf1.tx_conti_mode = enable; @@ -202,6 +205,7 @@ static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool * @param level IDLE level (1 => high, 0 => low) * @param enable True to fix the IDLE level, otherwise the IDLE level is determined by EOF encoder */ +__attribute__((always_inline)) static inline void rmt_ll_tx_fix_idle_level(rmt_dev_t *dev, uint32_t channel, uint8_t level, bool enable) { dev->conf_ch[channel].conf1.idle_out_en = enable; @@ -306,6 +310,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.mem_wr_rst = 1; @@ -321,6 +326,7 @@ static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param channel RMT RX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->conf_ch[channel].conf1.rx_en = enable; @@ -357,6 +363,7 @@ static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param owner Memory owner */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt_ll_mem_owner_t owner) { dev->conf_ch[channel].conf1.mem_owner = owner; @@ -393,6 +400,7 @@ static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, * @param channel RMT RX channel number * @return writer offset */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_memory_writer_offset(rmt_dev_t *dev, uint32_t channel) { return (dev->status_ch[channel] & 0x3FF) - (channel) * 64; @@ -407,6 +415,7 @@ static inline uint32_t rmt_ll_rx_get_memory_writer_offset(rmt_dev_t *dev, uint32 * @param mask Event mask * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable) { if (enable) { @@ -422,6 +431,7 @@ static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool e * @param dev Peripheral instance address * @param mask Interupt status mask */ +__attribute__((always_inline)) static inline void rmt_ll_clear_interrupt_status(rmt_dev_t *dev, uint32_t mask) { dev->int_clr.val = mask; @@ -445,6 +455,7 @@ static inline volatile void *rmt_ll_get_interrupt_status_reg(rmt_dev_t *dev) * @param channel RMT TX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_tx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_TX_MASK(channel); @@ -469,6 +480,7 @@ static inline uint32_t rmt_ll_tx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt raw status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32_t channel) { return dev->int_raw.val & (RMT_LL_EVENT_RX_MASK(channel) | RMT_LL_EVENT_RX_ERROR(channel)); @@ -481,6 +493,7 @@ static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_RX_MASK(channel); diff --git a/components/hal/esp32c3/include/hal/rmt_ll.h b/components/hal/esp32c3/include/hal/rmt_ll.h index f73ae68a06..177e4ecea8 100644 --- a/components/hal/esp32c3/include/hal/rmt_ll.h +++ b/components/hal/esp32c3/include/hal/rmt_ll.h @@ -148,6 +148,7 @@ static inline void rmt_ll_tx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->tx_conf[channel].mem_rd_rst = 1; @@ -162,6 +163,7 @@ static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) { // update other configuration registers before start transmitting @@ -175,6 +177,7 @@ static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_stop(rmt_dev_t *dev, uint32_t channel) { dev->tx_conf[channel].tx_stop = 1; @@ -213,6 +216,7 @@ static inline void rmt_ll_tx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->tx_conf[channel].tx_conti_mode = enable; @@ -225,6 +229,7 @@ static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param count TX loop count */ +__attribute__((always_inline)) static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count) { HAL_ASSERT(count <= RMT_LL_MAX_LOOP_COUNT_PER_BATCH && "loop count out of range"); @@ -237,6 +242,7 @@ static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, ui * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) { dev->tx_lim[channel].loop_count_reset = 1; @@ -250,6 +256,7 @@ static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop_count(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->tx_lim[channel].tx_loop_cnt_en = enable; @@ -306,6 +313,7 @@ static inline void rmt_ll_tx_sync_group_remove_channels(rmt_dev_t *dev, uint32_t * @param level IDLE level (1 => high, 0 => low) * @param enable True to fix the IDLE level, otherwise the IDLE level is determined by EOF encoder */ +__attribute__((always_inline)) static inline void rmt_ll_tx_fix_idle_level(rmt_dev_t *dev, uint32_t channel, uint8_t level, bool enable) { dev->tx_conf[channel].idle_out_en = enable; @@ -434,6 +442,7 @@ static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param channel RMT RX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->rx_conf[channel].conf1.rx_en = enable; @@ -472,6 +481,7 @@ static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param owner Memory owner */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt_ll_mem_owner_t owner) { dev->rx_conf[channel].conf1.mem_owner = owner; @@ -508,6 +518,7 @@ static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, * @param channel RMT RX channel number * @return writer offset */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_memory_writer_offset(rmt_dev_t *dev, uint32_t channel) { return dev->rx_status[channel].mem_waddr_ex - (channel + 2) * 48; @@ -585,6 +596,7 @@ static inline void rmt_ll_rx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param mask Event mask * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable) { if (enable) { @@ -600,6 +612,7 @@ static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool e * @param dev Peripheral instance address * @param mask Interupt status mask */ +__attribute__((always_inline)) static inline void rmt_ll_clear_interrupt_status(rmt_dev_t *dev, uint32_t mask) { dev->int_clr.val = mask; @@ -623,6 +636,7 @@ static inline volatile void *rmt_ll_get_interrupt_status_reg(rmt_dev_t *dev) * @param channel RMT TX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_tx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_TX_MASK(channel); @@ -659,6 +673,7 @@ static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_RX_MASK(channel); diff --git a/components/hal/esp32h2/include/hal/rmt_ll.h b/components/hal/esp32h2/include/hal/rmt_ll.h index f82f36a799..ce76e09e73 100644 --- a/components/hal/esp32h2/include/hal/rmt_ll.h +++ b/components/hal/esp32h2/include/hal/rmt_ll.h @@ -148,6 +148,7 @@ static inline void rmt_ll_tx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->tx_conf[channel].mem_rd_rst = 1; @@ -162,6 +163,7 @@ static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) { // update other configuration registers before start transmitting @@ -175,6 +177,7 @@ static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_stop(rmt_dev_t *dev, uint32_t channel) { dev->tx_conf[channel].tx_stop = 1; @@ -213,6 +216,7 @@ static inline void rmt_ll_tx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->tx_conf[channel].tx_conti_mode = enable; @@ -225,6 +229,7 @@ static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param count TX loop count */ +__attribute__((always_inline)) static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count) { HAL_ASSERT(count <= RMT_LL_MAX_LOOP_COUNT_PER_BATCH && "loop count out of range"); @@ -237,6 +242,7 @@ static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, ui * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) { dev->tx_lim[channel].loop_count_reset = 1; @@ -250,6 +256,7 @@ static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop_count(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->tx_lim[channel].tx_loop_cnt_en = enable; @@ -306,6 +313,7 @@ static inline void rmt_ll_tx_sync_group_remove_channels(rmt_dev_t *dev, uint32_t * @param level IDLE level (1 => high, 0 => low) * @param enable True to fix the IDLE level, otherwise the IDLE level is determined by EOF encoder */ +__attribute__((always_inline)) static inline void rmt_ll_tx_fix_idle_level(rmt_dev_t *dev, uint32_t channel, uint8_t level, bool enable) { dev->tx_conf[channel].idle_out_en = enable; @@ -434,6 +442,7 @@ static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param channel RMT RX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->rx_conf[channel].conf1.rx_en = enable; @@ -472,6 +481,7 @@ static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param owner Memory owner */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt_ll_mem_owner_t owner) { dev->rx_conf[channel].conf1.mem_owner = owner; @@ -508,6 +518,7 @@ static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, * @param channel RMT RX channel number * @return writer offset */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_memory_writer_offset(rmt_dev_t *dev, uint32_t channel) { return dev->rx_status[channel].mem_waddr_ex - (channel + 2) * 48; @@ -585,6 +596,7 @@ static inline void rmt_ll_rx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param mask Event mask * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable) { if (enable) { @@ -600,6 +612,7 @@ static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool e * @param dev Peripheral instance address * @param mask Interupt status mask */ +__attribute__((always_inline)) static inline void rmt_ll_clear_interrupt_status(rmt_dev_t *dev, uint32_t mask) { dev->int_clr.val = mask; @@ -623,6 +636,7 @@ static inline volatile void *rmt_ll_get_interrupt_status_reg(rmt_dev_t *dev) * @param channel RMT TX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_tx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_TX_MASK(channel); @@ -659,6 +673,7 @@ static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_RX_MASK(channel); diff --git a/components/hal/esp32s2/include/hal/rmt_ll.h b/components/hal/esp32s2/include/hal/rmt_ll.h index dde63b251d..5a453d1f32 100644 --- a/components/hal/esp32s2/include/hal/rmt_ll.h +++ b/components/hal/esp32s2/include/hal/rmt_ll.h @@ -141,6 +141,7 @@ static inline void rmt_ll_tx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.mem_rd_rst_chn = 1; @@ -155,6 +156,7 @@ static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.tx_start_chn = 1; @@ -166,6 +168,7 @@ static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_stop(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.tx_stop_chn = 1; @@ -202,6 +205,7 @@ static inline void rmt_ll_tx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->conf_ch[channel].conf1.tx_conti_mode_chn = enable; @@ -214,6 +218,7 @@ static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param count TX loop count */ +__attribute__((always_inline)) static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count) { HAL_ASSERT(count <= RMT_LL_MAX_LOOP_COUNT_PER_BATCH && "loop count out of range"); @@ -226,6 +231,7 @@ static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, ui * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) { dev->chn_tx_lim[channel].loop_count_reset_chn = 1; @@ -239,6 +245,7 @@ static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop_count(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chn_tx_lim[channel].tx_loop_cnt_en_chn = enable; @@ -295,6 +302,7 @@ static inline void rmt_ll_tx_sync_group_remove_channels(rmt_dev_t *dev, uint32_t * @param level IDLE level (1 => high, 0 => low) * @param enable True to fix the IDLE level, otherwise the IDLE level is determined by EOF encoder */ +__attribute__((always_inline)) static inline void rmt_ll_tx_fix_idle_level(rmt_dev_t *dev, uint32_t channel, uint8_t level, bool enable) { dev->conf_ch[channel].conf1.idle_out_en_chn = enable; @@ -408,6 +416,7 @@ static inline void rmt_ll_rx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT RX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->conf_ch[channel].conf1.mem_wr_rst_chn = 1; @@ -423,6 +432,7 @@ static inline void rmt_ll_rx_reset_pointer(rmt_dev_t *dev, uint32_t channel) * @param channel RMT RX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->conf_ch[channel].conf1.rx_en_chn = enable; @@ -459,6 +469,7 @@ static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param owner Memory owner */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt_ll_mem_owner_t owner) { dev->conf_ch[channel].conf1.mem_owner_chn = owner; @@ -495,6 +506,7 @@ static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, * @param channel RMT RX channel number * @return writer offset */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_memory_writer_offset(rmt_dev_t *dev, uint32_t channel) { return dev->chnstatus[channel].mem_waddr_ex_chn - (channel) * 64; @@ -548,6 +560,7 @@ static inline void rmt_ll_rx_set_carrier_level(rmt_dev_t *dev, uint32_t channel, * @param mask Event mask * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable) { if (enable) { @@ -563,6 +576,7 @@ static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool e * @param dev Peripheral instance address * @param mask Interupt status mask */ +__attribute__((always_inline)) static inline void rmt_ll_clear_interrupt_status(rmt_dev_t *dev, uint32_t mask) { dev->int_clr.val = mask; @@ -586,6 +600,7 @@ static inline volatile void *rmt_ll_get_interrupt_status_reg(rmt_dev_t *dev) * @param channel RMT TX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_tx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_TX_MASK(channel); @@ -610,6 +625,7 @@ static inline uint32_t rmt_ll_tx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt raw status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32_t channel) { return dev->int_raw.val & (RMT_LL_EVENT_RX_MASK(channel) | RMT_LL_EVENT_RX_ERROR(channel)); @@ -622,6 +638,7 @@ static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_RX_MASK(channel); diff --git a/components/hal/esp32s3/include/hal/rmt_ll.h b/components/hal/esp32s3/include/hal/rmt_ll.h index a491ecdd2c..7b2ba02876 100644 --- a/components/hal/esp32s3/include/hal/rmt_ll.h +++ b/components/hal/esp32s3/include/hal/rmt_ll.h @@ -148,6 +148,7 @@ static inline void rmt_ll_tx_set_channel_clock_div(rmt_dev_t *dev, uint32_t chan * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_pointer(rmt_dev_t *dev, uint32_t channel) { dev->chnconf0[channel].mem_rd_rst_chn = 1; @@ -175,6 +176,7 @@ static inline void rmt_ll_tx_enable_dma(rmt_dev_t *dev, uint32_t channel, bool e * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) { // update other configuration registers before start transmitting @@ -188,6 +190,7 @@ static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel) * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_stop(rmt_dev_t *dev, uint32_t channel) { dev->chnconf0[channel].tx_stop_chn = 1; @@ -226,6 +229,7 @@ static inline void rmt_ll_tx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chnconf0[channel].tx_conti_mode_chn = enable; @@ -238,6 +242,7 @@ static inline void rmt_ll_tx_enable_loop(rmt_dev_t *dev, uint32_t channel, bool * @param channel RMT TX channel number * @param count TX loop count */ +__attribute__((always_inline)) static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count) { HAL_ASSERT(count <= RMT_LL_MAX_LOOP_COUNT_PER_BATCH && "loop count out of range"); @@ -250,6 +255,7 @@ static inline void rmt_ll_tx_set_loop_count(rmt_dev_t *dev, uint32_t channel, ui * @param dev Peripheral instance address * @param channel RMT TX channel number */ +__attribute__((always_inline)) static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) { dev->chn_tx_lim[channel].loop_count_reset_chn = 1; @@ -263,6 +269,7 @@ static inline void rmt_ll_tx_reset_loop_count(rmt_dev_t *dev, uint32_t channel) * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop_count(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chn_tx_lim[channel].tx_loop_cnt_en_chn = enable; @@ -275,6 +282,7 @@ static inline void rmt_ll_tx_enable_loop_count(rmt_dev_t *dev, uint32_t channel, * @param channel RMT TX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_tx_enable_loop_autostop(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chn_tx_lim[channel].loop_stop_en_chn = enable; @@ -331,6 +339,7 @@ static inline void rmt_ll_tx_sync_group_remove_channels(rmt_dev_t *dev, uint32_t * @param level IDLE level (1 => high, 0 => low) * @param enable True to fix the IDLE level, otherwise the IDLE level is determined by EOF encoder */ +__attribute__((always_inline)) static inline void rmt_ll_tx_fix_idle_level(rmt_dev_t *dev, uint32_t channel, uint8_t level, bool enable) { dev->chnconf0[channel].idle_out_en_chn = enable; @@ -471,6 +480,7 @@ static inline void rmt_ll_rx_enable_dma(rmt_dev_t *dev, uint32_t channel, bool e * @param channel RMT RX channel number * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_rx_enable(rmt_dev_t *dev, uint32_t channel, bool enable) { dev->chmconf[channel].conf1.rx_en_chm = enable; @@ -509,6 +519,7 @@ static inline void rmt_ll_rx_set_idle_thres(rmt_dev_t *dev, uint32_t channel, ui * @param channel RMT RX channel number * @param owner Memory owner */ +__attribute__((always_inline)) static inline void rmt_ll_rx_set_mem_owner(rmt_dev_t *dev, uint32_t channel, rmt_ll_mem_owner_t owner) { dev->chmconf[channel].conf1.mem_owner_chm = owner; @@ -545,6 +556,7 @@ static inline void rmt_ll_rx_set_filter_thres(rmt_dev_t *dev, uint32_t channel, * @param channel RMT RX channel number * @return writer offset */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_memory_writer_offset(rmt_dev_t *dev, uint32_t channel) { return dev->chmstatus[channel].mem_waddr_ex_chm - (channel + 4) * 48; @@ -622,6 +634,7 @@ static inline void rmt_ll_rx_enable_wrap(rmt_dev_t *dev, uint32_t channel, bool * @param mask Event mask * @param enable True to enable, False to disable */ +__attribute__((always_inline)) static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable) { if (enable) { @@ -637,6 +650,7 @@ static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool e * @param dev Peripheral instance address * @param mask Interupt status mask */ +__attribute__((always_inline)) static inline void rmt_ll_clear_interrupt_status(rmt_dev_t *dev, uint32_t mask) { dev->int_clr.val = mask; @@ -660,6 +674,7 @@ static inline volatile void *rmt_ll_get_interrupt_status_reg(rmt_dev_t *dev) * @param channel RMT TX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_tx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_TX_MASK(channel); @@ -696,6 +711,7 @@ static inline uint32_t rmt_ll_rx_get_interrupt_status_raw(rmt_dev_t *dev, uint32 * @param channel RMT RX channel number * @return Interrupt status */ +__attribute__((always_inline)) static inline uint32_t rmt_ll_rx_get_interrupt_status(rmt_dev_t *dev, uint32_t channel) { return dev->int_st.val & RMT_LL_EVENT_RX_MASK(channel);