From 2ec04b57de4d89a19c49dbabb801642e2eea9c6e Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Mon, 8 Feb 2021 09:57:36 +1100 Subject: [PATCH] soc esp32: Removes parentheses from RTC_MEM_xyz macros that expand directly to single numbers Not necessary in these cases, and prevents parens from expanding into the assembly code such as added in 562ab01046f05ad12af40eb8015311486cd8cc91 - a pattern which is accepted by GCC assembler but illegal syntax for LLVM assembler. As reported https://github.com/espressif/llvm-project/issues/35#issuecomment-726853574 --- .../soc/esp32/include/soc/rtc_cntl_reg.h | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/components/soc/esp32/include/soc/rtc_cntl_reg.h b/components/soc/esp32/include/soc/rtc_cntl_reg.h index 825193a3f2..96a867b31c 100644 --- a/components/soc/esp32/include/soc/rtc_cntl_reg.h +++ b/components/soc/esp32/include/soc/rtc_cntl_reg.h @@ -2044,23 +2044,23 @@ #define RTC_MEM_CRC_FINISH (BIT(31)) #define RTC_MEM_CRC_FINISH_M (BIT(31)) #define RTC_MEM_CRC_FINISH_V 0x1 -#define RTC_MEM_CRC_FINISH_S (31) +#define RTC_MEM_CRC_FINISH_S 31 #define RTC_MEM_CRC_LEN (0x7ff) #define RTC_MEM_CRC_LEN_M ((RTC_MEM_CRC_LEN_V)<<(RTC_MEM_CRC_LEN_S)) -#define RTC_MEM_CRC_LEN_V (0x7ff) -#define RTC_MEM_CRC_LEN_S (20) -#define RTC_MEM_CRC_ADDR (0x7ff) +#define RTC_MEM_CRC_LEN_V 0x7ff +#define RTC_MEM_CRC_LEN_S 20 +#define RTC_MEM_CRC_ADDR 0x7ff #define RTC_MEM_CRC_ADDR_M ((RTC_MEM_CRC_ADDR_V)<<(RTC_MEM_CRC_ADDR_S)) -#define RTC_MEM_CRC_ADDR_V (0x7ff) -#define RTC_MEM_CRC_ADDR_S (9) +#define RTC_MEM_CRC_ADDR_V 0x7ff +#define RTC_MEM_CRC_ADDR_S 9 #define RTC_MEM_CRC_START (BIT(8)) #define RTC_MEM_CRC_START_M (BIT(8)) #define RTC_MEM_CRC_START_V 0x1 -#define RTC_MEM_CRC_START_S (8) -#define RTC_MEM_PID_CONF (0xff) -#define RTC_MEM_PID_CONF_M (0xff) -#define RTC_MEM_PID_CONF_V (0xff) -#define RTC_MEM_PID_CONF_S (0) +#define RTC_MEM_CRC_START_S 8 +#define RTC_MEM_PID_CONF 0xff +#define RTC_MEM_PID_CONF_M 0xff +#define RTC_MEM_PID_CONF_V 0xff +#define RTC_MEM_PID_CONF_S 0 #define RTC_MEM_CRC_RES (DR_REG_RTCCNTL_BASE + 0x41 * 4)