From a2eed7cba69e540b26b2b3cc4ecc521dc663172c Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Tue, 7 Jul 2020 14:54:20 +1000 Subject: [PATCH] esp32s2: Always use eFuse config for WP pin No reason to override just this pin in software. --- components/esp32s2/Kconfig | 16 ---------------- components/esp32s2/spiram_psram.c | 8 -------- 2 files changed, 24 deletions(-) diff --git a/components/esp32s2/Kconfig b/components/esp32s2/Kconfig index 5d8ea90717..a252a81922 100644 --- a/components/esp32s2/Kconfig +++ b/components/esp32s2/Kconfig @@ -182,22 +182,6 @@ menu "ESP32S2-specific" help The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design. endmenu - config SPIRAM_SPIWP_SD3_PIN - int "SPI PSRAM WP(SD3) Pin when customising pins via eFuse (read help)" - depends on ESPTOOLPY_FLASHMODE_DIO || ESPTOOLPY_FLASHMODE_DOUT - range 0 33 - default 28 - help - This value is ignored unless flash mode is set to DIO or DOUT and the SPI flash pins have been - overriden by setting the eFuses SPI_PAD_CONFIG_xxx. - - Different from esp32 chip, on esp32s2, the WP pin would also be defined in efuse. This value would only - be used if the WP pin recorded in efuse SPI_PAD_CONFIG_xxx is invalid. - - When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set as the value configured in - bootloader. - - config SPIRAM_FETCH_INSTRUCTIONS bool "Cache fetch instructions from SPI RAM" default n diff --git a/components/esp32s2/spiram_psram.c b/components/esp32s2/spiram_psram.c index 6a91cbffbb..59baf217be 100644 --- a/components/esp32s2/spiram_psram.c +++ b/components/esp32s2/spiram_psram.c @@ -375,15 +375,7 @@ static void IRAM_ATTR psram_gpio_config(psram_cache_mode_t mode) psram_io.psram_spihd_sd2_io = EFUSE_SPICONFIG_RET_SPIHD(spiconfig); psram_io.psram_spiwp_sd3_io = esp_rom_efuse_get_flash_wp_gpio(); } - - #if CONFIG_ESPTOOLPY_FLASHMODE_QIO || CONFIG_FLASHMODE_QOUT - // WP/HD already configured in bootloader. - psram_io.psram_spiwp_sd3_io = (psram_io.psram_spiwp_sd3_io <= MAX_PAD_GPIO_NUM ? psram_io.psram_spiwp_sd3_io : CONFIG_BOOTLOADER_SPI_WP_PIN); - #else - - psram_io.psram_spiwp_sd3_io = (psram_io.psram_spiwp_sd3_io <= MAX_PAD_GPIO_NUM ? psram_io.psram_spiwp_sd3_io : CONFIG_SPIRAM_SPIWP_SD3_PIN); esp_rom_spiflash_select_qio_pins(psram_io.psram_spiwp_sd3_io, spiconfig); - #endif } psram_size_t psram_get_size(void)