From affb956da58f77559b1d0ee7b1793875b326b61b Mon Sep 17 00:00:00 2001 From: songruojing Date: Tue, 12 Oct 2021 18:12:40 +0800 Subject: [PATCH] esp_system: fix the bug that some peripheral clocks are being disabled during cpu reset for esp32s2 --- components/esp32/clk.c | 4 ++-- components/esp32s2/clk.c | 7 ++++--- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/components/esp32/clk.c b/components/esp32/clk.c index 1790be4e83..336bf674d2 100644 --- a/components/esp32/clk.c +++ b/components/esp32/clk.c @@ -263,9 +263,9 @@ void esp_perip_clk_init(void) /* For reason that only reset CPU, do not disable the clocks * that have been enabled before reset. */ - if ((rst_reas[0] >= TGWDT_CPU_RESET && rst_reas[0] <= RTCWDT_CPU_RESET) + if ((rst_reas[0] == TGWDT_CPU_RESET || rst_reas[0] == SW_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) #if !CONFIG_FREERTOS_UNICORE - || (rst_reas[1] >= TGWDT_CPU_RESET && rst_reas[1] <= RTCWDT_CPU_RESET) + || (rst_reas[1] == TGWDT_CPU_RESET || rst_reas[1] == SW_CPU_RESET || rst_reas[1] == RTCWDT_CPU_RESET) #endif ) { common_perip_clk = ~DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG); diff --git a/components/esp32s2/clk.c b/components/esp32s2/clk.c index 67409fec12..760f1a7ed6 100644 --- a/components/esp32s2/clk.c +++ b/components/esp32s2/clk.c @@ -229,9 +229,10 @@ void esp_perip_clk_init(void) /* For reason that only reset CPU, do not disable the clocks * that have been enabled before reset. */ - if (rst_reas[0] >= TG0WDT_CPU_RESET && - rst_reas[0] <= TG0WDT_CPU_RESET && - rst_reas[0] != RTCWDT_BROWN_OUT_RESET) { + if (rst_reas[0] == TG0WDT_CPU_RESET || + rst_reas[0] == RTC_SW_CPU_RESET || + rst_reas[0] == RTCWDT_CPU_RESET || + rst_reas[0] == TG1WDT_CPU_RESET) { common_perip_clk = ~DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG); hwcrypto_perip_clk = ~DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN1_REG); wifi_bt_sdio_clk = ~DPORT_READ_PERI_REG(DPORT_WIFI_CLK_EN_REG);