Merge branch 'bugfix/spiflash_erase_block' into 'master'

SPI flash: Block erase size 64KB not 32KB

Reverts changes made in 9f9d92b2df

See merge request !298

components/esp32/include/rom/spi_flash.h

@@ -384,8 +384,8 @@ SpiFlashOpResult SPIParamCfg(uint32_t deviceId, uint32_t chip_size, uint32_t blo
 SpiFlashOpResult SPIEraseChip(void);
 
 /**
-  * @brief Erase a 32KB block of flash
-  *        Uses SPI flash command 52h.
+  * @brief Erase a 64KB block of flash
+  *        Uses SPI flash command D8H.
   *        Please do not call this function in SDK.
   *
   * @param  uint32_t block_num : Which block to erase.
@@ -398,6 +398,7 @@ SpiFlashOpResult SPIEraseBlock(uint32_t block_num);
 
 /**
   * @brief Erase a sector of flash.
+  *        Uses SPI flash command 20H.
   *        Please do not call this function in SDK.
   *
   * @param  uint32_t sector_num : Which sector to erase.
@@ -412,12 +413,6 @@ SpiFlashOpResult SPIEraseSector(uint32_t sector_num);
   * @brief Erase some sectors.
   *        Please do not call this function in SDK.
   *
-  * @note If calling this function, first set
-  *       g_rom_flashchip.block_size = 32768; or call SPIParamCfg()
-  *       with appropriate parameters. This is due to a ROM bug, the
-  *       block erase command in use is a 32KB erase but after reset
-  *       the block_size field is incorrectly set to 65536.
-  *
   * @param  uint32_t start_addr : Start addr to erase, should be sector aligned.
   *
   * @param  uint32_t area_len : Length to erase, should be sector aligned.

components/esp32/include/soc/spi_reg.h

@@ -69,14 +69,14 @@
 #define SPI_FLASH_PP_V  0x1
 #define SPI_FLASH_PP_S  25
 /* SPI_FLASH_SE : R/W ;bitpos:[24] ;default: 1'b0 ; */
-/*description: Sector erase enable(4KB). Sector erase operation will be triggered
+/*description: Sector erase enable. A 4KB sector is erased via SPI command 20H. Sector erase operation will be triggered
  when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
 #define SPI_FLASH_SE  (BIT(24))
 #define SPI_FLASH_SE_M  (BIT(24))
 #define SPI_FLASH_SE_V  0x1
 #define SPI_FLASH_SE_S  24
 /* SPI_FLASH_BE : R/W ;bitpos:[23] ;default: 1'b0 ; */
-/*description: Block erase enable(32KB) .  Block erase operation will be triggered
+/*description: Block erase enable. A 64KB block is erased via SPI command D8H.  Block erase operation will be triggered
  when the bit is set. The bit will be cleared once the operation done.1: enable 0: disable.*/
 #define SPI_FLASH_BE  (BIT(23))
 #define SPI_FLASH_BE_M  (BIT(23))

components/spi_flash/flash_ops.c

@@ -32,7 +32,7 @@
 #include "cache_utils.h"
 
 /* bytes erased by SPIEraseBlock() ROM function */
-#define BLOCK_ERASE_SIZE 32768
+#define BLOCK_ERASE_SIZE 65536
 
 #if CONFIG_SPI_FLASH_ENABLE_COUNTERS
 static const char* TAG = "spi_flash";