Merge branch 'feat/spi_flash_override_size' into 'master'

spi_flash: add config option to override flash size in bootloader header

See merge request espressif/esp-idf!10131

components/bootloader_support/include/bootloader_flash_config.h

@@ -28,6 +28,14 @@ extern "C" {
  */
 void bootloader_flash_update_id(void);
 
+/**
+ * @brief Update the flash size in g_rom_flashchip (global esp_rom_spiflash_chip_t structure).
+ *
+ * @param size The size to store, in bytes.
+ * @return None
+ */
+void bootloader_flash_update_size(uint32_t size);
+
 /**
  * @brief Set the flash CS setup and hold time.
  *

components/bootloader_support/include/esp_image_format.h

@@ -169,6 +169,14 @@ esp_err_t esp_image_verify_bootloader(uint32_t *length);
  */
 esp_err_t esp_image_verify_bootloader_data(esp_image_metadata_t *data);
 
+/**
+ * @brief Get the flash size of the image
+ *
+ * @param app_flash_size The value configured in the image header
+ * @return Actual size, in bytes.
+ */
+int esp_image_get_flash_size(esp_image_flash_size_t app_flash_size);
+
 
 typedef struct {
     uint32_t drom_addr;

components/bootloader_support/src/bootloader_flash_config_esp32.c

@@ -33,6 +33,11 @@ void bootloader_flash_update_id(void)
     g_rom_flashchip.device_id = bootloader_read_flash_id();
 }
 
+void bootloader_flash_update_size(uint32_t size)
+{
+    g_rom_flashchip.chip_size = size;
+}
+
 void IRAM_ATTR bootloader_flash_cs_timing_config(void)
 {
     SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M);

components/bootloader_support/src/bootloader_flash_config_esp32s2.c

@@ -36,6 +36,11 @@ void bootloader_flash_update_id()
     g_rom_flashchip.device_id = bootloader_read_flash_id();
 }
 
+void bootloader_flash_update_size(uint32_t size)
+{
+    g_rom_flashchip.chip_size = size;
+}
+
 void IRAM_ATTR bootloader_flash_cs_timing_config()
 {
     SET_PERI_REG_MASK(SPI_MEM_USER_REG(0), SPI_MEM_CS_HOLD_M | SPI_MEM_CS_SETUP_M);

components/bootloader_support/src/esp_image_format.c

@@ -850,3 +850,21 @@ static esp_err_t verify_simple_hash(bootloader_sha256_handle_t sha_handle, esp_i
     bootloader_munmap(hash);
     return ESP_OK;
 }
+
+int esp_image_get_flash_size(esp_image_flash_size_t app_flash_size)
+{
+    switch (app_flash_size) {
+    case ESP_IMAGE_FLASH_SIZE_1MB:
+        return 1 * 1024 * 1024;
+    case ESP_IMAGE_FLASH_SIZE_2MB:
+        return 2 * 1024 * 1024;
+    case ESP_IMAGE_FLASH_SIZE_4MB:
+        return 4 * 1024 * 1024;
+    case ESP_IMAGE_FLASH_SIZE_8MB:
+        return 8 * 1024 * 1024;
+    case ESP_IMAGE_FLASH_SIZE_16MB:
+        return 16 * 1024 * 1024;
+    default:
+        return 0;
+    }
+}

components/esp_system/port/cpu_start.c

@@ -386,10 +386,8 @@ void IRAM_ATTR call_start_cpu0(void)
 #endif
 
     bootloader_flash_update_id();
-#if CONFIG_IDF_TARGET_ESP32
-#if !CONFIG_SPIRAM_BOOT_INIT
     // Read the application binary image header. This will also decrypt the header if the image is encrypted.
-    esp_image_header_t fhdr = {0};
+    __attribute__((unused)) esp_image_header_t fhdr = {0};
 #ifdef CONFIG_APP_BUILD_TYPE_ELF_RAM
     fhdr.spi_mode = ESP_IMAGE_SPI_MODE_DIO;
     fhdr.spi_speed = ESP_IMAGE_SPI_SPEED_40M;
@@ -404,13 +402,24 @@ void IRAM_ATTR call_start_cpu0(void)
     memcpy(&fhdr, (void *) SOC_DROM_LOW, sizeof(fhdr));
 #endif // CONFIG_APP_BUILD_TYPE_ELF_RAM
 
+#if CONFIG_IDF_TARGET_ESP32
+#if !CONFIG_SPIRAM_BOOT_INIT
     // If psram is uninitialized, we need to improve some flash configuration.
     bootloader_flash_clock_config(&fhdr);
     bootloader_flash_gpio_config(&fhdr);
     bootloader_flash_dummy_config(&fhdr);
     bootloader_flash_cs_timing_config();
 #endif //!CONFIG_SPIRAM_BOOT_INIT
-#endif
+#endif //CONFIG_IDF_TARGET_ESP32
+
+#if CONFIG_SPI_FLASH_SIZE_OVERRIDE
+    int app_flash_size = esp_image_get_flash_size(fhdr.spi_size);
+    if (app_flash_size < 1 * 1024 * 1024) {
+        ESP_LOGE(TAG, "Invalid flash size in app image header.");
+        abort();
+    }
+    bootloader_flash_update_size(app_flash_size);
+#endif //CONFIG_SPI_FLASH_SIZE_OVERRIDE
 
 #if !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
     s_cpu_inited[0] = true;

components/spi_flash/Kconfig

@@ -140,6 +140,14 @@ menu "SPI Flash driver"
             value here ensures that cache (and non-IRAM resident interrupts) remains
             disabled for shorter duration.
 
+    config SPI_FLASH_SIZE_OVERRIDE
+        bool "Override flash size in bootloader header by ESPTOOLPY_FLASHSIZE"
+        default n
+        help
+            SPI Flash driver uses the flash size configured in bootloader header by default.
+            Enable this option to override flash size with latest ESPTOOLPY_FLASHSIZE value from
+            the app header if the size in the bootloader header is incorrect.
+
     menu "Auto-detect flash chips"
 
         config SPI_FLASH_SUPPORT_ISSI_CHIP