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Merge branch 'feat/c5_spi_support' into 'master' 

feat(spi): bring up c5 spi master/slave/hd driver

Closes IDF-8698, IDF-8699, and IDF-8700

See merge request espressif/esp-idf!29133
pull/12944/merge
Wan Lei 2024-03-08 09:41:21 +08:00
rodzic 8e863fa9a8 8625ed252e
commit 966f47f5c1
77 zmienionych plików z 773 dodań i 957 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

5
components/driver/test_apps/components/test_driver_utils/test_spi_utils.c
Wyświetl plik

@ -7,6 +7,7 @@
#include "driver/spi_slave.h"
#include "esp_log.h"
#include "driver/gpio.h"
#include "esp_private/gpio.h"
#include "hal/gpio_hal.h"
#include "esp_rom_gpio.h"
@ -220,13 +221,13 @@ void master_free_device_bus(spi_device_handle_t spi)
void spitest_gpio_output_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
{
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], func);
gpio_func_sel(gpio_num, func);
esp_rom_gpio_connect_out_signal(gpio_num, signal_idx, 0, 0);
}
void spitest_gpio_input_sel(uint32_t gpio_num, int func, uint32_t signal_idx)
{
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], func);
gpio_func_sel(gpio_num, func);
esp_rom_gpio_connect_in_signal(gpio_num, signal_idx, 0);
}

21
components/esp_driver_spi/src/gpspi/spi_common.c
Wyświetl plik

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -15,8 +15,9 @@
#include "esp_heap_caps.h"
#include "soc/spi_periph.h"
#include "soc/ext_mem_defs.h"
#include "driver/gpio.h"
#include "driver/spi_master.h"
#include "driver/gpio.h"
#include "esp_private/gpio.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/spi_common_internal.h"
#include "esp_private/spi_share_hw_ctrl.h"
@ -645,7 +646,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->mosi_io_num]);
#endif
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], FUNC_GPIO);
gpio_func_sel(bus_config->mosi_io_num, FUNC_GPIO);
}
if (bus_config->miso_io_num >= 0) {
if (miso_need_output || (temp_flag & SPICOMMON_BUSFLAG_DUAL)) {
@ -658,7 +659,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->miso_io_num]);
#endif
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->miso_io_num], FUNC_GPIO);
gpio_func_sel(bus_config->miso_io_num, FUNC_GPIO);
}
if (bus_config->quadwp_io_num >= 0) {
gpio_set_direction(bus_config->quadwp_io_num, GPIO_MODE_INPUT_OUTPUT);
@ -667,7 +668,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num]);
#endif
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], FUNC_GPIO);
gpio_func_sel(bus_config->quadwp_io_num, FUNC_GPIO);
}
if (bus_config->quadhd_io_num >= 0) {
gpio_set_direction(bus_config->quadhd_io_num, GPIO_MODE_INPUT_OUTPUT);
@ -676,7 +677,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num]);
#endif
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], FUNC_GPIO);
gpio_func_sel(bus_config->quadhd_io_num, FUNC_GPIO);
}
if (bus_config->sclk_io_num >= 0) {
if (sclk_need_output) {
@ -689,7 +690,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[bus_config->sclk_io_num]);
#endif
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], FUNC_GPIO);
gpio_func_sel(bus_config->sclk_io_num, FUNC_GPIO);
}
#if SOC_SPI_SUPPORT_OCT
if ((flags & SPICOMMON_BUSFLAG_OCTAL) == SPICOMMON_BUSFLAG_OCTAL) {
@ -707,7 +708,7 @@ esp_err_t spicommon_bus_initialize_io(spi_host_device_t host, const spi_bus_conf
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[io_nums[i]]);
#endif
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[io_nums[i]], FUNC_GPIO);
gpio_func_sel(io_nums[i], FUNC_GPIO);
}
}
}
@ -755,8 +756,10 @@ void spicommon_cs_initialize(spi_host_device_t host, int cs_io_num, int cs_num,
if (cs_num == 0) {
esp_rom_gpio_connect_in_signal(cs_io_num, spi_periph_signal[host].spics_in, false);
}
#if CONFIG_IDF_TARGET_ESP32S2
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[cs_io_num]);
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[cs_io_num], FUNC_GPIO);
#endif
gpio_func_sel(cs_io_num, FUNC_GPIO);
}
}

10
components/esp_driver_spi/test_apps/.build-test-rules.yml
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@ -3,8 +3,10 @@
- esp_mm # for cache
- esp_driver_spi
- esp_driver_gpio
depends_filepatterns:
- components/driver/test_apps/components/test_driver_utils/**/*
components/esp_driver_spi/test_apps/spi/master:
components/esp_driver_spi/test_apps/master:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
@ -13,7 +15,7 @@ components/esp_driver_spi/test_apps/spi/master:
reason: not supported # TODO: IDF-8942
<<: *spi_depends_default
components/esp_driver_spi/test_apps/spi/param:
components/esp_driver_spi/test_apps/param:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
@ -22,7 +24,7 @@ components/esp_driver_spi/test_apps/spi/param:
reason: not supported # TODO: IDF-8942
<<: *spi_depends_default
components/esp_driver_spi/test_apps/spi/slave:
components/esp_driver_spi/test_apps/slave:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
disable_test:
@ -31,7 +33,7 @@ components/esp_driver_spi/test_apps/spi/slave:
reason: not supported # TODO: IDF-8942
<<: *spi_depends_default
components/esp_driver_spi/test_apps/spi/slave_hd:
components/esp_driver_spi/test_apps/slave_hd:
disable:
- if: SOC_GPSPI_SUPPORTED != 1
- if: SOC_SPI_SUPPORT_SLAVE_HD_VER2 != 1

4
components/esp_driver_spi/test_apps/components/spi_bench_mark/CMakeLists.txt 100644
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@ -0,0 +1,4 @@
idf_component_register(
INCLUDE_DIRS "include"
)

86
components/esp_driver_spi/test_apps/components/spi_bench_mark/include/spi_performance.h 100644
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@ -0,0 +1,86 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#if CONFIG_IDF_TARGET_ESP32
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 16*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#if !CONFIG_FREERTOS_SMP // IDF-5223
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 34 // TODO: IDF-5180
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30 // TODO: IDF-5180
#else
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 50
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 50
#endif
#elif CONFIG_IDF_TARGET_ESP32S2
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
#elif CONFIG_IDF_TARGET_ESP32S3
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
#elif CONFIG_IDF_TARGET_ESP32C2
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 23
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 18
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 47
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 42
#elif CONFIG_IDF_TARGET_ESP32C3
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#if !CONFIG_FREERTOS_SMP // IDF-5223
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
#else
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 60
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 60
#endif
#elif CONFIG_IDF_TARGET_ESP32C6
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 34
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#elif CONFIG_IDF_TARGET_ESP32H2
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 25
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 61
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 54
#elif CONFIG_IDF_TARGET_ESP32P4
//TODO: IDF-8313 update after chips back and PLL setup
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 10*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 1000
#elif CONFIG_IDF_TARGET_ESP32C5
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 27
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 16
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 24
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 13
#else
#endif

5
components/esp_driver_spi/test_apps/spi/master/CMakeLists.txt → components/esp_driver_spi/test_apps/master/CMakeLists.txt
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@ -4,11 +4,6 @@ cmake_minimum_required(VERSION 3.16)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
set(EXTRA_COMPONENT_DIRS
"$ENV{IDF_PATH}/tools/unit-test-app/components"
"$ENV{IDF_PATH}/components/driver/test_apps/components"
)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(spi_master_test)

0
components/esp_driver_spi/test_apps/spi/master/README.md → components/esp_driver_spi/test_apps/master/README.md
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3
components/esp_driver_spi/test_apps/spi/master/main/CMakeLists.txt → components/esp_driver_spi/test_apps/master/main/CMakeLists.txt
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@ -6,11 +6,10 @@ set(srcs
"test_spi_bus_lock.c"
)
# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES test_utils esp_driver_spi test_driver_utils spi_flash
PRIV_REQUIRES esp_driver_spi spi_flash
WHOLE_ARCHIVE
)

7
components/esp_driver_spi/test_apps/master/main/idf_component.yml 100644
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@ -0,0 +1,7 @@
dependencies:
test_utils:
path: ${IDF_PATH}/tools/unit-test-app/components/test_utils
test_driver_utils:
path: ${IDF_PATH}/components/driver/test_apps/components/test_driver_utils
spi_bench_mark:
path: ${IDF_PATH}/components/esp_driver_spi/test_apps/components/spi_bench_mark

0
components/esp_driver_spi/test_apps/spi/master/main/test_app_main.c → components/esp_driver_spi/test_apps/master/main/test_app_main.c
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0
components/esp_driver_spi/test_apps/spi/master/main/test_spi_bus_lock.c → components/esp_driver_spi/test_apps/master/main/test_spi_bus_lock.c
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13
components/esp_driver_spi/test_apps/spi/master/main/test_spi_master.c → components/esp_driver_spi/test_apps/master/main/test_spi_master.c
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@ -22,6 +22,7 @@
#include "esp_log.h"
#include "test_utils.h"
#include "test_spi_utils.h"
#include "spi_performance.h"
const static char TAG[] = "test_spi";
@ -1416,7 +1417,8 @@ TEST_CASE("spi_speed", "[spi]")
ESP_LOGI(TAG, "%.2lf", GET_US_BY_CCOUNT(t_flight_sorted[i]));
}
#ifndef CONFIG_SPIRAM
TEST_PERFORMANCE_LESS_THAN(SPI_PER_TRANS_NO_POLLING, "%d us", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
printf("[Performance][%s]: %d us\n", "SPI_PER_TRANS_NO_POLLING", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
TEST_ASSERT_LESS_THAN_INT(IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING, (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
#endif
//acquire the bus to send polling transactions faster
@ -1433,7 +1435,8 @@ TEST_CASE("spi_speed", "[spi]")
ESP_LOGI(TAG, "%.2lf", GET_US_BY_CCOUNT(t_flight_sorted[i]));
}
#ifndef CONFIG_SPIRAM
TEST_PERFORMANCE_LESS_THAN(SPI_PER_TRANS_POLLING, "%d us", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
printf("[Performance][%s]: %d us\n", "SPI_PER_TRANS_POLLING", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
TEST_ASSERT_LESS_THAN_INT(IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING, (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
#endif
//release the bus
@ -1452,7 +1455,8 @@ TEST_CASE("spi_speed", "[spi]")
ESP_LOGI(TAG, "%.2lf", GET_US_BY_CCOUNT(t_flight_sorted[i]));
}
#ifndef CONFIG_SPIRAM
TEST_PERFORMANCE_LESS_THAN(SPI_PER_TRANS_NO_POLLING_NO_DMA, "%d us", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
printf("[Performance][%s]: %d us\n", "SPI_PER_TRANS_NO_POLLING_NO_DMA", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
TEST_ASSERT_LESS_THAN_INT(IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA, (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
#endif
//acquire the bus to send polling transactions faster
@ -1469,7 +1473,8 @@ TEST_CASE("spi_speed", "[spi]")
ESP_LOGI(TAG, "%.2lf", GET_US_BY_CCOUNT(t_flight_sorted[i]));
}
#ifndef CONFIG_SPIRAM
TEST_PERFORMANCE_LESS_THAN(SPI_PER_TRANS_POLLING_NO_DMA, "%d us", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
printf("[Performance][%s]: %d us\n", "SPI_PER_TRANS_POLLING_NO_DMA", (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
TEST_ASSERT_LESS_THAN_INT(IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA, (int)GET_US_BY_CCOUNT(t_flight_sorted[(TEST_TIMES + 1) / 2]));
#endif
//release the bus

0
components/esp_driver_spi/test_apps/spi/master/main/test_spi_sio.c → components/esp_driver_spi/test_apps/master/main/test_spi_sio.c
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0
components/esp_driver_spi/test_apps/spi/master/partition_table_esp32_flash.csv → components/esp_driver_spi/test_apps/master/partition_table_esp32_flash.csv
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1
components/esp_driver_spi/test_apps/spi/master/pytest_spi_master.py → components/esp_driver_spi/test_apps/master/pytest_spi_master.py
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@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import pytest

0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.ci.defaults → components/esp_driver_spi/test_apps/master/sdkconfig.ci.defaults
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.ci.freertos_compliance → components/esp_driver_spi/test_apps/master/sdkconfig.ci.freertos_compliance
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.ci.freertos_flash → components/esp_driver_spi/test_apps/master/sdkconfig.ci.freertos_flash
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.ci.iram_safe → components/esp_driver_spi/test_apps/master/sdkconfig.ci.iram_safe
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.ci.release → components/esp_driver_spi/test_apps/master/sdkconfig.ci.release
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.defaults → components/esp_driver_spi/test_apps/master/sdkconfig.defaults
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.defaults.esp32 → components/esp_driver_spi/test_apps/master/sdkconfig.defaults.esp32
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.defaults.esp32s2 → components/esp_driver_spi/test_apps/master/sdkconfig.defaults.esp32s2
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0
components/esp_driver_spi/test_apps/spi/master/sdkconfig.defaults.esp32s3 → components/esp_driver_spi/test_apps/master/sdkconfig.defaults.esp32s3
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5
components/esp_driver_spi/test_apps/spi/param/CMakeLists.txt → components/esp_driver_spi/test_apps/param/CMakeLists.txt
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@ -4,10 +4,5 @@ cmake_minimum_required(VERSION 3.16)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
set(EXTRA_COMPONENT_DIRS
"$ENV{IDF_PATH}/tools/unit-test-app/components"
"$ENV{IDF_PATH}/components/driver/test_apps/components"
)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(spi_param_test)

0
components/esp_driver_spi/test_apps/spi/param/README.md → components/esp_driver_spi/test_apps/param/README.md
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2
components/esp_driver_spi/test_apps/spi/param/main/CMakeLists.txt → components/esp_driver_spi/test_apps/param/main/CMakeLists.txt
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@ -9,6 +9,6 @@ set(srcs
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES test_utils driver test_driver_utils esp_serial_slave_link
PRIV_REQUIRES esp_driver_spi
WHOLE_ARCHIVE
)

9
components/esp_driver_spi/test_apps/param/main/idf_component.yml 100644
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@ -0,0 +1,9 @@
dependencies:
test_utils:
path: ${IDF_PATH}/tools/unit-test-app/components/test_utils
test_driver_utils:
path: ${IDF_PATH}/components/driver/test_apps/components/test_driver_utils
spi_bench_mark:
path: ${IDF_PATH}/components/esp_driver_spi/test_apps/components/spi_bench_mark
esp_serial_slave_link:
path: ${IDF_PATH}/components/driver/test_apps/components/esp_serial_slave_link

0
components/esp_driver_spi/test_apps/spi/param/main/test_app_main.c → components/esp_driver_spi/test_apps/param/main/test_app_main.c
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1
components/esp_driver_spi/test_apps/spi/param/main/test_spi_param.c → components/esp_driver_spi/test_apps/param/main/test_spi_param.c
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@ -11,6 +11,7 @@
#include "test_spi_utils.h"
#include "driver/spi_master.h"
#include "driver/spi_slave.h"
#include "spi_performance.h"
#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
#include "esp_serial_slave_link/essl_spi.h"

1
components/esp_driver_spi/test_apps/spi/param/pytest_spi_param.py → components/esp_driver_spi/test_apps/param/pytest_spi_param.py
Wyświetl plik

@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import pytest

0
components/esp_driver_spi/test_apps/spi/param/sdkconfig.defaults → components/esp_driver_spi/test_apps/param/sdkconfig.defaults
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5
components/esp_driver_spi/test_apps/spi/slave/CMakeLists.txt → components/esp_driver_spi/test_apps/slave/CMakeLists.txt
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@ -4,11 +4,6 @@ cmake_minimum_required(VERSION 3.16)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
set(EXTRA_COMPONENT_DIRS
"$ENV{IDF_PATH}/tools/unit-test-app/components"
"$ENV{IDF_PATH}/components/driver/test_apps/components"
)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(spi_slave_test)

0
components/esp_driver_spi/test_apps/spi/slave/README.md → components/esp_driver_spi/test_apps/slave/README.md
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2
components/esp_driver_spi/test_apps/spi/slave/main/CMakeLists.txt → components/esp_driver_spi/test_apps/slave/main/CMakeLists.txt
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@ -10,6 +10,6 @@ set(srcs
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES test_utils driver test_driver_utils spi_flash
PRIV_REQUIRES esp_driver_spi spi_flash
WHOLE_ARCHIVE
)

5
components/esp_driver_spi/test_apps/slave/main/idf_component.yml 100644
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@ -0,0 +1,5 @@
dependencies:
test_utils:
path: ${IDF_PATH}/tools/unit-test-app/components/test_utils
test_driver_utils:
path: ${IDF_PATH}/components/driver/test_apps/components/test_driver_utils

0
components/esp_driver_spi/test_apps/spi/slave/main/test_app_main.c → components/esp_driver_spi/test_apps/slave/main/test_app_main.c
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0
components/esp_driver_spi/test_apps/spi/slave/main/test_spi_slave.c → components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c
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0
components/esp_driver_spi/test_apps/spi/slave/main/test_spi_slave_queue.c → components/esp_driver_spi/test_apps/slave/main/test_spi_slave_queue.c
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1
components/esp_driver_spi/test_apps/spi/slave/pytest_spi_slave.py → components/esp_driver_spi/test_apps/slave/pytest_spi_slave.py
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@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import pytest

0
components/esp_driver_spi/test_apps/spi/slave/sdkconfig.ci.defaults → components/esp_driver_spi/test_apps/slave/sdkconfig.ci.defaults
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0
components/esp_driver_spi/test_apps/spi/slave/sdkconfig.ci.iram_safe → components/esp_driver_spi/test_apps/slave/sdkconfig.ci.iram_safe
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0
components/esp_driver_spi/test_apps/spi/slave/sdkconfig.defaults → components/esp_driver_spi/test_apps/slave/sdkconfig.defaults
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5
components/esp_driver_spi/test_apps/spi/slave_hd/CMakeLists.txt → components/esp_driver_spi/test_apps/slave_hd/CMakeLists.txt
Wyświetl plik

@ -4,10 +4,5 @@ cmake_minimum_required(VERSION 3.16)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
set(EXTRA_COMPONENT_DIRS
"$ENV{IDF_PATH}/tools/unit-test-app/components"
"$ENV{IDF_PATH}/components/driver/test_apps/components"
)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(spi_slave_hd_test)

0
components/esp_driver_spi/test_apps/spi/slave_hd/README.md → components/esp_driver_spi/test_apps/slave_hd/README.md
Wyświetl plik

2
components/esp_driver_spi/test_apps/spi/slave_hd/main/CMakeLists.txt → components/esp_driver_spi/test_apps/slave_hd/main/CMakeLists.txt
Wyświetl plik

@ -9,6 +9,6 @@ set(srcs
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(
SRCS ${srcs}
PRIV_REQUIRES test_utils driver test_driver_utils esp_serial_slave_link sdmmc
PRIV_REQUIRES esp_driver_spi
WHOLE_ARCHIVE
)

7
components/esp_driver_spi/test_apps/slave_hd/main/idf_component.yml 100644
Wyświetl plik

@ -0,0 +1,7 @@
dependencies:
test_utils:
path: ${IDF_PATH}/tools/unit-test-app/components/test_utils
test_driver_utils:
path: ${IDF_PATH}/components/driver/test_apps/components/test_driver_utils
esp_serial_slave_link:
path: ${IDF_PATH}/components/driver/test_apps/components/esp_serial_slave_link

0
components/esp_driver_spi/test_apps/spi/slave_hd/main/test_app_main.c → components/esp_driver_spi/test_apps/slave_hd/main/test_app_main.c
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0
components/esp_driver_spi/test_apps/spi/slave_hd/main/test_spi_slave_hd.c → components/esp_driver_spi/test_apps/slave_hd/main/test_spi_slave_hd.c
Wyświetl plik

1
components/esp_driver_spi/test_apps/spi/slave_hd/pytest_spi_slave_hd.py → components/esp_driver_spi/test_apps/slave_hd/pytest_spi_slave_hd.py
Wyświetl plik

@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0
import pytest

0
components/esp_driver_spi/test_apps/spi/slave_hd/sdkconfig.defaults → components/esp_driver_spi/test_apps/slave_hd/sdkconfig.defaults
Wyświetl plik

1052
components/hal/esp32c5/include/hal/spi_ll.h
Wyświetl plik

Plik diff jest za duży Load Diff

10
components/hal/esp32c6/include/hal/spi_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -307,7 +307,7 @@ static inline void spi_ll_slave_reset(spi_dev_t *hw)
/**
* Reset SPI CPU TX FIFO
*
* On ESP32C3, this function is not seperated
* On ESP32C6, this function is not seperated
*
* @param hw Beginning address of the peripheral registers.
*/
@ -320,7 +320,7 @@ static inline void spi_ll_cpu_tx_fifo_reset(spi_dev_t *hw)
/**
* Reset SPI CPU RX FIFO
*
* On ESP32C3, this function is not seperated
* On ESP32C6, this function is not seperated
*
* @param hw Beginning address of the peripheral registers.
*/
@ -903,7 +903,7 @@ static inline void spi_ll_set_miso_bitlen(spi_dev_t *hw, size_t bitlen)
*/
static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
{
//This is not used in esp32c3
//This is not used in esp32c6
}
/**
@ -914,7 +914,7 @@ static inline void spi_ll_slave_set_rx_bitlen(spi_dev_t *hw, size_t bitlen)
*/
static inline void spi_ll_slave_set_tx_bitlen(spi_dev_t *hw, size_t bitlen)
{
//This is not used in esp32c3
//This is not used in esp32c6
}
/**

11
components/idf_test/include/esp32/idf_performance_target.h
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@ -28,17 +28,6 @@
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 90000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 1900000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 16*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#if !CONFIG_FREERTOS_SMP // IDF-5223
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 34 // TODO: IDF-5180
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30 // TODO: IDF-5180
#else
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 50
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 50
#endif
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140

6
components/idf_test/include/esp32c2/idf_performance_target.h
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@ -27,12 +27,6 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 32000
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 49000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 23
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 18
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 47
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 42
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140

17
components/idf_test/include/esp32c3/idf_performance_target.h
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@ -20,23 +20,6 @@
#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 45000
#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 670000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#if !CONFIG_FREERTOS_SMP // IDF-5223
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#else
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 17
#endif
#if !CONFIG_FREERTOS_SMP // IDF-5223
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
#else
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 60
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 60
#endif
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140

0
components/idf_test/include/esp32c5/.gitkeep
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6
components/idf_test/include/esp32c6/idf_performance_target.h
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@ -17,12 +17,6 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 18000
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 27000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 34
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 17
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_NO_FILTER 10
#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_2 10
#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_4 10

6
components/idf_test/include/esp32h2/idf_performance_target.h
Wyświetl plik

@ -28,12 +28,6 @@
#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 44000
#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 67000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 25
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 61
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 54
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140

7
components/idf_test/include/esp32p4/idf_performance_target.h
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@ -4,13 +4,6 @@
* SPDX-License-Identifier: Apache-2.0
*/
//TODO: IDF-8313 update after chips back and PLL setup
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 10*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 1000
/* Spinlock performance on esp32p4 is slower. May need to adjust these values once IDF-7898 is fixed */
#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP 380
#define IDF_PERFORMANCE_MAX_FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE 135

6
components/idf_test/include/esp32s2/idf_performance_target.h
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@ -23,12 +23,6 @@
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 62000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 1850000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_NO_FILTER 3
#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_2 3
#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_4 3

6
components/idf_test/include/esp32s3/idf_performance_target.h
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@ -21,12 +21,6 @@
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 80000
#define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 2500000
#define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 40*1000*1000
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 32
#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 30
// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140

2
components/soc/esp32c2/spi_periph.c
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

2
components/soc/esp32c3/spi_periph.c
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

40
components/soc/esp32c5/beta3/include/soc/Kconfig.soc_caps.in
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@ -39,6 +39,10 @@ config SOC_RTC_MEM_SUPPORTED
bool
default y
config SOC_GPSPI_SUPPORTED
bool
default y
config SOC_I2C_SUPPORTED
bool
default y
@ -279,6 +283,42 @@ config SOC_SPI_MAX_CS_NUM
int
default 6
config SOC_SPI_MAXIMUM_BUFFER_SIZE
int
default 64
config SOC_SPI_SUPPORT_DDRCLK
bool
default y
config SOC_SPI_SLAVE_SUPPORT_SEG_TRANS
bool
default y
config SOC_SPI_SUPPORT_CD_SIG
bool
default y
config SOC_SPI_SUPPORT_CONTINUOUS_TRANS
bool
default y
config SOC_SPI_SUPPORT_SLAVE_HD_VER2
bool
default y
config SOC_SPI_SUPPORT_CLK_XTAL
bool
default y
config SOC_MEMSPI_IS_INDEPENDENT
bool
default y
config SOC_SPI_MAX_PRE_DIVIDER
int
default 256
config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
bool
default y

8
components/soc/esp32c5/beta3/include/soc/clk_tree_defs.h
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@ -359,16 +359,16 @@ typedef enum { // TODO: [ESP32C5] IDF-8695 (inherit from C6)
/**
* @brief Array initializer for all supported clock sources of SPI
*/
#define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F80M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
#define SOC_SPI_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_RC_FAST}
/**
* @brief Type of SPI clock source.
*/
typedef enum { // TODO: [ESP32C5] IDF-8698, IDF-8699 (inherit from C6)
SPI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M, /*!< Select PLL_80M as SPI source clock */
SPI_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M, /*!< Select PLL_80M as SPI source clock */
typedef enum {
SPI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as SPI source clock */
SPI_CLK_SRC_PLL_F160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_160M as SPI source clock */
SPI_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as SPI source clock */
SPI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_160M as SPI source clock */
} soc_periph_spi_clk_src_t;
//////////////////////////////////////////////////SDM//////////////////////////////////////////////////////////////

22
components/soc/esp32c5/beta3/include/soc/soc_caps.h
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@ -41,7 +41,7 @@
// #define SOC_I2S_SUPPORTED 1 // TODO: [ESP32C5] IDF-8713, IDF-8714
// #define SOC_RMT_SUPPORTED 1 // TODO: [ESP32C5] IDF-8726
// #define SOC_SDM_SUPPORTED 1 // TODO: [ESP32C5] IDF-8687
// #define SOC_GPSPI_SUPPORTED 1 // TODO: [ESP32C5] IDF-8698, IDF-8699
#define SOC_GPSPI_SUPPORTED 1
// #define SOC_LEDC_SUPPORTED 1 // TODO: [ESP32C5] IDF-8684
#define SOC_I2C_SUPPORTED 1
#define SOC_SYSTIMER_SUPPORTED 1 // TODO: [ESP32C5] IDF-8707
@ -379,23 +379,23 @@
#define SOC_SPI_PERIPH_CS_NUM(i) 6
#define SOC_SPI_MAX_CS_NUM 6
// #define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
// #define SOC_SPI_SUPPORT_DDRCLK 1
// #define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1
// #define SOC_SPI_SUPPORT_CD_SIG 1
// #define SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1
// #define SOC_SPI_SUPPORT_SLAVE_HD_VER2 1
// #define SOC_SPI_SUPPORT_CLK_XTAL 1
// #define SOC_SPI_SUPPORT_CLK_PLL_F80M 1
#define SOC_SPI_SUPPORT_DDRCLK 1
#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1
#define SOC_SPI_SUPPORT_CD_SIG 1
#define SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1
#define SOC_SPI_SUPPORT_SLAVE_HD_VER2 1
#define SOC_SPI_SUPPORT_CLK_XTAL 1
// #define SOC_SPI_SUPPORT_CLK_PLL_F160M 1
// #define SOC_SPI_SUPPORT_CLK_RC_FAST 1
// Peripheral supports DIO, DOUT, QIO, or QOUT
// host_id = 0 -> SPI0/SPI1, host_id = 1 -> SPI2,
#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id) ({(void)host_id; 1;})
// #define SOC_MEMSPI_IS_INDEPENDENT 1
// #define SOC_SPI_MAX_PRE_DIVIDER 16
#define SOC_MEMSPI_IS_INDEPENDENT 1
#define SOC_SPI_MAX_PRE_DIVIDER 256
/*-------------------------- SPI MEM CAPS ---------------------------------------*/
// #define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE (1)

15
components/soc/esp32c5/beta3/include/soc/spi_pins.h
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@ -1,25 +1,18 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
// TODO: [ESP32C5] IDF-8698 (inherit from C6)
#define SPI_FUNC_NUM 0
#define SPI_IOMUX_PIN_NUM_CS 24
#define SPI_IOMUX_PIN_NUM_CLK 29
#define SPI_IOMUX_PIN_NUM_MOSI 30
#define SPI_IOMUX_PIN_NUM_MISO 25
#define SPI_IOMUX_PIN_NUM_WP 26
#define SPI_IOMUX_PIN_NUM_HD 28
// MSPI pin defined in io_mux_reg.h
// IOMUX pin for GPSPI2
#define SPI2_FUNC_NUM 2
#define SPI2_IOMUX_PIN_NUM_MISO 2
#define SPI2_IOMUX_PIN_NUM_HD 4
#define SPI2_IOMUX_PIN_NUM_WP 5
#define SPI2_IOMUX_PIN_NUM_CLK 6
#define SPI2_IOMUX_PIN_NUM_MOSI 7
#define SPI2_IOMUX_PIN_NUM_CS 16
#define SPI2_IOMUX_PIN_NUM_CS 12

199
components/soc/esp32c5/beta3/include/soc/spi_struct.h
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@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -1348,201 +1348,6 @@ typedef union {
uint32_t val;
} spi_wn_reg_t;
/** Type of w1 register
* SPI CPU-controlled buffer1
*/
typedef union {
struct {
/** buf1 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf1:32;
};
uint32_t val;
} spi_w1_reg_t;
/** Type of w2 register
* SPI CPU-controlled buffer2
*/
typedef union {
struct {
/** buf2 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf2:32;
};
uint32_t val;
} spi_w2_reg_t;
/** Type of w3 register
* SPI CPU-controlled buffer3
*/
typedef union {
struct {
/** buf3 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf3:32;
};
uint32_t val;
} spi_w3_reg_t;
/** Type of w4 register
* SPI CPU-controlled buffer4
*/
typedef union {
struct {
/** buf4 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf4:32;
};
uint32_t val;
} spi_w4_reg_t;
/** Type of w5 register
* SPI CPU-controlled buffer5
*/
typedef union {
struct {
/** buf5 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf5:32;
};
uint32_t val;
} spi_w5_reg_t;
/** Type of w6 register
* SPI CPU-controlled buffer6
*/
typedef union {
struct {
/** buf6 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf6:32;
};
uint32_t val;
} spi_w6_reg_t;
/** Type of w7 register
* SPI CPU-controlled buffer7
*/
typedef union {
struct {
/** buf7 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf7:32;
};
uint32_t val;
} spi_w7_reg_t;
/** Type of w8 register
* SPI CPU-controlled buffer8
*/
typedef union {
struct {
/** buf8 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf8:32;
};
uint32_t val;
} spi_w8_reg_t;
/** Type of w9 register
* SPI CPU-controlled buffer9
*/
typedef union {
struct {
/** buf9 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf9:32;
};
uint32_t val;
} spi_w9_reg_t;
/** Type of w10 register
* SPI CPU-controlled buffer10
*/
typedef union {
struct {
/** buf10 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf10:32;
};
uint32_t val;
} spi_w10_reg_t;
/** Type of w11 register
* SPI CPU-controlled buffer11
*/
typedef union {
struct {
/** buf11 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf11:32;
};
uint32_t val;
} spi_w11_reg_t;
/** Type of w12 register
* SPI CPU-controlled buffer12
*/
typedef union {
struct {
/** buf12 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf12:32;
};
uint32_t val;
} spi_w12_reg_t;
/** Type of w13 register
* SPI CPU-controlled buffer13
*/
typedef union {
struct {
/** buf13 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf13:32;
};
uint32_t val;
} spi_w13_reg_t;
/** Type of w14 register
* SPI CPU-controlled buffer14
*/
typedef union {
struct {
/** buf14 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf14:32;
};
uint32_t val;
} spi_w14_reg_t;
/** Type of w15 register
* SPI CPU-controlled buffer15
*/
typedef union {
struct {
/** buf15 : R/W/SS; bitpos: [31:0]; default: 0;
* data buffer
*/
uint32_t buf15:32;
};
uint32_t val;
} spi_w15_reg_t;
/** Group: Version register */
/** Type of date register
@ -1577,7 +1382,7 @@ typedef struct spi_dev_t {
volatile spi_dma_int_ena_reg_t dma_int_ena;
volatile spi_dma_int_clr_reg_t dma_int_clr;
volatile spi_dma_int_raw_reg_t dma_int_raw;
volatile spi_dma_int_st_reg_t dma_int_st;
volatile spi_dma_int_st_reg_t dma_int_sta;
volatile spi_dma_int_set_reg_t dma_int_set;
uint32_t reserved_048[20];
volatile spi_wn_reg_t data_buf[16];

64
components/soc/esp32c5/beta3/spi_periph.c 100644
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@ -0,0 +1,64 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc
*/
const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
{
// MSPI on P4 has dedicated iomux pins
.spiclk_out = -1,
.spiclk_in = -1,
.spid_out = -1,
.spiq_out = -1,
.spiwp_out = -1,
.spihd_out = -1,
.spid_in = -1,
.spiq_in = -1,
.spiwp_in = -1,
.spihd_in = -1,
.spics_out = {-1},
.spics_in = -1,
.spiclk_iomux_pin = -1,
.spid_iomux_pin = -1,
.spiq_iomux_pin = -1,
.spiwp_iomux_pin = -1,
.spihd_iomux_pin = -1,
.spics0_iomux_pin = -1,
.irq = -1,
.irq_dma = -1,
.module = -1,
.hw = NULL,
.func = -1,
}, {
.spiclk_out = FSPICLK_OUT_MUX_IDX,
.spiclk_in = FSPICLK_IN_IDX,
.spid_out = FSPID_OUT_IDX,
.spiq_out = FSPIQ_OUT_IDX,
.spiwp_out = FSPIWP_OUT_IDX,
.spihd_out = FSPIHD_OUT_IDX,
.spid_in = FSPID_IN_IDX,
.spiq_in = FSPIQ_IN_IDX,
.spiwp_in = FSPIWP_IN_IDX,
.spihd_in = FSPIHD_IN_IDX,
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
.spics_in = FSPICS0_IN_IDX,
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,
.spiq_iomux_pin = SPI2_IOMUX_PIN_NUM_MISO,
.spiwp_iomux_pin = SPI2_IOMUX_PIN_NUM_WP,
.spihd_iomux_pin = SPI2_IOMUX_PIN_NUM_HD,
.spics0_iomux_pin = SPI2_IOMUX_PIN_NUM_CS,
.irq = ETS_GPSPI2_INTR_SOURCE,
.irq_dma = -1,
.module = PERIPH_GPSPI2_MODULE,
.hw = &GPSPI2,
.func = SPI2_FUNC_NUM,
},
};

2
components/soc/esp32c6/spi_periph.c
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

2
components/soc/esp32h2/spi_periph.c
Wyświetl plik

@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

2
components/soc/esp32p4/spi_periph.c
Wyświetl plik

@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

2
components/soc/esp32s2/spi_periph.c
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

2
components/soc/esp32s3/spi_periph.c
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@ -4,8 +4,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <stddef.h>
#include "soc/spi_periph.h"
#include "stddef.h"
/*
Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc

20
docs/en/api-reference/peripherals/spi_master.rst
Wyświetl plik

@ -473,12 +473,12 @@ GPIO Matrix and IO_MUX
.. only:: not esp32
{IDF_TARGET_SPI2_IOMUX_PIN_CS:default="N/A", esp32s2="10", esp32s3="10", esp32c2="10", esp32c3="10", esp32c6="16", esp32h2="1", esp32p4="7"}
{IDF_TARGET_SPI2_IOMUX_PIN_CLK:default="N/A", esp32s2="12", esp32s3="12", esp32c2="6", esp32c3="6", esp32c6="6", esp32h2="4", esp32p4="9"}
{IDF_TARGET_SPI2_IOMUX_PIN_MOSI:default="N/A", esp32s2="11" esp32s3="11", esp32c2="7" esp32c3="7", esp32c6="7", esp32h2="5", esp32p4="8"}
{IDF_TARGET_SPI2_IOMUX_PIN_MISO:default="N/A", esp32s2="13" esp32s3="13", esp32c2="2" esp32c3="2", esp32c6="2", esp32h2="0", esp32p4="10"}
{IDF_TARGET_SPI2_IOMUX_PIN_HD:default="N/A", esp32s2="9" esp32s3="9", esp32c2="4" esp32c3="4", esp32c6="4", esp32h2="3", esp32p4="6"}
{IDF_TARGET_SPI2_IOMUX_PIN_WP:default="N/A", esp32s2="14" esp32s3="14", esp32c2="5" esp32c3="5", esp32c6="5", esp32h2="2", esp32p4="11"}
{IDF_TARGET_SPI2_IOMUX_PIN_CS:default="N/A", esp32s2="10", esp32s3="10", esp32c2="10", esp32c3="10", esp32c6="16", esp32h2="1", esp32p4="7", esp32c5="12"}
{IDF_TARGET_SPI2_IOMUX_PIN_CLK:default="N/A", esp32s2="12", esp32s3="12", esp32c2="6", esp32c3="6", esp32c6="6", esp32h2="4", esp32p4="9", esp32c5="6"}
{IDF_TARGET_SPI2_IOMUX_PIN_MOSI:default="N/A", esp32s2="11" esp32s3="11", esp32c2="7" esp32c3="7", esp32c6="7", esp32h2="5", esp32p4="8", esp32c5="7"}
{IDF_TARGET_SPI2_IOMUX_PIN_MISO:default="N/A", esp32s2="13" esp32s3="13", esp32c2="2" esp32c3="2", esp32c6="2", esp32h2="0", esp32p4="10", esp32c5="2"}
{IDF_TARGET_SPI2_IOMUX_PIN_HD:default="N/A", esp32s2="9" esp32s3="9", esp32c2="4" esp32c3="4", esp32c6="4", esp32h2="3", esp32p4="6", esp32c5="4"}
{IDF_TARGET_SPI2_IOMUX_PIN_WP:default="N/A", esp32s2="14" esp32s3="14", esp32c2="5" esp32c3="5", esp32c6="5", esp32h2="2", esp32p4="11", esp32c5="5"}
Most of the chip's peripheral signals have a direct connection to their dedicated IO_MUX pins. However, the signals can also be routed to any other available pins using the less direct GPIO matrix. If at least one signal is routed through the GPIO matrix, then all signals will be routed through it.
@ -524,10 +524,10 @@ The main parameter that determines the transfer speed for large transactions is
Transaction Duration
^^^^^^^^^^^^^^^^^^^^
{IDF_TARGET_TRANS_TIME_INTR_DMA:default="N/A", esp32="28", esp32s2="23", esp32c3="28", esp32s3="26", esp32c2="42", esp32c6="34", esp32h2="58"}
{IDF_TARGET_TRANS_TIME_POLL_DMA:default="N/A", esp32="10", esp32s2="9", esp32c3="10", esp32s3="11", esp32c2="17", esp32c6="17", esp32h2="28"}
{IDF_TARGET_TRANS_TIME_INTR_CPU:default="N/A", esp32="25", esp32s2="22", esp32c3="27", esp32s3="24", esp32c2="40", esp32c6="32", esp32h2="54"}
{IDF_TARGET_TRANS_TIME_POLL_CPU:default="N/A", esp32="8", esp32s2="8", esp32c3="9", esp32s3="9", esp32c2="15", esp32c6="15", esp32h2="24"}
{IDF_TARGET_TRANS_TIME_INTR_DMA:default="N/A", esp32="28", esp32s2="23", esp32c3="28", esp32s3="26", esp32c2="42", esp32c6="34", esp32h2="58", esp32c5="27"}
{IDF_TARGET_TRANS_TIME_POLL_DMA:default="N/A", esp32="10", esp32s2="9", esp32c3="10", esp32s3="11", esp32c2="17", esp32c6="17", esp32h2="28", esp32c5="16"}
{IDF_TARGET_TRANS_TIME_INTR_CPU:default="N/A", esp32="25", esp32s2="22", esp32c3="27", esp32s3="24", esp32c2="40", esp32c6="32", esp32h2="54", esp32c5="24"}
{IDF_TARGET_TRANS_TIME_POLL_CPU:default="N/A", esp32="8", esp32s2="8", esp32c3="9", esp32s3="9", esp32c2="15", esp32c6="15", esp32h2="24", esp32c5="13"}
Transaction duration includes setting up SPI peripheral registers, copying data to FIFOs or setting up DMA links, and the time for SPI transactions.

20
docs/zh_CN/api-reference/peripherals/spi_master.rst
Wyświetl plik

@ -473,12 +473,12 @@ GPIO 矩阵与 IO_MUX 管脚
.. only:: not esp32
{IDF_TARGET_SPI2_IOMUX_PIN_CS:default="N/A", esp32s2="10", esp32s3="10", esp32c2="10", esp32c3="10", esp32c6="16", esp32h2="1", esp32p4="7"}
{IDF_TARGET_SPI2_IOMUX_PIN_CLK:default="N/A", esp32s2="12", esp32s3="12", esp32c2="6", esp32c3="6", esp32c6="6", esp32h2="4", esp32p4="9"}
{IDF_TARGET_SPI2_IOMUX_PIN_MOSI:default="N/A", esp32s2="11" esp32s3="11", esp32c2="7" esp32c3="7", esp32c6="7", esp32h2="5", esp32p4="8"}
{IDF_TARGET_SPI2_IOMUX_PIN_MISO:default="N/A", esp32s2="13" esp32s3="13", esp32c2="2" esp32c3="2", esp32c6="2", esp32h2="0", esp32p4="10"}
{IDF_TARGET_SPI2_IOMUX_PIN_HD:default="N/A", esp32s2="9" esp32s3="9", esp32c2="4" esp32c3="4", esp32c6="4", esp32h2="3", esp32p4="6"}
{IDF_TARGET_SPI2_IOMUX_PIN_WP:default="N/A", esp32s2="14" esp32s3="14", esp32c2="5" esp32c3="5", esp32c6="5", esp32h2="2", esp32p4="11"}
{IDF_TARGET_SPI2_IOMUX_PIN_CS:default="N/A", esp32s2="10", esp32s3="10", esp32c2="10", esp32c3="10", esp32c6="16", esp32h2="1", esp32p4="7", esp32c5="12"}
{IDF_TARGET_SPI2_IOMUX_PIN_CLK:default="N/A", esp32s2="12", esp32s3="12", esp32c2="6", esp32c3="6", esp32c6="6", esp32h2="4", esp32p4="9", esp32c5="6"}
{IDF_TARGET_SPI2_IOMUX_PIN_MOSI:default="N/A", esp32s2="11" esp32s3="11", esp32c2="7" esp32c3="7", esp32c6="7", esp32h2="5", esp32p4="8", esp32c5="7"}
{IDF_TARGET_SPI2_IOMUX_PIN_MISO:default="N/A", esp32s2="13" esp32s3="13", esp32c2="2" esp32c3="2", esp32c6="2", esp32h2="0", esp32p4="10", esp32c5="2"}
{IDF_TARGET_SPI2_IOMUX_PIN_HD:default="N/A", esp32s2="9" esp32s3="9", esp32c2="4" esp32c3="4", esp32c6="4", esp32h2="3", esp32p4="6", esp32c5="4"}
{IDF_TARGET_SPI2_IOMUX_PIN_WP:default="N/A", esp32s2="14" esp32s3="14", esp32c2="5" esp32c3="5", esp32c6="5", esp32h2="2", esp32p4="11", esp32c5="5"}
芯片的大多数外围信号都与之专用的 IO_MUX 管脚连接，但这些信号也可以通过较不直接的 GPIO 矩阵路由到任何其他可用的管脚。只要有一个信号是通过 GPIO 矩阵路由的，那么所有的信号都将通过它路由。
@ -524,10 +524,10 @@ GPIO 矩阵与 IO_MUX 管脚
传输事务持续时间
^^^^^^^^^^^^^^^^^^^^
{IDF_TARGET_TRANS_TIME_INTR_DMA:default="N/A", esp32="28", esp32s2="23", esp32c3="28", esp32s3="26", esp32c2="42", esp32c6="34", esp32h2="58"}
{IDF_TARGET_TRANS_TIME_POLL_DMA:default="N/A", esp32="10", esp32s2="9", esp32c3="10", esp32s3="11", esp32c2="17", esp32c6="17", esp32h2="28"}
{IDF_TARGET_TRANS_TIME_INTR_CPU:default="N/A", esp32="25", esp32s2="22", esp32c3="27", esp32s3="24", esp32c2="40", esp32c6="32", esp32h2="54"}
{IDF_TARGET_TRANS_TIME_POLL_CPU:default="N/A", esp32="8", esp32s2="8", esp32c3="9", esp32s3="9", esp32c2="15", esp32c6="15", esp32h2="24"}
{IDF_TARGET_TRANS_TIME_INTR_DMA:default="N/A", esp32="28", esp32s2="23", esp32c3="28", esp32s3="26", esp32c2="42", esp32c6="34", esp32h2="58", esp32c5="27"}
{IDF_TARGET_TRANS_TIME_POLL_DMA:default="N/A", esp32="10", esp32s2="9", esp32c3="10", esp32s3="11", esp32c2="17", esp32c6="17", esp32h2="28", esp32c5="16"}
{IDF_TARGET_TRANS_TIME_INTR_CPU:default="N/A", esp32="25", esp32s2="22", esp32c3="27", esp32s3="24", esp32c2="40", esp32c6="32", esp32h2="54", esp32c5="24"}
{IDF_TARGET_TRANS_TIME_POLL_CPU:default="N/A", esp32="8", esp32s2="8", esp32c3="9", esp32s3="9", esp32c2="15", esp32c6="15", esp32h2="24", esp32c5="13"}
传输事务持续时间包括设置 SPI 外设寄存器，将数据复制到 FIFO 或设置 DMA 链接，以及 SPI 传输事务时间。