From 4e23f9f3b775dabcfaae24e8df5f07f707c359ec Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Tue, 6 Apr 2021 21:13:32 +0800 Subject: [PATCH 1/5] secure_boot_v2: Adds support SB_V2 for ESP32-C3 ECO3 --- components/bootloader/Kconfig.projbuild | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/bootloader/Kconfig.projbuild b/components/bootloader/Kconfig.projbuild index 2bb0a1be02..18a3a7da8f 100644 --- a/components/bootloader/Kconfig.projbuild +++ b/components/bootloader/Kconfig.projbuild @@ -471,7 +471,7 @@ menu "Security features" config SECURE_BOOT bool "Enable hardware Secure Boot in bootloader (READ DOCS FIRST)" default n - depends on !IDF_TARGET_ESP32C3 # IDF-2647 + depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || ESP32C3_REV_MIN_3 help Build a bootloader which enables Secure Boot on first boot. @@ -488,7 +488,7 @@ menu "Security features" help Select the Secure Boot Version. Depends on the Chip Revision. Secure Boot V2 is the new RSA based secure boot scheme. - Supported in ESP32-ECO3. (ESP32 Chip Revision 3 onwards) + Supported in ESP32-ECO3 (ESP32 Chip Revision 3 onwards), ESP32-S2, ESP32-C3 ECO3. Secure Boot V1 is the AES based secure boot scheme. Supported in ESP32 and ESP32-ECO3. From 9295e54c9d2b8e42c9fd8844f703977a712b93f9 Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Tue, 6 Apr 2021 21:58:01 +0800 Subject: [PATCH 2/5] docs: Adds secure_boot_v2 for ESP32-C3 ECO3 --- docs/en/api-guides/index.rst | 2 +- docs/en/security/flash-encryption.rst | 6 ++---- docs/en/security/secure-boot-v2.rst | 23 ++++++++++++++++------- docs/sphinx-known-warnings.txt | 2 -- 4 files changed, 19 insertions(+), 14 deletions(-) diff --git a/docs/en/api-guides/index.rst b/docs/en/api-guides/index.rst index 8f141c858c..d815e4d86f 100644 --- a/docs/en/api-guides/index.rst +++ b/docs/en/api-guides/index.rst @@ -32,7 +32,7 @@ API Guides :esp32: RF Calibration :esp32: ROM debug console :esp32: Secure Boot <../security/secure-boot-v1> - :not esp32c3: Secure Boot V2 <../security/secure-boot-v2> + Secure Boot V2 <../security/secure-boot-v2> Thread Local Storage Tools :SOC_ULP_SUPPORTED: ULP Coprocessor diff --git a/docs/en/security/flash-encryption.rst b/docs/en/security/flash-encryption.rst index 8978ad0c0a..266059596e 100644 --- a/docs/en/security/flash-encryption.rst +++ b/docs/en/security/flash-encryption.rst @@ -485,8 +485,7 @@ When using Flash Encryption in production: - Do not reuse the same flash encryption key between multiple devices. This means that an attacker who copies encrypted data from one device cannot transfer it to a second device. :esp32: - When using ESP32 V3, if the UART ROM Download Mode is not needed for a production device then it should be disabled to provide an extra level of protection. Do this by calling :cpp:func:`esp_efuse_disable_rom_download_mode` during application startup. Alternatively, configure the project :ref:`CONFIG_ESP32_REV_MIN` level to 3 (targeting ESP32 V3 only) and select the :ref:`CONFIG_SECURE_UART_ROM_DL_MODE` to "Permanently disable ROM Download Mode (recommended)". The ability to disable ROM Download Mode is not available on earlier ESP32 versions. :not esp32: - The UART ROM Download Mode should be disabled entirely if it is not needed, or permanently set to "Secure Download Mode" otherwise. Secure Download Mode permanently limits the available commands to basic flash read and write only. The default behaviour is to set Secure Download Mode on first boot in Release mode. To disable Download Mode entirely select select the :ref:`CONFIG_SECURE_UART_ROM_DL_MODE` to "Permanently disable ROM Download Mode (recommended)" or call :cpp:func:`esp_efuse_disable_rom_download_mode` at runtime. - :not esp32c3: - Enable :doc:`Secure Boot ` as an extra layer of protection, and to prevent an attacker from selectively corrupting any part of the flash before boot. - :esp32c3: - Enable Secure Boot (not supported yet) as an extra layer of protection, and to prevent an attacker from selectively corrupting any part of the flash before boot. + - Enable :doc:`Secure Boot ` as an extra layer of protection, and to prevent an attacker from selectively corrupting any part of the flash before boot. Possible Failures ----------------- @@ -760,8 +759,7 @@ Flash encryption protects firmware against unauthorised readout and modification - Not all data is stored encrypted. If storing data on flash, check if the method you are using (library, API, etc.) supports flash encryption. - Flash encryption does not prevent an attacker from understanding the high-level layout of the flash. This is because the same AES key is used for every pair of adjacent 16 byte AES blocks. When these adjacent 16 byte blocks contain identical content (such as empty or padding areas), these blocks will encrypt to produce matching pairs of encrypted blocks. This may allow an attacker to make high-level comparisons between encrypted devices (i.e. to tell if two devices are probably running the same firmware version). :esp32: - For the same reason, an attacker can always tell when a pair of adjacent 16 byte blocks (32 byte aligned) contain two identical 16 byte sequences. Keep this in mind if storing sensitive data on the flash, design your flash storage so this doesn't happen (using a counter byte or some other non-identical value every 16 bytes is sufficient). :ref:`NVS Encryption ` deals with this and is suitable for many uses. - :not esp32c3: - Flash encryption alone may not prevent an attacker from modifying the firmware of the device. To prevent unauthorised firmware from running on the device, use flash encryption in combination with :doc:`Secure Boot `. - :esp32c3: - Flash encryption alone may not prevent an attacker from modifying the firmware of the device. To prevent unauthorised firmware from running on the device, use flash encryption in combination with Secure Boot (not supported yet). + - Flash encryption alone may not prevent an attacker from modifying the firmware of the device. To prevent unauthorised firmware from running on the device, use flash encryption in combination with :doc:`Secure Boot `. .. _flash-encryption-and-secure-boot: diff --git a/docs/en/security/secure-boot-v2.rst b/docs/en/security/secure-boot-v2.rst index 98c6bf86d8..3d430806b0 100644 --- a/docs/en/security/secure-boot-v2.rst +++ b/docs/en/security/secure-boot-v2.rst @@ -5,7 +5,7 @@ Secure Boot V2 .. important:: - The references in this document are related to Secure Boot V2, the preferred scheme from ESP32-ECO3 onwards and in ESP32-S2. + The references in this document are related to Secure Boot V2, the preferred scheme from ESP32 ECO3 onwards, in ESP32-S2, and from ESP32-C3 ECO3 onwards. .. only:: esp32 @@ -13,11 +13,20 @@ Secure Boot V2 Secure Boot V2 uses RSA based app and bootloader verification. This document can also be referred for signing apps with the RSA scheme without signing the bootloader. + +.. only:: esp32 + + ``Secure Boot V2`` and RSA scheme (``App Signing Scheme``) options are available for ESP32 from ECO3 onwards. To get these options visible in the menuconfig set :ref:`CONFIG_ESP32_REV_MIN` greater than or equal to `Rev 3`. + +.. only:: esp32c3 + + ``Secure Boot V2`` is available for ESP32-C3 from ECO3 onwards. To get these options visible in the menuconfig set :ref:`CONFIG_ESP32C3_REV_MIN` greater than or equal to `Rev 3`. + Background ---------- Secure Boot protects a device from running unsigned code (verification at time of load). A new RSA based secure boot -verification scheme (Secure Boot V2) has been introduced for ESP32-S2 and ESP32 ECO3 onwards. +verification scheme (Secure Boot V2) has been introduced for ESP32-S2, ESP32-C3 ECO3 onwards, and ESP32 ECO3 onwards. - The software bootloader’s RSA-PSS signature is verified by the Mask ROM and it is executed post successful verification. - The verified software bootloader verifies the RSA-PSS signature of the application image before it is executed. @@ -31,7 +40,7 @@ Advantages - Only one public key can be generated and stored in ESP32 ECO3 during manufacturing. - .. only:: esp32s2 + .. only:: esp32s2 or esp32c3 - Up to three public keys can be generated and stored in the chip during manufacturing. @@ -108,7 +117,7 @@ A signature block is “valid” if the first byte is 0xe7 and a valid CRC32 is Only one signature block can be appended to the bootloader or application image in ESP32 ECO3. - .. only:: esp32s2 + .. only:: esp32s2 or esp32c3 Upto 3 signature blocks can be appended to the bootloader or application image in {IDF_TARGET_NAME}. @@ -145,7 +154,7 @@ eFuse usage - BLK2 - Stores the SHA-256 digest of the public key. SHA-256 hash of public key modulus, exponent, precalculated R & M’ values (represented as 776 bytes – offsets 36 to 812 - as per the :ref:`signature-block-format`) is written to an eFuse key block. -.. only:: esp32s2 +.. only:: esp32s2 or esp32c3 - SECURE_BOOT_EN - Enables secure boot protection on boot. @@ -173,7 +182,7 @@ How To Enable Secure Boot V2 3. Specify the secure boot signing key path. The file can be anywhere on your system. A relative path will be evaluated from the project directory. The file does not need to exist yet. 4. Select the UART ROM download mode in "Security features -> UART ROM download mode". By default the UART ROM download mode has been kept enabled in order to prevent permanently disabling it in the development phase, this option is a potentially insecure option. It is recommended to disable the UART download mode for better security. -.. only:: esp32s2 +.. only:: esp32s2 or esp32c3 2. The "Secure Boot V2" option will be selected and the "App Signing Scheme" would be set to RSA by default. @@ -256,7 +265,7 @@ Secure Boot Best Practices * Enable all secure boot options in the Secure Boot Configuration. These include flash encryption, disabling of JTAG, disabling BASIC ROM interpeter, and disabling the UART bootloader encrypted flash access. * Use secure boot in combination with :doc:`flash encryption` to prevent local readout of the flash contents. -.. only:: esp32s2 +.. only:: esp32s2 or esp32c3 Key Management -------------- diff --git a/docs/sphinx-known-warnings.txt b/docs/sphinx-known-warnings.txt index ab33b4aea8..8a40acadde 100644 --- a/docs/sphinx-known-warnings.txt +++ b/docs/sphinx-known-warnings.txt @@ -77,5 +77,3 @@ wear-levelling.rst:line: WARNING: Duplicate declaration, bool esp_vfs_fat_mount_ wear-levelling.rst:line: WARNING: Duplicate declaration, int esp_vfs_fat_mount_config_t::max_files wear-levelling.rst:line: WARNING: Duplicate declaration, size_t esp_vfs_fat_mount_config_t::allocation_unit_size wear-levelling.rst:line: WARNING: Duplicate declaration, esp_vfs_fat_mount_config_t -bootloader.rst:line: WARNING: undefined label: config_secure_boot (if the link has no caption the label must precede a section header) -secure-boot-v2.rst:line: WARNING: undefined label: config_secure_boot_insecure (if the link has no caption the label must precede a section header) From 1d8f885928934766dc4dc798a6bc29949c9b1c32 Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Thu, 8 Apr 2021 15:03:02 +0800 Subject: [PATCH 3/5] esp32c3: Default supported ESP32-C3 Revision ECO3 --- components/esp32c3/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp32c3/Kconfig b/components/esp32c3/Kconfig index a3824706b1..7f4e504448 100644 --- a/components/esp32c3/Kconfig +++ b/components/esp32c3/Kconfig @@ -25,7 +25,7 @@ menu "ESP32C3-Specific" choice ESP32C3_REV_MIN prompt "Minimum Supported ESP32-C3 Revision" - default ESP32C3_REV_MIN_0 + default ESP32C3_REV_MIN_3 help Minimum revision that ESP-IDF would support. From 4fbfb03fe1ff213815901dec08b8652153ac3d20 Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Thu, 8 Apr 2021 23:57:53 +0800 Subject: [PATCH 4/5] unit-test-app(config): CI uses ECO0 for esp32c3 UTs --- tools/unit-test-app/sdkconfig.defaults.esp32c3 | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/unit-test-app/sdkconfig.defaults.esp32c3 b/tools/unit-test-app/sdkconfig.defaults.esp32c3 index d0ea27a6c6..9f4fee88dd 100644 --- a/tools/unit-test-app/sdkconfig.defaults.esp32c3 +++ b/tools/unit-test-app/sdkconfig.defaults.esp32c3 @@ -1 +1,3 @@ CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 From ec4de4fe5cc9d083ea983e9a0f630c1174efaa8a Mon Sep 17 00:00:00 2001 From: KonstantinKondrashov Date: Fri, 9 Apr 2021 14:23:09 +0800 Subject: [PATCH 5/5] example_tests: CI uses ECO0 for esp32c3 tests --- examples/cxx/exceptions/sdkconfig.ci | 6 ++++++ examples/cxx/pthread/sdkconfig.ci | 3 +++ examples/cxx/rtti/sdkconfig.ci | 4 ++++ examples/get-started/blink/sdkconfig.ci | 3 +++ examples/get-started/hello_world/sdkconfig.ci | 3 +++ examples/protocols/asio/ssl_client_server/sdkconfig.ci | 3 +++ examples/security/flash_encryption/sdkconfig.ci | 3 +++ examples/storage/nvs_rw_blob/sdkconfig.ci | 3 +++ examples/storage/nvs_rw_value/sdkconfig.ci | 3 +++ examples/storage/nvs_rw_value_cxx/sdkconfig.ci | 3 +++ examples/storage/partition_api/partition_find/sdkconfig.ci | 6 ++++++ examples/storage/partition_api/partition_mmap/sdkconfig.ci | 6 ++++++ examples/storage/partition_api/partition_ops/sdkconfig.ci | 6 ++++++ examples/storage/parttool/sdkconfig.ci | 6 ++++++ examples/storage/spiffs/sdkconfig.ci | 6 ++++++ examples/storage/spiffsgen/sdkconfig.ci | 6 ++++++ examples/storage/wear_levelling/sdkconfig.ci | 7 +++++++ examples/system/base_mac_address/sdkconfig.ci | 3 +++ examples/system/console/sdkconfig.ci.history | 3 +++ examples/system/console/sdkconfig.ci.nohistory | 3 +++ examples/system/deep_sleep/sdkconfig.ci | 3 +++ examples/system/efuse/sdkconfig.ci | 3 +++ examples/system/esp_event/default_event_loop/sdkconfig.ci | 3 +++ examples/system/esp_event/user_event_loops/sdkconfig.ci | 3 +++ examples/system/freertos/real_time_stats/sdkconfig.ci | 5 +++++ examples/system/light_sleep/sdkconfig.ci | 4 ++++ examples/system/ota/simple_ota_example/sdkconfig.ci | 3 +++ .../system/ota/simple_ota_example/sdkconfig.ci.flash_enc | 3 +++ .../ota/simple_ota_example/sdkconfig.ci.flash_enc_wifi | 3 +++ examples/system/ota/simple_ota_example/sdkconfig.ci.spiram | 3 +++ examples/system/select/sdkconfig.ci | 3 +++ examples/system/task_watchdog/sdkconfig.ci | 3 +++ examples/system/unit_test/sdkconfig.ci | 3 +++ 33 files changed, 128 insertions(+) create mode 100644 examples/cxx/exceptions/sdkconfig.ci create mode 100644 examples/cxx/pthread/sdkconfig.ci create mode 100644 examples/cxx/rtti/sdkconfig.ci create mode 100644 examples/get-started/blink/sdkconfig.ci create mode 100644 examples/get-started/hello_world/sdkconfig.ci create mode 100644 examples/storage/nvs_rw_blob/sdkconfig.ci create mode 100644 examples/storage/nvs_rw_value/sdkconfig.ci create mode 100644 examples/storage/nvs_rw_value_cxx/sdkconfig.ci create mode 100644 examples/storage/partition_api/partition_find/sdkconfig.ci create mode 100644 examples/storage/partition_api/partition_mmap/sdkconfig.ci create mode 100644 examples/storage/partition_api/partition_ops/sdkconfig.ci create mode 100644 examples/storage/parttool/sdkconfig.ci create mode 100644 examples/storage/spiffs/sdkconfig.ci create mode 100644 examples/storage/spiffsgen/sdkconfig.ci create mode 100644 examples/storage/wear_levelling/sdkconfig.ci create mode 100644 examples/system/base_mac_address/sdkconfig.ci create mode 100644 examples/system/esp_event/default_event_loop/sdkconfig.ci create mode 100644 examples/system/esp_event/user_event_loops/sdkconfig.ci create mode 100644 examples/system/freertos/real_time_stats/sdkconfig.ci create mode 100644 examples/system/light_sleep/sdkconfig.ci create mode 100644 examples/system/select/sdkconfig.ci create mode 100644 examples/system/task_watchdog/sdkconfig.ci create mode 100644 examples/system/unit_test/sdkconfig.ci diff --git a/examples/cxx/exceptions/sdkconfig.ci b/examples/cxx/exceptions/sdkconfig.ci new file mode 100644 index 0000000000..62e55e8c30 --- /dev/null +++ b/examples/cxx/exceptions/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +# Enable C++ exceptions and set emergency pool size for exception objects +CONFIG_COMPILER_CXX_EXCEPTIONS=y +CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE=1024 diff --git a/examples/cxx/pthread/sdkconfig.ci b/examples/cxx/pthread/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/cxx/pthread/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/cxx/rtti/sdkconfig.ci b/examples/cxx/rtti/sdkconfig.ci new file mode 100644 index 0000000000..1b23b6bed8 --- /dev/null +++ b/examples/cxx/rtti/sdkconfig.ci @@ -0,0 +1,4 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_COMPILER_CXX_RTTI=y diff --git a/examples/get-started/blink/sdkconfig.ci b/examples/get-started/blink/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/get-started/blink/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/get-started/hello_world/sdkconfig.ci b/examples/get-started/hello_world/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/get-started/hello_world/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/protocols/asio/ssl_client_server/sdkconfig.ci b/examples/protocols/asio/ssl_client_server/sdkconfig.ci index f1c43e8ac7..fdf00fcf67 100644 --- a/examples/protocols/asio/ssl_client_server/sdkconfig.ci +++ b/examples/protocols/asio/ssl_client_server/sdkconfig.ci @@ -4,3 +4,6 @@ CONFIG_EXAMPLE_SERVER_NAME="localhost" CONFIG_EXAMPLE_CONNECT_WIFI=n CONFIG_EXAMPLE_CONNECT_ETHERNET=n CONFIG_EXAMPLE_CLIENT_VERIFY_PEER=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/security/flash_encryption/sdkconfig.ci b/examples/security/flash_encryption/sdkconfig.ci index b7f834c1bf..0739c8cc97 100644 --- a/examples/security/flash_encryption/sdkconfig.ci +++ b/examples/security/flash_encryption/sdkconfig.ci @@ -10,3 +10,6 @@ CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=y CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=y CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=y CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/storage/nvs_rw_blob/sdkconfig.ci b/examples/storage/nvs_rw_blob/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/storage/nvs_rw_blob/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/storage/nvs_rw_value/sdkconfig.ci b/examples/storage/nvs_rw_value/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/storage/nvs_rw_value/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/storage/nvs_rw_value_cxx/sdkconfig.ci b/examples/storage/nvs_rw_value_cxx/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/storage/nvs_rw_value_cxx/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/storage/partition_api/partition_find/sdkconfig.ci b/examples/storage/partition_api/partition_find/sdkconfig.ci new file mode 100644 index 0000000000..34f52a20e6 --- /dev/null +++ b/examples/storage/partition_api/partition_find/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" diff --git a/examples/storage/partition_api/partition_mmap/sdkconfig.ci b/examples/storage/partition_api/partition_mmap/sdkconfig.ci new file mode 100644 index 0000000000..34f52a20e6 --- /dev/null +++ b/examples/storage/partition_api/partition_mmap/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" diff --git a/examples/storage/partition_api/partition_ops/sdkconfig.ci b/examples/storage/partition_api/partition_ops/sdkconfig.ci new file mode 100644 index 0000000000..34f52a20e6 --- /dev/null +++ b/examples/storage/partition_api/partition_ops/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" diff --git a/examples/storage/parttool/sdkconfig.ci b/examples/storage/parttool/sdkconfig.ci new file mode 100644 index 0000000000..34f52a20e6 --- /dev/null +++ b/examples/storage/parttool/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" diff --git a/examples/storage/spiffs/sdkconfig.ci b/examples/storage/spiffs/sdkconfig.ci new file mode 100644 index 0000000000..34f52a20e6 --- /dev/null +++ b/examples/storage/spiffs/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" diff --git a/examples/storage/spiffsgen/sdkconfig.ci b/examples/storage/spiffsgen/sdkconfig.ci new file mode 100644 index 0000000000..34f52a20e6 --- /dev/null +++ b/examples/storage/spiffsgen/sdkconfig.ci @@ -0,0 +1,6 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" diff --git a/examples/storage/wear_levelling/sdkconfig.ci b/examples/storage/wear_levelling/sdkconfig.ci new file mode 100644 index 0000000000..c3d6172437 --- /dev/null +++ b/examples/storage/wear_levelling/sdkconfig.ci @@ -0,0 +1,7 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_example.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_example.csv" +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y diff --git a/examples/system/base_mac_address/sdkconfig.ci b/examples/system/base_mac_address/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/system/base_mac_address/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/console/sdkconfig.ci.history b/examples/system/console/sdkconfig.ci.history index bcd6e9beb5..94ff5d51ac 100644 --- a/examples/system/console/sdkconfig.ci.history +++ b/examples/system/console/sdkconfig.ci.history @@ -1 +1,4 @@ CONFIG_STORE_HISTORY=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/console/sdkconfig.ci.nohistory b/examples/system/console/sdkconfig.ci.nohistory index 1b149540fd..11591ccfa2 100644 --- a/examples/system/console/sdkconfig.ci.nohistory +++ b/examples/system/console/sdkconfig.ci.nohistory @@ -1 +1,4 @@ CONFIG_STORE_HISTORY=n +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/deep_sleep/sdkconfig.ci b/examples/system/deep_sleep/sdkconfig.ci index 338c69c218..684e6d0e0e 100644 --- a/examples/system/deep_sleep/sdkconfig.ci +++ b/examples/system/deep_sleep/sdkconfig.ci @@ -7,3 +7,6 @@ CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y CONFIG_EXAMPLE_ULP_TEMPERATURE_WAKEUP=n CONFIG_EXAMPLE_EXT1_WAKEUP=n +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/efuse/sdkconfig.ci b/examples/system/efuse/sdkconfig.ci index 88ec85884a..88dbe586bc 100644 --- a/examples/system/efuse/sdkconfig.ci +++ b/examples/system/efuse/sdkconfig.ci @@ -1,2 +1,5 @@ CONFIG_EFUSE_CUSTOM_TABLE=y CONFIG_EFUSE_VIRTUAL=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/esp_event/default_event_loop/sdkconfig.ci b/examples/system/esp_event/default_event_loop/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/system/esp_event/default_event_loop/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/esp_event/user_event_loops/sdkconfig.ci b/examples/system/esp_event/user_event_loops/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/system/esp_event/user_event_loops/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/freertos/real_time_stats/sdkconfig.ci b/examples/system/freertos/real_time_stats/sdkconfig.ci new file mode 100644 index 0000000000..6966e82b55 --- /dev/null +++ b/examples/system/freertos/real_time_stats/sdkconfig.ci @@ -0,0 +1,5 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_FREERTOS_USE_TRACE_FACILITY=y +CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS=y diff --git a/examples/system/light_sleep/sdkconfig.ci b/examples/system/light_sleep/sdkconfig.ci new file mode 100644 index 0000000000..d93b617992 --- /dev/null +++ b/examples/system/light_sleep/sdkconfig.ci @@ -0,0 +1,4 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 +CONFIG_ESP32_DEFAULT_CPU_FREQ_80=y diff --git a/examples/system/ota/simple_ota_example/sdkconfig.ci b/examples/system/ota/simple_ota_example/sdkconfig.ci index 278e33dd00..78b67feb42 100644 --- a/examples/system/ota/simple_ota_example/sdkconfig.ci +++ b/examples/system/ota/simple_ota_example/sdkconfig.ci @@ -1,3 +1,6 @@ CONFIG_EXAMPLE_FIRMWARE_UPGRADE_URL="FROM_STDIN" CONFIG_EXAMPLE_SKIP_COMMON_NAME_CHECK=y CONFIG_EXAMPLE_FIRMWARE_UPGRADE_BIND_IF=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc b/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc index a0b2c30dd8..647873efcc 100644 --- a/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc +++ b/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc @@ -20,3 +20,6 @@ CONFIG_EXAMPLE_ETH_PHY_ADDR=1 CONFIG_EXAMPLE_CONNECT_IPV6=y # This is required for nvs encryption (which is enabled by default with flash encryption) CONFIG_PARTITION_TABLE_TWO_OTA_ENCRYPTED_NVS=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc_wifi b/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc_wifi index cfd62a636f..7425211e39 100644 --- a/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc_wifi +++ b/examples/system/ota/simple_ota_example/sdkconfig.ci.flash_enc_wifi @@ -13,3 +13,6 @@ CONFIG_EXAMPLE_CONNECT_ETHERNET=n CONFIG_EXAMPLE_CONNECT_WIFI=y # This is required for nvs encryption (which is enabled by default with flash encryption) CONFIG_PARTITION_TABLE_TWO_OTA_ENCRYPTED_NVS=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/ota/simple_ota_example/sdkconfig.ci.spiram b/examples/system/ota/simple_ota_example/sdkconfig.ci.spiram index d2e75f2693..d7f2a18dd3 100644 --- a/examples/system/ota/simple_ota_example/sdkconfig.ci.spiram +++ b/examples/system/ota/simple_ota_example/sdkconfig.ci.spiram @@ -11,3 +11,6 @@ CONFIG_EXAMPLE_ETH_MDIO_GPIO=18 CONFIG_EXAMPLE_ETH_PHY_RST_GPIO=5 CONFIG_EXAMPLE_ETH_PHY_ADDR=1 CONFIG_EXAMPLE_CONNECT_IPV6=y +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/select/sdkconfig.ci b/examples/system/select/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/system/select/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/task_watchdog/sdkconfig.ci b/examples/system/task_watchdog/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/system/task_watchdog/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0 diff --git a/examples/system/unit_test/sdkconfig.ci b/examples/system/unit_test/sdkconfig.ci new file mode 100644 index 0000000000..a4d47d6a2b --- /dev/null +++ b/examples/system/unit_test/sdkconfig.ci @@ -0,0 +1,3 @@ +# IDF-3090 +CONFIG_ESP32C3_REV_MIN_0=y +CONFIG_ESP32C3_REV_MIN=0