kopia lustrzana https://github.com/espressif/esp-idf
timer: unit test and doc update for esp8684
morris
rodzic
f2d3a18f43
commit
8f2199cd88
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@ -15,12 +15,9 @@
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#include "soc/soc_caps.h"
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#include "esp_rom_sys.h"
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684)
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// TODO: Timer support IDF-3825
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#define TIMER_DIVIDER 16
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#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
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#define TEST_TIMER_RESOLUTION_HZ 1000000 // 1MHz resolution
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#define TIMER_DELTA 0.001
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static bool alarm_flag;
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static xQueueHandle timer_queue;
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@ -39,14 +36,16 @@ typedef struct {
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#define TIMER_INFO_INIT(TG, TID) {.timer_group = (TG), .timer_idx = (TID),}
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static timer_info_t timer_info[] = {
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#if !CONFIG_IDF_TARGET_ESP32C3
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#if SOC_TIMER_GROUP_TOTAL_TIMERS >= 4
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TIMER_INFO_INIT(TIMER_GROUP_0, TIMER_0),
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TIMER_INFO_INIT(TIMER_GROUP_0, TIMER_1),
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TIMER_INFO_INIT(TIMER_GROUP_1, TIMER_0),
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TIMER_INFO_INIT(TIMER_GROUP_1, TIMER_1),
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#else
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#elif SOC_TIMER_GROUP_TOTAL_TIMERS >= 2
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TIMER_INFO_INIT(TIMER_GROUP_0, TIMER_0),
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TIMER_INFO_INIT(TIMER_GROUP_1, TIMER_0),
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#else
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TIMER_INFO_INIT(TIMER_GROUP_0, TIMER_0),
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#endif
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};
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@ -248,7 +247,7 @@ static void timer_intr_enable_and_start(int timer_group, int timer_idx, double a
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{
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TEST_ESP_OK(timer_pause(timer_group, timer_idx));
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TEST_ESP_OK(timer_set_counter_value(timer_group, timer_idx, 0x0));
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TEST_ESP_OK(timer_set_alarm_value(timer_group, timer_idx, alarm_time * TIMER_SCALE));
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TEST_ESP_OK(timer_set_alarm_value(timer_group, timer_idx, alarm_time * TEST_TIMER_RESOLUTION_HZ));
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TEST_ESP_OK(timer_set_alarm(timer_group, timer_idx, TIMER_ALARM_EN));
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TEST_ESP_OK(timer_enable_intr(timer_group, timer_idx));
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TEST_ESP_OK(timer_start(timer_group, timer_idx));
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@ -300,9 +299,10 @@ TEST_CASE("Timer init", "[hw_timer]")
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// lack one parameter
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timer_config_t config2 = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -311,33 +311,20 @@ TEST_CASE("Timer init", "[hw_timer]")
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config2.counter_en = TIMER_PAUSE;
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all_timer_init(&config2, true);
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// error config parameter
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timer_config_t config3 = {
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.alarm_en = 3, //error parameter
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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all_timer_init(&config3, true);
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timer_config_t get_config;
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TEST_ESP_OK(timer_get_config(TIMER_GROUP_1, TIMER_0, &get_config));
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printf("Error config alarm_en is %d\n", get_config.alarm_en);
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TEST_ASSERT_NOT_EQUAL(config3.alarm_en, get_config.alarm_en);
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// Test init 2: init
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uint64_t set_timer_val = 0x0;
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_DIS,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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// judge get config parameters
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timer_config_t get_config;
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TEST_ESP_OK(timer_init(TIMER_GROUP_0, TIMER_0, &config));
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TEST_ESP_OK(timer_get_config(TIMER_GROUP_0, TIMER_0, &get_config));
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TEST_ASSERT_EQUAL(config.alarm_en, get_config.alarm_en);
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@ -355,8 +342,8 @@ TEST_CASE("Timer init", "[hw_timer]")
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// Test init 3: wrong parameter
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(-1, TIMER_0, &config));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_1, 2, &config));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_1, -1, &config));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_0, 2, &config));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(TIMER_GROUP_0, -1, &config));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_init(2, TIMER_0, &config));
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all_timer_deinit();
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}
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@ -369,10 +356,11 @@ TEST_CASE("Timer init", "[hw_timer]")
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TEST_CASE("Timer read counter value", "[hw_timer]")
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{
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_EN,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -408,10 +396,11 @@ TEST_CASE("Timer read counter value", "[hw_timer]")
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TEST_CASE("Timer start", "[hw_timer]")
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{
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_EN,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -426,8 +415,8 @@ TEST_CASE("Timer start", "[hw_timer]")
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//Test start 2:wrong parameter
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(2, TIMER_0));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(-1, TIMER_0));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_1, 2));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_1, -1));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_0, 2));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_start(TIMER_GROUP_0, -1));
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all_timer_deinit();
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}
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@ -439,10 +428,11 @@ TEST_CASE("Timer start", "[hw_timer]")
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TEST_CASE("Timer pause", "[hw_timer]")
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{
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_EN,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -458,7 +448,7 @@ TEST_CASE("Timer pause", "[hw_timer]")
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_pause(-1, TIMER_0));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_pause(TIMER_GROUP_0, -1));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_pause(2, TIMER_0));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_pause(TIMER_GROUP_1, 2));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_pause(TIMER_GROUP_0, 2));
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all_timer_deinit();
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}
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@ -466,10 +456,11 @@ TEST_CASE("Timer pause", "[hw_timer]")
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TEST_CASE("Timer counter mode (up / down)", "[hw_timer]")
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{
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_EN,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -486,7 +477,7 @@ TEST_CASE("Timer counter mode (up / down)", "[hw_timer]")
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// Test counter mode 2: TIMER_COUNT_DOWN
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all_timer_pause();
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set_timer_val = 0x00E4E1C0ULL; // 3s clock counter value
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set_timer_val = TEST_TIMER_RESOLUTION_HZ * 3; // 3s clock counter value
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all_timer_set_counter_mode(TIMER_COUNT_DOWN);
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all_timer_set_counter_value(set_timer_val);
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all_timer_start();
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@ -499,24 +490,14 @@ TEST_CASE("Timer counter mode (up / down)", "[hw_timer]")
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all_timer_deinit();
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}
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/**
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* divider case:
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* 1. different divider, read value
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* Note: divide 0 = divide max, divide 1 = divide 2
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* 2. error parameter
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*
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* the frequency(timer counts in one sec):
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* 80M/divider = 800*100000
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* max divider value is 65536, its frequency is 1220 (nearly about 1KHz)
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*/
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TEST_CASE("Timer divider", "[hw_timer]")
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{
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int i;
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_EN,
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.auto_reload = TIMER_AUTORELOAD_EN,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_START,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -532,41 +513,36 @@ TEST_CASE("Timer divider", "[hw_timer]")
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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all_timer_get_counter_value(set_timer_val, false, time_val);
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// compare divider 16 and 8, value should be double
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all_timer_pause();
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all_timer_set_divider(8);
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all_timer_set_divider(config.divider / 2); // half of original divider
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all_timer_set_counter_value(set_timer_val);
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all_timer_start();
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vTaskDelay(1000 / portTICK_PERIOD_MS); //delay the same time
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all_timer_get_counter_value(set_timer_val, false, comp_time_val);
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for (i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
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TEST_ASSERT_INT_WITHIN(10000, 10000000, comp_time_val[i]);
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for (int i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(2000, 1000000, time_val[i]);
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TEST_ASSERT_INT_WITHIN(2000, 2000000, comp_time_val[i]);
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}
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// divider is 256, value should be 2^4
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all_timer_pause();
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all_timer_set_divider(256);
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all_timer_set_counter_value(set_timer_val);
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all_timer_start();
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vTaskDelay(1000 / portTICK_PERIOD_MS); //delay the same time
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all_timer_get_counter_value(set_timer_val, false, comp_time_val);
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for (i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
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TEST_ASSERT_INT_WITHIN(3126, 312500, comp_time_val[i]);
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for (int i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(100, APB_CLK_FREQ / 256, comp_time_val[i]);
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}
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// extrem value test
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all_timer_pause();
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all_timer_set_divider(2);
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all_timer_set_counter_value(set_timer_val);
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all_timer_start();
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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all_timer_get_counter_value(set_timer_val, false, comp_time_val);
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for (i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
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TEST_ASSERT_INT_WITHIN(40000, 40000000, comp_time_val[i]);
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for (int i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(5000, APB_CLK_FREQ / 2, comp_time_val[i]);
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}
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all_timer_pause();
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@ -575,19 +551,13 @@ TEST_CASE("Timer divider", "[hw_timer]")
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all_timer_start();
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vTaskDelay(1000 / portTICK_PERIOD_MS); //delay the same time
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all_timer_get_counter_value(set_timer_val, false, comp_time_val);
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for (i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
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TEST_ASSERT_INT_WITHIN(2, 1220, comp_time_val[i]);
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for (int i = 0; i < TIMER_GROUP_MAX * TIMER_MAX; i++) {
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TEST_ASSERT_INT_WITHIN(10, APB_CLK_FREQ / 65536, comp_time_val[i]);
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}
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// divider is 1 should be equal with 2
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all_timer_pause();
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_0, 1));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_0, 1));
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all_timer_pause();
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_0, TIMER_0, 65537));
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TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, timer_set_divider(TIMER_GROUP_1, TIMER_0, 65537));
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all_timer_deinit();
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}
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@ -599,10 +569,11 @@ TEST_CASE("Timer divider", "[hw_timer]")
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TEST_CASE("Timer enable alarm", "[hw_timer]")
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{
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timer_config_t config_test = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_DIS,
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.auto_reload = TIMER_AUTORELOAD_DIS,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_PAUSE,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -613,7 +584,7 @@ TEST_CASE("Timer enable alarm", "[hw_timer]")
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alarm_flag = false;
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TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
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timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.2);
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timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
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timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TEST_TIMER_RESOLUTION_HZ);
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TEST_ASSERT_EQUAL(true, alarm_flag);
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// disable alarm of tg0_timer1
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@ -623,11 +594,12 @@ TEST_CASE("Timer enable alarm", "[hw_timer]")
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vTaskDelay(2000 / portTICK_PERIOD_MS);
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TEST_ASSERT_EQUAL(false, alarm_flag);
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#if SOC_TIMER_GROUPS > 1
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// enable alarm of tg1_timer0
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alarm_flag = false;
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TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
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timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.2);
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timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
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timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TEST_TIMER_RESOLUTION_HZ);
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TEST_ASSERT_EQUAL(true, alarm_flag);
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// disable alarm of tg1_timer0
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@ -636,6 +608,7 @@ TEST_CASE("Timer enable alarm", "[hw_timer]")
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TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_DIS));
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vTaskDelay(2000 / portTICK_PERIOD_MS);
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TEST_ASSERT_EQUAL(false, alarm_flag);
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#endif
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all_timer_isr_unreg();
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all_timer_deinit();
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}
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@ -649,10 +622,11 @@ TEST_CASE("Timer set alarm value", "[hw_timer]")
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{
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uint64_t alarm_val[SOC_TIMER_GROUP_TOTAL_TIMERS];
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timer_config_t config = {
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.clk_src = TIMER_SRC_CLK_APB,
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.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
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.alarm_en = TIMER_ALARM_EN,
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.auto_reload = TIMER_AUTORELOAD_DIS,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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.counter_en = TIMER_PAUSE,
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.intr_type = TIMER_INTR_LEVEL
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};
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@ -660,17 +634,19 @@ TEST_CASE("Timer set alarm value", "[hw_timer]")
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all_timer_isr_reg();
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// set and get alarm value
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all_timer_set_alarm_value(3 * TIMER_SCALE);
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all_timer_set_alarm_value(3 * TEST_TIMER_RESOLUTION_HZ);
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all_timer_get_alarm_value(alarm_val);
|
||||
for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
|
||||
TEST_ASSERT_EQUAL_UINT32(3 * TIMER_SCALE, (uint32_t)alarm_val[i]);
|
||||
TEST_ASSERT_EQUAL_UINT32(3 * TEST_TIMER_RESOLUTION_HZ, (uint32_t)alarm_val[i]);
|
||||
}
|
||||
|
||||
// set interrupt read alarm value
|
||||
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 2.4);
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 2.4 * TIMER_SCALE);
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 2.4 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.4);
|
||||
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.4 * TIMER_SCALE);
|
||||
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.4 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#endif
|
||||
all_timer_isr_unreg();
|
||||
all_timer_deinit();
|
||||
}
|
||||
|
|
@ -683,10 +659,11 @@ TEST_CASE("Timer set alarm value", "[hw_timer]")
|
|||
TEST_CASE("Timer auto reload", "[hw_timer]")
|
||||
{
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_EN,
|
||||
.auto_reload = TIMER_AUTORELOAD_DIS,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL
|
||||
};
|
||||
|
|
@ -695,17 +672,21 @@ TEST_CASE("Timer auto reload", "[hw_timer]")
|
|||
|
||||
// test disable auto_reload
|
||||
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.14);
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.14 * TIMER_SCALE);
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.14 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.14);
|
||||
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.14 * TIMER_SCALE);
|
||||
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.14 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#endif
|
||||
|
||||
//test enable auto_reload
|
||||
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_EN));
|
||||
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 1.4);
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_EN, 0);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN));
|
||||
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 1.4);
|
||||
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN, 0);
|
||||
#endif
|
||||
all_timer_isr_unreg();
|
||||
all_timer_deinit();
|
||||
}
|
||||
|
|
@ -718,30 +699,33 @@ TEST_CASE("Timer auto reload", "[hw_timer]")
|
|||
TEST_CASE("Timer enable timer interrupt", "[hw_timer]")
|
||||
{
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_DIS,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.auto_reload = TIMER_AUTORELOAD_DIS,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL
|
||||
};
|
||||
|
||||
all_timer_init(&config, true);
|
||||
all_timer_pause();
|
||||
all_timer_set_alarm_value(1.2 * TIMER_SCALE);
|
||||
all_timer_set_alarm_value(1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
all_timer_set_counter_value(0);
|
||||
all_timer_isr_reg();
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * TIMER_SCALE);
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * TIMER_SCALE);
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#endif
|
||||
|
||||
// enable interrupt of tg1_timer0 again
|
||||
// enable interrupt of tg0_timer0 again
|
||||
alarm_flag = false;
|
||||
TEST_ESP_OK(timer_pause(TIMER_GROUP_1, TIMER_0));
|
||||
TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_1, TIMER_0, 0));
|
||||
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
|
||||
TEST_ESP_OK(timer_enable_intr(TIMER_GROUP_1, TIMER_0));
|
||||
TEST_ESP_OK(timer_start(TIMER_GROUP_1, TIMER_0));
|
||||
timer_isr_check(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
|
||||
TEST_ESP_OK(timer_pause(TIMER_GROUP_0, TIMER_0));
|
||||
TEST_ESP_OK(timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0));
|
||||
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
|
||||
TEST_ESP_OK(timer_enable_intr(TIMER_GROUP_0, TIMER_0));
|
||||
TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0));
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
TEST_ASSERT_EQUAL(true, alarm_flag);
|
||||
all_timer_isr_unreg();
|
||||
all_timer_deinit();
|
||||
|
|
@ -757,10 +741,11 @@ TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
|
|||
intr_handle_t isr_handle = NULL;
|
||||
alarm_flag = false;
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_EN,
|
||||
.auto_reload = TIMER_AUTORELOAD_DIS,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL
|
||||
};
|
||||
|
|
@ -768,14 +753,14 @@ TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
|
|||
all_timer_init(&config, true);
|
||||
all_timer_pause();
|
||||
all_timer_set_counter_value(set_timer_val);
|
||||
all_timer_set_alarm_value(1.2 * TIMER_SCALE);
|
||||
all_timer_set_alarm_value(1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
|
||||
// enable interrupt of tg0_timer0
|
||||
TEST_ESP_OK(timer_group_intr_enable(TIMER_GROUP_0, TIMER_INTR_T0));
|
||||
TEST_ESP_OK(timer_isr_register(TIMER_GROUP_0, TIMER_0, test_timer_group_isr,
|
||||
GET_TIMER_INFO(TIMER_GROUP_0, TIMER_0), ESP_INTR_FLAG_LOWMED, &isr_handle));
|
||||
TEST_ESP_OK(timer_start(TIMER_GROUP_0, TIMER_0));
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TIMER_SCALE);
|
||||
timer_isr_check(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_DIS, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
TEST_ASSERT_EQUAL(true, alarm_flag);
|
||||
|
||||
// disable interrupt of tg0_timer0
|
||||
|
|
@ -795,10 +780,11 @@ TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
|
|||
TEST_CASE("Timer interrupt register", "[hw_timer]")
|
||||
{
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_DIS,
|
||||
.auto_reload = TIMER_AUTORELOAD_DIS,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL
|
||||
};
|
||||
|
|
@ -815,15 +801,19 @@ TEST_CASE("Timer interrupt register", "[hw_timer]")
|
|||
|
||||
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
|
||||
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 0.54);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
|
||||
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 0.34);
|
||||
#endif
|
||||
|
||||
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_0, TIMER_0, TIMER_AUTORELOAD_EN));
|
||||
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_0, TIMER_0, TIMER_ALARM_EN));
|
||||
timer_intr_enable_and_start(TIMER_GROUP_0, TIMER_0, 0.4);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
TEST_ESP_OK(timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN));
|
||||
TEST_ESP_OK(timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN));
|
||||
timer_intr_enable_and_start(TIMER_GROUP_1, TIMER_0, 0.6);
|
||||
#endif
|
||||
vTaskDelay(1000 / portTICK_PERIOD_MS);
|
||||
|
||||
// ISR hanlde function should be free before next ISR register.
|
||||
|
|
@ -845,34 +835,37 @@ TEST_CASE("Timer interrupt register", "[hw_timer]")
|
|||
TEST_CASE("Timer clock source", "[hw_timer]")
|
||||
{
|
||||
// configure clock source as APB clock
|
||||
uint32_t timer_scale = rtc_clk_apb_freq_get() / TIMER_DIVIDER;
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_DIS,
|
||||
.auto_reload = TIMER_AUTORELOAD_DIS,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL,
|
||||
.clk_src = TIMER_SRC_CLK_APB
|
||||
};
|
||||
all_timer_init(&config, true);
|
||||
all_timer_pause();
|
||||
all_timer_set_alarm_value(1.2 * timer_scale);
|
||||
all_timer_set_alarm_value(1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
all_timer_set_counter_value(0);
|
||||
all_timer_isr_reg();
|
||||
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * timer_scale);
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * timer_scale );
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#endif
|
||||
|
||||
// configure clock source as XTAL clock
|
||||
all_timer_pause();
|
||||
timer_scale = rtc_clk_xtal_freq_get() * 1000000 / TIMER_DIVIDER;
|
||||
config.clk_src = TIMER_SRC_CLK_XTAL;
|
||||
config.divider = rtc_clk_xtal_freq_get() * 1000000 / TEST_TIMER_RESOLUTION_HZ;
|
||||
all_timer_init(&config, true);
|
||||
all_timer_set_alarm_value(1.2 * timer_scale);
|
||||
all_timer_set_alarm_value(1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * timer_scale);
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * timer_scale );
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_0, TIMER_0, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
timer_intr_enable_disable_test(TIMER_GROUP_1, TIMER_0, 1.2 * TEST_TIMER_RESOLUTION_HZ);
|
||||
#endif
|
||||
|
||||
all_timer_isr_unreg();
|
||||
all_timer_deinit();
|
||||
|
|
@ -886,15 +879,15 @@ TEST_CASE("Timer ISR callback", "[hw_timer]")
|
|||
{
|
||||
alarm_flag = false;
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_EN,
|
||||
.auto_reload = TIMER_AUTORELOAD_DIS,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL,
|
||||
};
|
||||
uint32_t timer_scale = rtc_clk_apb_freq_get() / TIMER_DIVIDER;
|
||||
uint64_t alarm_cnt_val = 1.2 * timer_scale;
|
||||
uint64_t alarm_cnt_val = 1.2 * TEST_TIMER_RESOLUTION_HZ;
|
||||
uint64_t set_timer_val = 0x0;
|
||||
all_timer_init(&config, true);
|
||||
all_timer_pause();
|
||||
|
|
@ -918,6 +911,7 @@ TEST_CASE("Timer ISR callback", "[hw_timer]")
|
|||
vTaskDelay(2000 / portTICK_PERIOD_MS);
|
||||
TEST_ASSERT_EQUAL(false, alarm_flag);
|
||||
|
||||
#if SOC_TIMER_GROUPS > 1
|
||||
// add isr callback for tg1_timer0
|
||||
TEST_ESP_OK(timer_pause(TIMER_GROUP_1, TIMER_0));
|
||||
TEST_ESP_OK(timer_isr_callback_add(TIMER_GROUP_1, TIMER_0, test_timer_group_isr_cb,
|
||||
|
|
@ -935,19 +929,21 @@ TEST_CASE("Timer ISR callback", "[hw_timer]")
|
|||
TEST_ESP_OK(timer_start(TIMER_GROUP_1, TIMER_0));
|
||||
vTaskDelay(2000 / portTICK_PERIOD_MS);
|
||||
TEST_ASSERT_EQUAL(false, alarm_flag);
|
||||
#endif
|
||||
all_timer_deinit();
|
||||
}
|
||||
|
||||
/**
|
||||
* Timer memory test
|
||||
*/
|
||||
TEST_CASE("Timer memory test", "[hw_timer]")
|
||||
TEST_CASE("Timer init/deinit stress test", "[hw_timer]")
|
||||
{
|
||||
timer_config_t config = {
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.alarm_en = TIMER_ALARM_EN,
|
||||
.auto_reload = TIMER_AUTORELOAD_EN,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.divider = TIMER_DIVIDER,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.intr_type = TIMER_INTR_LEVEL,
|
||||
};
|
||||
|
|
@ -964,10 +960,10 @@ TEST_CASE("Timer memory test", "[hw_timer]")
|
|||
static void timer_group_test_init(void)
|
||||
{
|
||||
static const uint32_t time_ms = 100; // Alarm value 100ms.
|
||||
static const uint16_t timer_div = TIMER_DIVIDER; // Timer prescaler
|
||||
static const uint32_t ste_val = time_ms * (TIMER_BASE_CLK / timer_div / 1000);
|
||||
static const uint32_t ste_val = time_ms * TEST_TIMER_RESOLUTION_HZ / 1000;
|
||||
timer_config_t config = {
|
||||
.divider = timer_div,
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.counter_en = TIMER_PAUSE,
|
||||
.alarm_en = TIMER_ALARM_EN,
|
||||
|
|
@ -1028,7 +1024,8 @@ TEST_CASE("Timer check reinitialization sequence", "[hw_timer]")
|
|||
// 3 - deinit timer driver
|
||||
TEST_ESP_OK(timer_deinit(TIMER_GROUP_0, TIMER_0));
|
||||
timer_config_t config = {
|
||||
.divider = TIMER_DIVIDER,
|
||||
.clk_src = TIMER_SRC_CLK_APB,
|
||||
.divider = APB_CLK_FREQ / TEST_TIMER_RESOLUTION_HZ,
|
||||
.counter_dir = TIMER_COUNT_UP,
|
||||
.counter_en = TIMER_START,
|
||||
.alarm_en = TIMER_ALARM_EN,
|
||||
|
|
@ -1043,5 +1040,3 @@ TEST_CASE("Timer check reinitialization sequence", "[hw_timer]")
|
|||
// The pending timer interrupt should not be triggered
|
||||
TEST_ASSERT_EQUAL(0, timer_group_get_intr_status_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0);
|
||||
}
|
||||
|
||||
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684)
|
||||
|
|
|
|||
|
|
@ -102,7 +102,6 @@ api-reference/storage/index
|
|||
api-reference/peripherals/adc
|
||||
api-reference/peripherals/usb_host
|
||||
api-reference/peripherals/sigmadelta
|
||||
api-reference/peripherals/timer
|
||||
api-reference/peripherals/twai
|
||||
api-reference/peripherals/hmac
|
||||
api-reference/peripherals/usb_device
|
||||
|
|
|
|||
|
|
@ -4,13 +4,14 @@ General Purpose Timer
|
|||
:link_to_translation:`zh_CN:[中文]`
|
||||
|
||||
{IDF_TARGET_TIMER_COUNTER_BIT_WIDTH:default="54", esp32="64", esp32s2="64"}
|
||||
{IDF_TARGET_TIMERS_PER_GROUP:default="two", esp32c3="one"}
|
||||
{IDF_TARGET_TIMERS_TOTAL:default="four", esp32c3="two"}
|
||||
{IDF_TARGET_TIMER_GROUPS:default="two", esp8684="one"}
|
||||
{IDF_TARGET_TIMERS_PER_GROUP:default="two", esp32c3="one", esp8684="one"}
|
||||
{IDF_TARGET_TIMERS_TOTAL:default="four", esp32c3="two", esp8684="one"}
|
||||
|
||||
Introduction
|
||||
------------
|
||||
|
||||
The {IDF_TARGET_NAME} chip contains two hardware timer groups. Each group has {IDF_TARGET_TIMERS_PER_GROUP} general-purpose hardware timer(s). They are all {IDF_TARGET_TIMER_COUNTER_BIT_WIDTH}-bit generic timers based on 16-bit pre-scalers and {IDF_TARGET_TIMER_COUNTER_BIT_WIDTH}-bit up / down counters which are capable of being auto-reloaded.
|
||||
The {IDF_TARGET_NAME} chip contains {IDF_TARGET_TIMER_GROUPS} hardware timer group(s). Each group has {IDF_TARGET_TIMERS_PER_GROUP} general-purpose hardware timer(s). They are all {IDF_TARGET_TIMER_COUNTER_BIT_WIDTH}-bit generic timers based on 16-bit pre-scalers and {IDF_TARGET_TIMER_COUNTER_BIT_WIDTH}-bit up / down counters which are capable of being auto-reloaded.
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Functional Overview
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@ -29,7 +30,7 @@ The following sections of this document cover the typical steps to configure and
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Timer Initialization
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^^^^^^^^^^^^^^^^^^^^
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The two {IDF_TARGET_NAME} timer groups, with {IDF_TARGET_TIMERS_PER_GROUP} timer(s) in each, provide the total of {IDF_TARGET_TIMERS_TOTAL} individual timers for use. An {IDF_TARGET_NAME} timer group should be identified using :cpp:type:`timer_group_t`. An individual timer in a group should be identified with :cpp:type:`timer_idx_t`.
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The {IDF_TARGET_TIMER_GROUPS} {IDF_TARGET_NAME} timer group(s), with {IDF_TARGET_TIMERS_PER_GROUP} timer(s) in each, provide the total of {IDF_TARGET_TIMERS_TOTAL} individual timers for use. An {IDF_TARGET_NAME} timer group should be identified using :cpp:type:`timer_group_t`. An individual timer in a group should be identified with :cpp:type:`timer_idx_t`.
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First of all, the timer should be initialized by calling the function :cpp:func:`timer_init` and passing a structure :cpp:type:`timer_config_t` to it to define how the timer should operate. In particular, the following timer parameters can be set:
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Ładowanie…
Reference in New Issue