kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/tg_wdt_reboot_uart_garbage' into 'master'
bootloader: wait for UART FIFO to be empty before switching frequency See merge request !1511pull/1249/head
commit
8e04b86153
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@ -842,6 +842,13 @@ static void IRAM_ATTR flash_gpio_configure()
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static void clock_configure(void)
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static void clock_configure(void)
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{
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{
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// ROM bootloader may have put a lot of text into UART0 FIFO.
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// Wait for it to be printed.
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// This is not needed on power on reset, when ROM bootloader is running at
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// 40 MHz. But in case of TG WDT reset, CPU may still be running at >80 MHZ,
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// and will be done with the bootloader much earlier than UART FIFO is empty.
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uart_tx_wait_idle(0);
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/* Set CPU to 80MHz. Keep other clocks unmodified. */
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/* Set CPU to 80MHz. Keep other clocks unmodified. */
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rtc_cpu_freq_t cpu_freq = RTC_CPU_FREQ_80M;
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rtc_cpu_freq_t cpu_freq = RTC_CPU_FREQ_80M;
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@ -885,8 +892,7 @@ static void uart_console_configure(void)
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uartAttach();
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uartAttach();
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ets_install_uart_printf();
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ets_install_uart_printf();
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// ROM bootloader may have put a lot of text into UART0 FIFO.
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// Wait for UART FIFO to be empty.
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// Wait for it to be printed.
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uart_tx_wait_idle(0);
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uart_tx_wait_idle(0);
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#if CONFIG_CONSOLE_UART_CUSTOM
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#if CONFIG_CONSOLE_UART_CUSTOM
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