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spi: add enum for spi dma channels

pull/6718/head
Armando 2021-02-20 11:03:28 +08:00 zatwierdzone przez bot
rodzic d0415bd8f6
commit 889de9ebd9
11 zmienionych plików z 114 dodań i 99 usunięć
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33
components/driver/include/driver/spi_common.h
Wyświetl plik

@ -29,8 +29,6 @@ extern "C"
//Maximum amount of bytes that can be put in one DMA descriptor //Maximum amount of bytes that can be put in one DMA descriptor
#define SPI_MAX_DMA_LEN (4096-4) #define SPI_MAX_DMA_LEN (4096-4)
//Set the ``dma_chan`` to this, then driver will auto-alloc a DMA channel
#define DMA_AUTO_CHAN (-2)
/** /**
* Transform unsigned integer of length <= 32 bits to the format which can be * Transform unsigned integer of length <= 32 bits to the format which can be
@ -74,6 +72,24 @@ extern "C"
#define SPICOMMON_BUSFLAG_NATIVE_PINS SPICOMMON_BUSFLAG_IOMUX_PINS #define SPICOMMON_BUSFLAG_NATIVE_PINS SPICOMMON_BUSFLAG_IOMUX_PINS
/**
* @brief SPI DMA channels
*/
typedef enum {
SPI_DMA_DISABLED = 0, ///< Do not enable DMA for SPI
#if CONFIG_IDF_TARGET_ESP32
SPI_DMA_CH1 = 1, ///< Enable DMA, select DMA Channel 1
SPI_DMA_CH2 = 2, ///< Enable DMA, select DMA Channel 2
#endif
SPI_DMA_CH_AUTO = 3, ///< Enable DMA, channel is automatically selected by driver
} spi_common_dma_t;
#if __cplusplus
/* Needed for C++ backwards compatibility with earlier ESP-IDF where this argument is a bare 'int'. Can be removed in ESP-IDF 5 */
typedef int spi_dma_chan_t;
#else
typedef spi_common_dma_t spi_dma_chan_t;
#endif
/** /**
* @brief This is a configuration structure for a SPI bus. * @brief This is a configuration structure for a SPI bus.
@ -107,13 +123,10 @@ typedef struct {
* *
* @param host_id SPI peripheral that controls this bus * @param host_id SPI peripheral that controls this bus
* @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized * @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized
* @param dma_chan - DMA_AUTO_CHAN: allocate a free channel automatically; * @param dma_chan - Selecting a DMA channel for an SPI bus allows transactions on the bus with size only limited by the amount of internal memory.
* - 1 or 2: assign a specific DMA channel; * - Selecting SPI_DMA_DISABLED limits the size of transactions.
* - 0: non-dma mode; * - Set to SPI_DMA_DISABLED if only the SPI flash uses this bus.
* Selecting a DMA channel for an SPI bus allows transfers on the bus to have sizes only * - Set to SPI_DMA_CH_AUTO to let the driver to allocate the DMA channel.
* limited by the amount of internal memory. Selecting no DMA channel (by passing the
* value 0) limits the amount of bytes transfered to a maximum of 64. Set to 0 if only
* the SPI flash uses this bus. Set to DMA_AUTO_CHAN to let the driver to allocate the DMA channel.
* *
* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in * @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
* DMA-capable memory. * DMA-capable memory.
@ -129,7 +142,7 @@ typedef struct {
* - ESP_ERR_NO_MEM if out of memory * - ESP_ERR_NO_MEM if out of memory
* - ESP_OK on success * - ESP_OK on success
*/ */
esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, int dma_chan); esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, spi_dma_chan_t dma_chan);
/** /**
* @brief Free a SPI bus * @brief Free a SPI bus

4
components/driver/include/driver/spi_common_internal.h
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@ -121,7 +121,7 @@ bool spicommon_periph_free(spi_host_device_t host);
* @brief Alloc DMA for SPI Slave * @brief Alloc DMA for SPI Slave
* *
* @param host_id SPI host ID * @param host_id SPI host ID
* @param dma_chan DMA_AUTO_CHAN: auto dma allocate mode; 0: non-dma mode; 1 or 2: assign a specific DMA channel; * @param dma_chan DMA channel to be used
* @param[out] out_actual_tx_dma_chan Actual TX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before) * @param[out] out_actual_tx_dma_chan Actual TX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before)
* @param[out] out_actual_rx_dma_chan Actual RX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before) * @param[out] out_actual_rx_dma_chan Actual RX DMA channel (if you choose to assign a specific DMA channel, this will be the channel you assigned before)
* *
@ -130,7 +130,7 @@ bool spicommon_periph_free(spi_host_device_t host);
* - ESP_ERR_NO_MEM: No enough memory * - ESP_ERR_NO_MEM: No enough memory
* - ESP_ERR_NOT_FOUND: There is no available DMA channel * - ESP_ERR_NOT_FOUND: There is no available DMA channel
*/ */
esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan); esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan);
/** /**
* @brief Free DMA for SPI Slave * @brief Free DMA for SPI Slave

13
components/driver/include/driver/spi_slave.h
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@ -93,13 +93,10 @@ struct spi_slave_transaction_t {
* @param host SPI peripheral to use as a SPI slave interface * @param host SPI peripheral to use as a SPI slave interface
* @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized * @param bus_config Pointer to a spi_bus_config_t struct specifying how the host should be initialized
* @param slave_config Pointer to a spi_slave_interface_config_t struct specifying the details for the slave interface * @param slave_config Pointer to a spi_slave_interface_config_t struct specifying the details for the slave interface
* @param dma_chan - DMA_AUTO_CHAN: allocate a free channel automatically; * @param dma_chan - Selecting a DMA channel for an SPI bus allows transactions on the bus with size only limited by the amount of internal memory.
* - 1 or 2: assign a specific DMA channel; * - Selecting SPI_DMA_DISABLED limits the size of transactions.
* - 0: non-dma mode; * - Set to SPI_DMA_DISABLED if only the SPI flash uses this bus.
* Selecting a DMA channel for an SPI bus allows transfers on the bus to have sizes only * - Set to SPI_DMA_CH_AUTO to let the driver to allocate the DMA channel.
* limited by the amount of internal memory. Selecting no DMA channel (by passing the
* value 0) limits the amount of bytes transfered to a maximum of 64. Set to 0 if only
* the SPI flash uses this bus. Set to DMA_AUTO_CHAN to let the driver to allocate the DMA channel.
* *
* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in * @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
* DMA-capable memory. * DMA-capable memory.
@ -115,7 +112,7 @@ struct spi_slave_transaction_t {
* - ESP_ERR_NO_MEM if out of memory * - ESP_ERR_NO_MEM if out of memory
* - ESP_OK on success * - ESP_OK on success
*/ */
esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, int dma_chan); esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, spi_dma_chan_t dma_chan);
/** /**
* @brief Free a SPI bus claimed as a SPI slave interface * @brief Free a SPI bus claimed as a SPI slave interface

6
components/driver/include/driver/spi_slave_hd.h
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@ -86,11 +86,7 @@ typedef struct {
uint32_t address_bits; ///< address field bits, multiples of 8 and at least 8. uint32_t address_bits; ///< address field bits, multiples of 8 and at least 8.
uint32_t dummy_bits; ///< dummy field bits, multiples of 8 and at least 8. uint32_t dummy_bits; ///< dummy field bits, multiples of 8 and at least 8.
uint32_t queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_hd_queue_trans but not yet finished using spi_slave_hd_get_trans_result) at the same time uint32_t queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_hd_queue_trans but not yet finished using spi_slave_hd_get_trans_result) at the same time
int dma_chan; /**< DMA channel to used. spi_dma_chan_t dma_chan; ///< DMA channel to used.
* - DMA_AUTO_CHAN: allocate a free channel automatically;
* - 1 or 2: assign a specific DMA channel;
* - 0: non-dma mode;
*/
spi_slave_hd_callback_config_t cb_config; ///< Callback configuration spi_slave_hd_callback_config_t cb_config; ///< Callback configuration
} spi_slave_hd_slot_config_t; } spi_slave_hd_slot_config_t;

51
components/driver/spi_common.c
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@ -164,8 +164,7 @@ static inline periph_module_t get_dma_periph(int dma_chan)
#endif #endif
} }
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_dma_chan)
static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{ {
bool ret = false; bool ret = false;
@ -174,8 +173,7 @@ static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_tx_dma_c
if (!is_used) { if (!is_used) {
spi_dma_chan_enabled |= BIT(dma_chan); spi_dma_chan_enabled |= BIT(dma_chan);
periph_module_enable(get_dma_periph(dma_chan)); periph_module_enable(get_dma_periph(dma_chan));
*out_actual_tx_dma_chan = dma_chan; *out_actual_dma_chan = dma_chan;
*out_actual_rx_dma_chan = dma_chan;
ret = true; ret = true;
} }
portEXIT_CRITICAL(&spi_dma_spinlock); portEXIT_CRITICAL(&spi_dma_spinlock);
@ -192,34 +190,39 @@ static void spicommon_connect_spi_and_dma(spi_host_device_t host, int dma_chan)
#endif #endif
} }
static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan) static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{ {
assert(is_valid_host(host_id)); assert(is_valid_host(host_id));
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
assert((dma_chan > 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN); assert(dma_chan > SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO);
#elif CONFIG_IDF_TARGET_ESP32S2 #elif CONFIG_IDF_TARGET_ESP32S2
assert(dma_chan == host_id || dma_chan == DMA_AUTO_CHAN); assert(dma_chan == (int)host_id || dma_chan == SPI_DMA_CH_AUTO);
#endif #endif
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
bool success = false; bool success = false;
uint32_t actual_dma_chan = 0;
if (dma_chan == DMA_AUTO_CHAN) { if (dma_chan == SPI_DMA_CH_AUTO) {
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
for (int i = 1; i < SOC_SPI_DMA_CHAN_NUM+1; i++) { for (int i = 1; i < SOC_SPI_DMA_CHAN_NUM+1; i++) {
success = spicommon_dma_chan_claim(i, out_actual_tx_dma_chan, out_actual_rx_dma_chan); success = spicommon_dma_chan_claim(i, &actual_dma_chan);
if (success) { if (success) {
break; break;
} }
} }
#elif CONFIG_IDF_TARGET_ESP32S2 #elif CONFIG_IDF_TARGET_ESP32S2
//On ESP32S2, each SPI controller has its own DMA channel //On ESP32S2, each SPI controller has its own DMA channel
success = spicommon_dma_chan_claim(host_id, out_actual_tx_dma_chan, out_actual_rx_dma_chan); success = spicommon_dma_chan_claim(host_id, &actual_dma_chan);
#endif //#if CONFIG_IDF_TARGET_XXX #endif //#if CONFIG_IDF_TARGET_XXX
} else if (dma_chan > 0) { } else {
success = spicommon_dma_chan_claim(dma_chan, out_actual_tx_dma_chan, out_actual_rx_dma_chan); success = spicommon_dma_chan_claim((int)dma_chan, &actual_dma_chan);
} }
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
*out_actual_tx_dma_chan = actual_dma_chan;
*out_actual_rx_dma_chan = actual_dma_chan;
if (!success) { if (!success) {
SPI_CHECK(false, "no available dma channel", ESP_ERR_NOT_FOUND); SPI_CHECK(false, "no available dma channel", ESP_ERR_NOT_FOUND);
} }
@ -230,15 +233,15 @@ static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_cha
} }
#else //SOC_GDMA_SUPPORTED #else //SOC_GDMA_SUPPORTED
static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan) static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{ {
assert(is_valid_host(host_id)); assert(is_valid_host(host_id));
assert(dma_chan == DMA_AUTO_CHAN); assert(dma_chan == SPI_DMA_CH_AUTO);
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
spicommon_bus_context_t *ctx = bus_ctx[host_id]; spicommon_bus_context_t *ctx = bus_ctx[host_id];
if (dma_chan == DMA_AUTO_CHAN) { if (dma_chan == SPI_DMA_CH_AUTO) {
gdma_channel_alloc_config_t tx_alloc_config = { gdma_channel_alloc_config_t tx_alloc_config = {
.flags.reserve_sibling = 1, .flags.reserve_sibling = 1,
.direction = GDMA_CHANNEL_DIRECTION_TX, .direction = GDMA_CHANNEL_DIRECTION_TX,
@ -275,10 +278,14 @@ static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_cha
} }
#endif //#if !SOC_GDMA_SUPPORTED #endif //#if !SOC_GDMA_SUPPORTED
esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan) esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{ {
assert(is_valid_host(host_id)); assert(is_valid_host(host_id));
assert((dma_chan == 1 || dma_chan == 2 || dma_chan == DMA_AUTO_CHAN)); #if CONFIG_IDF_TARGET_ESP32
assert(dma_chan > SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO);
#elif CONFIG_IDF_TARGET_ESP32S2
assert(dma_chan == (int)host_id || dma_chan == SPI_DMA_CH_AUTO);
#endif
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
uint32_t actual_tx_dma_chan = 0; uint32_t actual_tx_dma_chan = 0;
@ -608,7 +615,7 @@ spi_bus_lock_handle_t spi_bus_lock_get_by_id(spi_host_device_t host_id)
} }
//----------------------------------------------------------master bus init-------------------------------------------------------// //----------------------------------------------------------master bus init-------------------------------------------------------//
esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, int dma_chan) esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, spi_dma_chan_t dma_chan)
{ {
esp_err_t err = ESP_OK; esp_err_t err = ESP_OK;
spicommon_bus_context_t *ctx = NULL; spicommon_bus_context_t *ctx = NULL;
@ -619,11 +626,11 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
SPI_CHECK(is_valid_host(host_id), "invalid host_id", ESP_ERR_INVALID_ARG); SPI_CHECK(is_valid_host(host_id), "invalid host_id", ESP_ERR_INVALID_ARG);
SPI_CHECK(bus_ctx[host_id] == NULL, "SPI bus already initialized.", ESP_ERR_INVALID_STATE); SPI_CHECK(bus_ctx[host_id] == NULL, "SPI bus already initialized.", ESP_ERR_INVALID_STATE);
#ifdef CONFIG_IDF_TARGET_ESP32 #ifdef CONFIG_IDF_TARGET_ESP32
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG ); SPI_CHECK(dma_chan >= SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif CONFIG_IDF_TARGET_ESP32S2 #elif CONFIG_IDF_TARGET_ESP32S2
SPI_CHECK( dma_chan == 0 || dma_chan == host_id || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG ); SPI_CHECK( dma_chan == SPI_DMA_DISABLED || dma_chan == (int)host_id || dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif SOC_GDMA_SUPPORTED #elif SOC_GDMA_SUPPORTED
SPI_CHECK( dma_chan == 0 || dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG ); SPI_CHECK( dma_chan == SPI_DMA_DISABLED || dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
#endif #endif
SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG); SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG);
#ifndef CONFIG_SPI_MASTER_ISR_IN_IRAM #ifndef CONFIG_SPI_MASTER_ISR_IN_IRAM
@ -644,7 +651,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
bus_attr = &ctx->bus_attr; bus_attr = &ctx->bus_attr;
bus_attr->bus_cfg = *bus_config; bus_attr->bus_cfg = *bus_config;
if (dma_chan != 0) { if (dma_chan != SPI_DMA_DISABLED) {
bus_attr->dma_enabled = 1; bus_attr->dma_enabled = 1;
err = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan); err = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);

10
components/driver/spi_slave.c
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@ -112,7 +112,7 @@ static inline void restore_cs(spi_slave_t *host)
} }
} }
esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, int dma_chan) esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *bus_config, const spi_slave_interface_config_t *slave_config, spi_dma_chan_t dma_chan)
{ {
bool spi_chan_claimed; bool spi_chan_claimed;
uint32_t actual_tx_dma_chan = 0; uint32_t actual_tx_dma_chan = 0;
@ -122,11 +122,11 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
//We only support HSPI/VSPI, period. //We only support HSPI/VSPI, period.
SPI_CHECK(is_valid_host(host), "invalid host", ESP_ERR_INVALID_ARG); SPI_CHECK(is_valid_host(host), "invalid host", ESP_ERR_INVALID_ARG);
#ifdef CONFIG_IDF_TARGET_ESP32 #ifdef CONFIG_IDF_TARGET_ESP32
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG ); SPI_CHECK(dma_chan >= SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif CONFIG_IDF_TARGET_ESP32S2 #elif CONFIG_IDF_TARGET_ESP32S2
SPI_CHECK( dma_chan == 0 || dma_chan == host || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG ); SPI_CHECK( dma_chan == SPI_DMA_DISABLED || dma_chan == (int)host || dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif SOC_GDMA_SUPPORTED #elif SOC_GDMA_SUPPORTED
SPI_CHECK( dma_chan == 0 || dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG ); SPI_CHECK( dma_chan == SPI_DMA_DISABLED || dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
#endif #endif
SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG); SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG);
#ifndef CONFIG_SPI_SLAVE_ISR_IN_IRAM #ifndef CONFIG_SPI_SLAVE_ISR_IN_IRAM
@ -146,7 +146,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t)); memcpy(&spihost[host]->cfg, slave_config, sizeof(spi_slave_interface_config_t));
spihost[host]->id = host; spihost[host]->id = host;
bool use_dma = (dma_chan != 0); bool use_dma = (dma_chan != SPI_DMA_DISABLED);
spihost[host]->dma_enabled = use_dma; spihost[host]->dma_enabled = use_dma;
if (use_dma) { if (use_dma) {
ret = spicommon_slave_dma_chan_alloc(host, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan); ret = spicommon_slave_dma_chan_alloc(host, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);

6
components/driver/spi_slave_hd.c
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@ -75,9 +75,9 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
SPIHD_CHECK(VALID_HOST(host_id), "invalid host", ESP_ERR_INVALID_ARG); SPIHD_CHECK(VALID_HOST(host_id), "invalid host", ESP_ERR_INVALID_ARG);
#if CONFIG_IDF_TARGET_ESP32S2 #if CONFIG_IDF_TARGET_ESP32S2
SPIHD_CHECK(config->dma_chan == 0 || config->dma_chan == host_id || config->dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG); SPIHD_CHECK(config->dma_chan == SPI_DMA_DISABLED || config->dma_chan == (int)host_id || config->dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG);
#elif SOC_GDMA_SUPPORTED #elif SOC_GDMA_SUPPORTED
SPIHD_CHECK(config->dma_chan == 0 || config->dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG); SPIHD_CHECK(config->dma_chan == SPI_DMA_DISABLED || config->dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG);
#endif #endif
#if !CONFIG_IDF_TARGET_ESP32S2 #if !CONFIG_IDF_TARGET_ESP32S2
//Append mode is only supported on ESP32S2 now //Append mode is only supported on ESP32S2 now
@ -95,7 +95,7 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b
spihost[host_id] = host; spihost[host_id] = host;
memset(host, 0, sizeof(spi_slave_hd_slot_t)); memset(host, 0, sizeof(spi_slave_hd_slot_t));
host->int_spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED; host->int_spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
host->dma_enabled = (config->dma_chan != 0); host->dma_enabled = (config->dma_chan != SPI_DMA_DISABLED);
if (host->dma_enabled) { if (host->dma_enabled) {
ret = spicommon_slave_dma_chan_alloc(host_id, config->dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan); ret = spicommon_slave_dma_chan_alloc(host_id, config->dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);

22
components/driver/test/test_spi_master.c
Wyświetl plik

@ -74,7 +74,7 @@ TEST_CASE("SPI Master clockdiv calculation routines", "[spi]")
.quadhd_io_num=-1 .quadhd_io_num=-1
}; };
esp_err_t ret; esp_err_t ret;
ret = spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN); ret = spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO);
TEST_ASSERT(ret==ESP_OK); TEST_ASSERT(ret==ESP_OK);
check_spi_pre_n_for(26000000, 1, 3); check_spi_pre_n_for(26000000, 1, 3);
@ -112,7 +112,7 @@ static spi_device_handle_t setup_spi_bus_loopback(int clkspeed, bool dma) {
}; };
spi_device_handle_t handle; spi_device_handle_t handle;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma ? DMA_AUTO_CHAN : 0)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma ? SPI_DMA_CH_AUTO : 0));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &handle)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &handle));
//connect MOSI to two devices breaks the output, fix it. //connect MOSI to two devices breaks the output, fix it.
spitest_gpio_output_sel(PIN_NUM_MOSI, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out); spitest_gpio_output_sel(PIN_NUM_MOSI, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
@ -273,7 +273,7 @@ static esp_err_t test_master_pins(int mosi, int miso, int sclk, int cs)
spi_device_interface_config_t master_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG(); spi_device_interface_config_t master_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
master_cfg.spics_io_num = cs; master_cfg.spics_io_num = cs;
ret = spi_bus_initialize(TEST_SPI_HOST, &cfg, DMA_AUTO_CHAN); ret = spi_bus_initialize(TEST_SPI_HOST, &cfg, SPI_DMA_CH_AUTO);
if (ret != ESP_OK) { if (ret != ESP_OK) {
return ret; return ret;
} }
@ -300,7 +300,7 @@ static esp_err_t test_slave_pins(int mosi, int miso, int sclk, int cs)
spi_slave_interface_config_t slave_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG(); spi_slave_interface_config_t slave_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
slave_cfg.spics_io_num = cs; slave_cfg.spics_io_num = cs;
ret = spi_slave_initialize(TEST_SLAVE_HOST, &cfg, &slave_cfg, DMA_AUTO_CHAN); ret = spi_slave_initialize(TEST_SLAVE_HOST, &cfg, &slave_cfg, SPI_DMA_CH_AUTO);
if (ret != ESP_OK) { if (ret != ESP_OK) {
return ret; return ret;
} }
@ -507,7 +507,7 @@ TEST_CASE("SPI Master no response when switch from host1 (HSPI) to host2 (VSPI)"
//initialize for first host //initialize for first host
host = TEST_SPI_HOST; host = TEST_SPI_HOST;
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_bus_initialize(host, &bus_config, SPI_DMA_CH_AUTO));
TEST_ESP_OK(spi_bus_add_device(host, &device_config, &spi)); TEST_ESP_OK(spi_bus_add_device(host, &device_config, &spi));
printf("before first xmit\n"); printf("before first xmit\n");
@ -519,7 +519,7 @@ TEST_CASE("SPI Master no response when switch from host1 (HSPI) to host2 (VSPI)"
//for second host and failed before //for second host and failed before
host = TEST_SLAVE_HOST; host = TEST_SLAVE_HOST;
TEST_ESP_OK(spi_bus_initialize(host, &bus_config, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_bus_initialize(host, &bus_config, SPI_DMA_CH_AUTO));
TEST_ESP_OK(spi_bus_add_device(host, &device_config, &spi)); TEST_ESP_OK(spi_bus_add_device(host, &device_config, &spi));
printf("before second xmit\n"); printf("before second xmit\n");
@ -587,7 +587,7 @@ TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
spi_device_interface_config_t devcfg=SPI_DEVICE_TEST_DEFAULT_CONFIG(); spi_device_interface_config_t devcfg=SPI_DEVICE_TEST_DEFAULT_CONFIG();
//Initialize the SPI bus //Initialize the SPI bus
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
//Attach the LCD to the SPI bus //Attach the LCD to the SPI bus
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi));
//connect MOSI to two devices breaks the output, fix it. //connect MOSI to two devices breaks the output, fix it.
@ -671,7 +671,7 @@ TEST_CASE("SPI Master DMA test: length, start, not aligned", "[spi]")
.pre_cb=NULL, .pre_cb=NULL,
}; };
//Initialize the SPI bus //Initialize the SPI bus
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
//Attach the LCD to the SPI bus //Attach the LCD to the SPI bus
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &spi));
@ -740,7 +740,7 @@ void test_cmd_addr(spi_slave_task_context_t *slave_context, bool lsb_first)
//initial master, mode 0, 1MHz //initial master, mode 0, 1MHz
spi_bus_config_t buscfg=SPI_BUS_TEST_DEFAULT_CONFIG(); spi_bus_config_t buscfg=SPI_BUS_TEST_DEFAULT_CONFIG();
buscfg.quadhd_io_num = UNCONNECTED_PIN; buscfg.quadhd_io_num = UNCONNECTED_PIN;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
spi_device_interface_config_t devcfg=SPI_DEVICE_TEST_DEFAULT_CONFIG(); spi_device_interface_config_t devcfg=SPI_DEVICE_TEST_DEFAULT_CONFIG();
devcfg.clock_speed_hz = 1*1000*1000; devcfg.clock_speed_hz = 1*1000*1000;
if (lsb_first) devcfg.flags |= SPI_DEVICE_BIT_LSBFIRST; if (lsb_first) devcfg.flags |= SPI_DEVICE_BIT_LSBFIRST;
@ -978,6 +978,8 @@ TEST_CASE("SPI master hd dma TX without RX test", "[spi]")
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &spi)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &dev_cfg, &spi));
spi_slave_interface_config_t slave_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG(); spi_slave_interface_config_t slave_cfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
printf("TEST_SLAVE_HOST is %d\n", TEST_SLAVE_HOST);
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &bus_cfg, &slave_cfg, TEST_SLAVE_HOST)); TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &bus_cfg, &slave_cfg, TEST_SLAVE_HOST));
same_pin_func_sel(bus_cfg, dev_cfg, 0); same_pin_func_sel(bus_cfg, dev_cfg, 0);
@ -1075,7 +1077,7 @@ static void speed_setup(spi_device_handle_t* spi, bool use_dma)
devcfg.queue_size=8; //We want to be able to queue 7 transactions at a time devcfg.queue_size=8; //We want to be able to queue 7 transactions at a time
//Initialize the SPI bus and the device to test //Initialize the SPI bus and the device to test
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, (use_dma ? DMA_AUTO_CHAN : 0))); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, (use_dma ? SPI_DMA_CH_AUTO : 0)));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
} }

58
components/driver/test/test_spi_param.c
Wyświetl plik

@ -99,13 +99,13 @@ static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_p
slvcfg.mode = pset->mode; slvcfg.mode = pset->mode;
slave_pull_up(&buscfg, slvcfg.spics_io_num); slave_pull_up(&buscfg, slvcfg.spics_io_num);
int dma_chan = (pset->master_dma_chan == 0) ? 0 : DMA_AUTO_CHAN; int dma_chan = (pset->master_dma_chan == 0) ? 0 : SPI_DMA_CH_AUTO;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma_chan)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, dma_chan));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
//slave automatically use iomux pins if pins are on VSPI_* pins //slave automatically use iomux pins if pins are on VSPI_* pins
buscfg.quadhd_io_num = -1; buscfg.quadhd_io_num = -1;
int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : DMA_AUTO_CHAN; int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : SPI_DMA_CH_AUTO;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, slave_dma_chan)); TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, slave_dma_chan));
//initialize master and slave on the same pins break some of the output configs, fix them //initialize master and slave on the same pins break some of the output configs, fix them
@ -393,7 +393,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M, .master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX, .dup = FULL_DUPLEX,
.mode = 0, .mode = 0,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT, .slave_tv_ns = TV_INT_CONNECT,
@ -405,7 +405,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M, .master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX, .dup = FULL_DUPLEX,
.mode = 1, .mode = 1,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT, .slave_tv_ns = TV_INT_CONNECT,
@ -416,7 +416,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M, .master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX, .dup = FULL_DUPLEX,
.mode = 2, .mode = 2,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT, .slave_tv_ns = TV_INT_CONNECT,
@ -428,7 +428,7 @@ static spitest_param_set_t mode_pgroup[] = {
.master_limit = SPI_MASTER_FREQ_13M, .master_limit = SPI_MASTER_FREQ_13M,
.dup = FULL_DUPLEX, .dup = FULL_DUPLEX,
.mode = 3, .mode = 3,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT, .slave_tv_ns = TV_INT_CONNECT,
@ -471,7 +471,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local, .freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO, .dup = HALF_DUPLEX_MISO,
.mode = 0, .mode = 0,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA, .slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA,
@ -481,7 +481,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local, .freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO, .dup = HALF_DUPLEX_MISO,
.mode = 1, .mode = 1,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT, .slave_tv_ns = TV_INT_CONNECT,
@ -491,7 +491,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local, .freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO, .dup = HALF_DUPLEX_MISO,
.mode = 2, .mode = 2,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA, .slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA,
@ -501,7 +501,7 @@ static spitest_param_set_t mode_pgroup[] = {
.freq_list = test_freq_mode_local, .freq_list = test_freq_mode_local,
.dup = HALF_DUPLEX_MISO, .dup = HALF_DUPLEX_MISO,
.mode = 3, .mode = 3,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.master_iomux = false, .master_iomux = false,
.slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX, .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
.slave_tv_ns = TV_INT_CONNECT, .slave_tv_ns = TV_INT_CONNECT,
@ -546,7 +546,7 @@ TEST_CASE("Slave receive correct data", "[spi]")
.master_iomux = false, .master_iomux = false,
.slave_iomux = false, .slave_iomux = false,
.master_dma_chan = 0, .master_dma_chan = 0,
.slave_dma_chan = (dma_chan ? DMA_AUTO_CHAN: 0), .slave_dma_chan = (dma_chan ? SPI_DMA_CH_AUTO: 0),
}; };
ESP_LOGI(SLAVE_TAG, "Test slave recv @ mode %d, dma enabled=%d", spi_mode, dma_chan); ESP_LOGI(SLAVE_TAG, "Test slave recv @ mode %d, dma enabled=%d", spi_mode, dma_chan);
@ -704,7 +704,7 @@ static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_
devpset.clock_speed_hz = freq; devpset.clock_speed_hz = freq;
if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY; if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY;
int dma_chan = (pset->master_dma_chan == 0) ? 0 : DMA_AUTO_CHAN; int dma_chan = (pset->master_dma_chan == 0) ? 0 : SPI_DMA_CH_AUTO;
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, dma_chan)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, dma_chan));
TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devpset, spi)); TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devpset, spi));
@ -825,7 +825,7 @@ static void timing_slave_start(int speed, const spitest_param_set_t* pset, spite
//Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected. //Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
slave_pull_up(&slv_buscfg, slvcfg.spics_io_num); slave_pull_up(&slv_buscfg, slvcfg.spics_io_num);
int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : DMA_AUTO_CHAN; int slave_dma_chan = (pset->slave_dma_chan == 0) ? 0 : SPI_DMA_CH_AUTO;
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &slv_buscfg, &slvcfg, slave_dma_chan)); TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &slv_buscfg, &slvcfg, slave_dma_chan));
//prepare data for the master //prepare data for the master
@ -1086,8 +1086,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = DELAY_HCLK_UNTIL_7M, .slave_tv_ns = DELAY_HCLK_UNTIL_7M,
.mode = 0, .mode = 0,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.length_aligned = true, .length_aligned = true,
}, },
{ .pset_name = "mode 1, DMA", { .pset_name = "mode 1, DMA",
@ -1098,8 +1098,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE, .slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 1, .mode = 1,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.length_aligned = true, .length_aligned = true,
}, },
{ .pset_name = "mode 2, DMA", { .pset_name = "mode 2, DMA",
@ -1110,8 +1110,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = DELAY_HCLK_UNTIL_7M, .slave_tv_ns = DELAY_HCLK_UNTIL_7M,
.mode = 2, .mode = 2,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.length_aligned = true, .length_aligned = true,
}, },
{ .pset_name = "mode 3, DMA", { .pset_name = "mode 3, DMA",
@ -1122,8 +1122,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE, .slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 3, .mode = 3,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
.length_aligned = true, .length_aligned = true,
}, },
//the master can only read to 16MHz, use half-duplex mode to read at 20. //the master can only read to 16MHz, use half-duplex mode to read at 20.
@ -1134,8 +1134,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE, .slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 0, .mode = 0,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
}, },
{ .pset_name = "mode 1, DMA, 20M", { .pset_name = "mode 1, DMA, 20M",
.freq_list = test_freq_20M_only, .freq_list = test_freq_20M_only,
@ -1144,8 +1144,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE, .slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 1, .mode = 1,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
}, },
{ .pset_name = "mode 2, DMA, 20M", { .pset_name = "mode 2, DMA, 20M",
.freq_list = test_freq_20M_only, .freq_list = test_freq_20M_only,
@ -1154,8 +1154,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE, .slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 2, .mode = 2,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
}, },
{ .pset_name = "mode 3, DMA, 20M", { .pset_name = "mode 3, DMA, 20M",
.freq_list = test_freq_20M_only, .freq_list = test_freq_20M_only,
@ -1164,8 +1164,8 @@ spitest_param_set_t mode_conf[] = {
.slave_iomux = true, .slave_iomux = true,
.slave_tv_ns = TV_WITH_ESP_SLAVE, .slave_tv_ns = TV_WITH_ESP_SLAVE,
.mode = 3, .mode = 3,
.master_dma_chan = DMA_AUTO_CHAN, .master_dma_chan = SPI_DMA_CH_AUTO,
.slave_dma_chan = DMA_AUTO_CHAN, .slave_dma_chan = SPI_DMA_CH_AUTO,
}, },
}; };
TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "") TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "")

6
components/driver/test/test_spi_slave.c
Wyświetl plik

@ -48,7 +48,7 @@ static void master_init_nodma( spi_device_handle_t* spi)
.cs_ena_pretrans=1, .cs_ena_pretrans=1,
}; };
//Initialize the SPI bus //Initialize the SPI bus
ret=spi_bus_initialize(TEST_SPI_HOST, &buscfg, DMA_AUTO_CHAN); ret=spi_bus_initialize(TEST_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO);
TEST_ASSERT(ret==ESP_OK); TEST_ASSERT(ret==ESP_OK);
//Attach the LCD to the SPI bus //Attach the LCD to the SPI bus
ret=spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi); ret=spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi);
@ -75,7 +75,7 @@ static void slave_init(void)
gpio_set_pull_mode(PIN_NUM_CLK, GPIO_PULLUP_ONLY); gpio_set_pull_mode(PIN_NUM_CLK, GPIO_PULLUP_ONLY);
gpio_set_pull_mode(PIN_NUM_CS, GPIO_PULLUP_ONLY); gpio_set_pull_mode(PIN_NUM_CS, GPIO_PULLUP_ONLY);
//Initialize SPI slave interface //Initialize SPI slave interface
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO));
} }
TEST_CASE("test slave send unaligned","[spi]") TEST_CASE("test slave send unaligned","[spi]")
@ -220,7 +220,7 @@ static void unaligned_test_slave(void)
{ {
spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG(); spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG(); spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO));
uint8_t *slave_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA); uint8_t *slave_send_buf = heap_caps_malloc(BUF_SIZE, MALLOC_CAP_DMA);
uint8_t *slave_recv_buf = heap_caps_calloc(BUF_SIZE, 1, MALLOC_CAP_DMA); uint8_t *slave_recv_buf = heap_caps_calloc(BUF_SIZE, 1, MALLOC_CAP_DMA);

4
components/driver/test/test_spi_slave_hd.c
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@ -99,7 +99,7 @@ static void init_master_hd(spi_device_handle_t* spi, const spitest_param_set_t*
bus_cfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS; bus_cfg.flags |= SPICOMMON_BUSFLAG_GPIO_PINS;
#endif #endif
TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, DMA_AUTO_CHAN)); TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &bus_cfg, SPI_DMA_CH_AUTO));
spi_device_interface_config_t dev_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG(); spi_device_interface_config_t dev_cfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
dev_cfg.flags = SPI_DEVICE_HALFDUPLEX; dev_cfg.flags = SPI_DEVICE_HALFDUPLEX;
dev_cfg.command_bits = 8; dev_cfg.command_bits = 8;
@ -122,7 +122,7 @@ static void init_slave_hd(int mode, bool append_mode, const spi_slave_hd_callbac
#endif #endif
spi_slave_hd_slot_config_t slave_hd_cfg = SPI_SLOT_TEST_DEFAULT_CONFIG(); spi_slave_hd_slot_config_t slave_hd_cfg = SPI_SLOT_TEST_DEFAULT_CONFIG();
slave_hd_cfg.mode = mode; slave_hd_cfg.mode = mode;
slave_hd_cfg.dma_chan = DMA_AUTO_CHAN; slave_hd_cfg.dma_chan = SPI_DMA_CH_AUTO;
if (append_mode) { if (append_mode) {
slave_hd_cfg.flags |= SPI_SLAVE_HD_APPEND_MODE; slave_hd_cfg.flags |= SPI_SLAVE_HD_APPEND_MODE;
} }