esp_rom: put rom cache related functions to cache.h

components/esp_rom/esp32h2/ld/esp32h2.rom.api.ld

@@ -31,7 +31,6 @@ PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
 
-
 PROVIDE ( esp_rom_md5_init   = MD5Init );
 PROVIDE ( esp_rom_md5_update = MD5Update );
 PROVIDE ( esp_rom_md5_final  = MD5Final );

components/esp_rom/esp32h4/ld/rev1/esp32h4.rom.api.ld

@@ -33,7 +33,6 @@ PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
 
-
 PROVIDE ( esp_rom_md5_init   = MD5Init );
 PROVIDE ( esp_rom_md5_update = MD5Update );
 PROVIDE ( esp_rom_md5_final  = MD5Final );

components/esp_rom/esp32h4/ld/rev2/esp32h4.rom.api.ld

@@ -33,7 +33,6 @@ PROVIDE ( esp_rom_uart_rx_string      = UartRxString );
 PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
 PROVIDE ( esp_rom_uart_putc           = ets_write_char_uart );
 
-
 PROVIDE ( esp_rom_md5_init   = MD5Init );
 PROVIDE ( esp_rom_md5_update = MD5Update );
 PROVIDE ( esp_rom_md5_final  = MD5Final );

components/esp_rom/include/esp32c2/rom/cache.h

@@ -503,6 +503,14 @@ uint32_t Cache_Get_IROM_MMU_End(void);
   */
 uint32_t Cache_Get_DROM_MMU_End(void);
 
+/**
+ * @brief Configure cache MMU page size according to instruction and rodata size
+ *
+ * @param irom_size The instruction cache MMU page size
+ * @param drom_size The rodata data cache MMU page size
+ */
+void Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
+
 #ifdef __cplusplus
 }
 #endif

components/esp_rom/include/esp32c3/rom/cache.h

@@ -663,6 +663,14 @@ uint32_t Cache_Get_IROM_MMU_End(void);
   */
 uint32_t Cache_Get_DROM_MMU_End(void);
 
+/**
+ * @brief Configure cache MMU page size according to instruction and rodata size
+ *
+ * @param irom_size The instruction cache MMU page size
+ * @param drom_size The rodata data cache MMU page size
+ */
+void Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
+
 /**
   * @brief  Lock the permission control section configuration. After lock, any
   *         configuration modification will be bypass. Digital reset will clear the lock!

components/esp_rom/include/esp32c6/rom/cache.h

@@ -584,6 +584,14 @@ uint32_t Cache_Get_IROM_MMU_End(void);
   */
 uint32_t Cache_Get_DROM_MMU_End(void);
 
+/**
+ * @brief Configure cache MMU page size according to instruction and rodata size
+ *
+ * @param irom_size The instruction cache MMU page size
+ * @param drom_size The rodata data cache MMU page size
+ */
+void Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
+
 #define Cache_Dbus_MMU_Set(ext_ram, vaddr, paddr, psize, num, fixed) \
     Cache_MSPI_MMU_Set(ets_efuse_cache_encryption_enabled() ? MMU_SENSITIVE : 0, ext_ram, vaddr, paddr, psize, num, fixed)
 

components/esp_rom/include/esp32h2/rom/cache.h

@@ -587,6 +587,14 @@ uint32_t Cache_Get_IROM_MMU_End(void);
   */
 uint32_t Cache_Get_DROM_MMU_End(void);
 
+/**
+ * @brief Configure cache MMU page size according to instruction and rodata size
+ *
+ * @param irom_size The instruction cache MMU page size
+ * @param drom_size The rodata data cache MMU page size
+ */
+void Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
+
 #define Cache_Dbus_MMU_Set(ext_ram, vaddr, paddr, psize, num, fixed) \
     Cache_MSPI_MMU_Set(ets_efuse_cache_encryption_enabled() ? MMU_SENSITIVE : 0, ext_ram, vaddr, paddr, psize, num, fixed)
 

components/esp_rom/include/esp32h4/rom/cache.h

@@ -663,6 +663,14 @@ uint32_t Cache_Get_IROM_MMU_End(void);
   */
 uint32_t Cache_Get_DROM_MMU_End(void);
 
+/**
+ * @brief Configure cache MMU page size according to instruction and rodata size
+ *
+ * @param irom_size The instruction cache MMU page size
+ * @param drom_size The rodata data cache MMU page size
+ */
+void Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
+
 /**
   * @brief  Lock the permission control section configuration. After lock, any
   *         configuration modification will be bypass. Digital reset will clear the lock!

components/esp_rom/include/esp32s3/rom/cache.h

@@ -1,16 +1,8 @@
-// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 #pragma once
 
@@ -1162,6 +1154,26 @@ uint32_t Cache_Get_IROM_MMU_End(void);
   */
 uint32_t Cache_Get_DROM_MMU_End(void);
 
+/**
+ * @brief Configure cache MMU page size according to instruction and rodata size
+ *
+ * @param irom_size The instruction cache MMU page size
+ * @param drom_size The rodata data cache MMU page size
+ */
+void Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
+
+/**
+ * @brief Configure cache MMU page information
+ *
+ * @param instr_page_num The instruction cache MMU page num
+ * @param rodata_page_num The rodata cache MMU page num
+ * @param rodata_start The rodata start cache address
+ * @param rodata_end The rodata end cache address
+ * @param i_off The offset of instruction when instruction copied from flash to xip_psram
+ * @param ro_off The offset of rodata when rodata copied from flash to xip_psram
+ */
+void Cache_Set_IDROM_MMU_Info(uint32_t instr_page_num, uint32_t rodata_page_num, uint32_t rodata_start, uint32_t rodata_end, int i_off, int ro_off);
+
 /**
   * @brief Used by SPI flash mmap
   *

components/esp_system/port/cpu_start.c

@@ -71,6 +71,7 @@
 #include "esp_private/esp_mmu_map_private.h"
 #if CONFIG_SPIRAM
 #include "esp_psram.h"
+#include "esp_private/mmu_psram_flash.h"
 #include "esp_private/esp_psram_extram.h"
 #endif
 
@@ -367,15 +368,12 @@ void IRAM_ATTR call_start_cpu0(void)
     uint32_t _instruction_size = (uint32_t)&_instruction_reserved_end - (uint32_t)&_instruction_reserved_start;
     uint32_t cache_mmu_irom_size = ((_instruction_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE) * sizeof(uint32_t);
 
-#if CONFIG_IDF_TARGET_ESP32S3
     uint32_t _rodata_size = (uint32_t)&_rodata_reserved_end - (uint32_t)&_rodata_reserved_start;
-    uint32_t cache_mmu_drom_size = ((_rodata_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE) * sizeof(uint32_t);
-#endif // CONFIG_IDF_TARGET_ESP32S3
+    __attribute__((unused)) uint32_t cache_mmu_drom_size = ((_rodata_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE) * sizeof(uint32_t);
 
     /* Configure the Cache MMU size for instruction and rodata in flash. */
-    extern uint32_t Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);
     Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
-#endif // CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE && CONFIG_SPI_FLASH_ROM_IMPL
+#endif // CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
 
 #if CONFIG_ESPTOOLPY_OCT_FLASH && !CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT
     bool efuse_opflash_en = efuse_ll_get_flash_type();
@@ -462,15 +460,11 @@ void IRAM_ATTR call_start_cpu0(void)
     int s_instr_flash2spiram_off = 0;
     int s_rodata_flash2spiram_off = 0;
 #if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
-    extern int instruction_flash2spiram_offset(void);
     s_instr_flash2spiram_off = instruction_flash2spiram_offset();
 #endif
 #if CONFIG_SPIRAM_RODATA
-    extern int rodata_flash2spiram_offset(void);
     s_rodata_flash2spiram_off = rodata_flash2spiram_offset();
 #endif
-
-    extern void Cache_Set_IDROM_MMU_Info(uint32_t instr_page_num, uint32_t rodata_page_num, uint32_t rodata_start, uint32_t rodata_end, int i_off, int ro_off);
     Cache_Set_IDROM_MMU_Info(cache_mmu_irom_size / sizeof(uint32_t), \
                              cache_mmu_drom_size / sizeof(uint32_t), \
                              (uint32_t)&_rodata_reserved_start, \

tools/ci/check_copyright_ignore.txt

@@ -515,7 +515,6 @@ components/esp_rom/include/esp32s2/rom/usb/usb_dfu.h
 components/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h
 components/esp_rom/include/esp32s2/rom/usb/usb_persist.h
 components/esp_rom/include/esp32s3/rom/bigint.h
-components/esp_rom/include/esp32s3/rom/cache.h
 components/esp_rom/include/esp32s3/rom/crc.h
 components/esp_rom/include/esp32s3/rom/digital_signature.h
 components/esp_rom/include/esp32s3/rom/hmac.h