kopia lustrzana https://github.com/espressif/esp-idf
Fix #10804 by running continuous ADC DMA in endless loop instead of restarting after each run (descriptor chain) to avoid losing samples. Use descriptor error callback for GDMA to check for DMA buffer overrun.
rodzic
91da3bcdc1
commit
85ce6abdec
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@ -114,6 +114,7 @@ static IRAM_ATTR bool s_adc_dma_intr(adc_digi_context_t *adc_digi_ctx);
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#if SOC_GDMA_SUPPORTED
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static IRAM_ATTR bool adc_dma_in_suc_eof_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data);
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static bool adc_dma_descr_err_callback(gdma_channel_handle_t dma_chan, void *user_data);
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#else
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static IRAM_ATTR void adc_dma_intr_handler(void *arg);
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#endif
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@ -230,7 +231,8 @@ esp_err_t adc_digi_initialize(const adc_digi_init_config_t *init_config)
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gdma_apply_strategy(s_adc_digi_ctx->rx_dma_channel, &strategy_config);
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gdma_rx_event_callbacks_t cbs = {
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.on_recv_eof = adc_dma_in_suc_eof_callback
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.on_recv_eof = adc_dma_in_suc_eof_callback,
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.on_descr_err = adc_dma_descr_err_callback
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};
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gdma_register_rx_event_callbacks(s_adc_digi_ctx->rx_dma_channel, &cbs, s_adc_digi_ctx);
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@ -312,6 +314,13 @@ static IRAM_ATTR bool adc_dma_in_suc_eof_callback(gdma_channel_handle_t dma_chan
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s_adc_digi_ctx->rx_eof_desc_addr = event_data->rx_eof_desc_addr;
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return s_adc_dma_intr(user_data);
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}
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static bool adc_dma_descr_err_callback(gdma_channel_handle_t dma_chan, void *user_data)
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{
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ESP_EARLY_LOGE(ADC_TAG, "GDMA descriptor error occurred, probable ADC data loss, CPU load too high?");
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return false;
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}
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#else
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static IRAM_ATTR void adc_dma_intr_handler(void *arg)
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{
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@ -349,17 +358,13 @@ static IRAM_ATTR bool s_adc_dma_intr(adc_digi_context_t *adc_digi_ctx)
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}
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ret = xRingbufferSendFromISR(adc_digi_ctx->ringbuf_hdl, finished_buffer, finished_size, &taskAwoken);
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adc_hal_read_desc_finish (&adc_digi_ctx->hal);
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if (ret == pdFALSE) {
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//ringbuffer overflow
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adc_digi_ctx->ringbuf_overflow_flag = 1;
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}
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}
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if (status == ADC_HAL_DMA_DESC_NULL) {
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//start next turns of dma operation
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adc_hal_digi_start(&adc_digi_ctx->hal, adc_digi_ctx->rx_dma_buf);
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}
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return (taskAwoken == pdTRUE);
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}
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@ -354,7 +354,7 @@ static void adc_hal_digi_dma_link_descriptors(dma_descriptor_t *desc, uint8_t *d
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n++;
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}
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}
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desc[n-1].next = NULL;
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desc[n-1].next = desc;
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}
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void adc_hal_digi_start(adc_hal_context_t *hal, uint8_t *data_buf)
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@ -428,6 +428,11 @@ adc_hal_dma_desc_status_t adc_hal_get_reading_result(adc_hal_dma_ctx_t *hal, con
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return ADC_HAL_DMA_DESC_VALID;
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}
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void adc_hal_read_desc_finish(adc_hal_dma_ctx_t *hal) {
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// Allow DMA to re-use descriptor.
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hal->cur_desc_ptr->dw0.owner = 1;
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}
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void adc_hal_digi_clr_intr(adc_hal_context_t *hal, uint32_t mask)
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{
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adc_dma_ll_rx_clear_intr(hal->dev, hal->dma_chan, mask);
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@ -215,7 +215,7 @@ bool adc_hal_check_event(adc_hal_context_t *hal, uint32_t mask);
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#endif
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/**
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* @brief Get the ADC reading result
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* @brief Get the ADC reading result. Call adc_hal_read_desc_finish after using the descriptor.
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*
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* @param hal Context of the HAL
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* @param eof_desc_addr The last descriptor that is finished by HW. Should be got from DMA
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@ -375,3 +375,10 @@ uint32_t adc_hal_self_calibration(adc_ll_num_t adc_n, adc_channel_t channel, adc
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* @prarm adc_n ADC unit.
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*/
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#define adc_hal_rtc_output_invert(adc_n, inv_en) adc_ll_rtc_output_invert(adc_n, inv_en)
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/**
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* @brief Finishes reading the current descriptor and frees it for repeated usage by DMA.
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*
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* @param hal Context of the HAL
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*/
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void adc_hal_read_desc_finish(adc_hal_dma_ctx_t *hal);
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