From 8538153616af1b651af990c69ebc1b4cb2835c53 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Mon, 11 Jul 2022 14:23:57 +0800 Subject: [PATCH] flash_encryption: Fix issue that flash encryption cannot work when 8-line psram enabled, Closes https://github.com/espressif/esp-idf/issues/9244, Closes https://github.com/espressif/esp-idf/issues/9287 --- components/hal/esp32s3/include/hal/spimem_flash_ll.h | 2 ++ components/spi_flash/flash_ops.c | 9 +++++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/components/hal/esp32s3/include/hal/spimem_flash_ll.h b/components/hal/esp32s3/include/hal/spimem_flash_ll.h index ea394d2f47..e7a05ebf42 100644 --- a/components/hal/esp32s3/include/hal/spimem_flash_ll.h +++ b/components/hal/esp32s3/include/hal/spimem_flash_ll.h @@ -495,6 +495,8 @@ static inline int spimem_flash_ll_get_addr_bitlen(spi_mem_dev_t *dev) */ static inline void spimem_flash_ll_set_addr_bitlen(spi_mem_dev_t *dev, uint32_t bitlen) { + // set the correct address length here (24-length or 32-length address), + dev->cache_fctrl.usr_cmd_4byte = (bitlen == 32) ? 1 : 0 ; dev->user1.usr_addr_bitlen = (bitlen - 1); dev->user.usr_addr = bitlen ? 1 : 0; } diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index d3b696c96a..8af804bedb 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -914,12 +914,17 @@ void IRAM_ATTR spi_flash_set_rom_required_regs(void) #endif } +#if CONFIG_SPIRAM_MODE_OCT +// This function will only be called when Octal PSRAM enabled. void IRAM_ATTR spi_flash_set_vendor_required_regs(void) { #if CONFIG_ESPTOOLPY_OCT_FLASH //Flash chip requires MSPI specifically, call this function to set them esp_opiflash_set_required_regs(); + SET_PERI_REG_BITS(SPI_MEM_CACHE_FCTRL_REG(1), SPI_MEM_CACHE_USR_CMD_4BYTE_V, 1, SPI_MEM_CACHE_USR_CMD_4BYTE_S); #else - //currently we don't need to set other MSPI registers for Quad Flash -#endif + // Set back MSPI registers after Octal PSRAM initialization. + SET_PERI_REG_BITS(SPI_MEM_CACHE_FCTRL_REG(1), SPI_MEM_CACHE_USR_CMD_4BYTE_V, 0, SPI_MEM_CACHE_USR_CMD_4BYTE_S); +#endif // CONFIG_ESPTOOLPY_OCT_FLASH } +#endif