From 7dd15bee319c384ec48260c0f43801898e561daf Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Thu, 5 Sep 2024 17:07:18 +0800 Subject: [PATCH] fix(parlio_tx): fix error in first transfer and 1 byte transfer On p4, the clock was configured in the wrong order causing a dropped count on the first transmission. And gdma eof event fails to trigger parlio_tx eof event when transmitting single byte. --- components/esp_driver_parlio/src/parlio_tx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/components/esp_driver_parlio/src/parlio_tx.c b/components/esp_driver_parlio/src/parlio_tx.c index 2b94937c5a..dfed3b5b18 100644 --- a/components/esp_driver_parlio/src/parlio_tx.c +++ b/components/esp_driver_parlio/src/parlio_tx.c @@ -244,6 +244,7 @@ static esp_err_t parlio_select_periph_clock(parlio_tx_unit_t *tx_unit, const par tx_unit->out_clk_freq_hz = hal_utils_calc_clk_div_integer(&clk_info, &clk_div.integer); #endif PARLIO_CLOCK_SRC_ATOMIC() { + parlio_ll_tx_enable_clock(hal->regs, true); parlio_ll_tx_set_clock_source(hal->regs, clk_src); // set clock division parlio_ll_tx_set_clock_div(hal->regs, &clk_div); @@ -344,7 +345,7 @@ esp_err_t parlio_new_tx_unit(const parlio_tx_unit_config_t *config, parlio_tx_un #if SOC_PARLIO_TX_SIZE_BY_DMA // Always use DMA EOF as the Parlio TX EOF - parlio_ll_tx_set_eof_condition(hal->regs, PARLIO_LL_TX_EOF_COND_DMA_EOF); + parlio_ll_tx_set_eof_condition(hal->regs, PARLIO_LL_TX_EOF_COND_DATA_LEN); #endif // SOC_PARLIO_TX_SIZE_BY_DMA // clear any pending interrupt