From 7d40f17d1dab9a7f721afb21451e522c6948dee1 Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Fri, 13 Jan 2017 10:26:58 +1100 Subject: [PATCH] bootloader_random: Restore all SARADC/I2S registers to reset values Fix for issue with I2S0 not being usable after bootloader_random_enable() --- components/bootloader_support/src/bootloader_random.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/components/bootloader_support/src/bootloader_random.c b/components/bootloader_support/src/bootloader_random.c index c8b6c24b1f..b58ebe941d 100644 --- a/components/bootloader_support/src/bootloader_random.c +++ b/components/bootloader_support/src/bootloader_random.c @@ -124,10 +124,13 @@ void bootloader_random_disable(void) /* Restore SYSCON mode registers */ CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DIG_FORCE); CLEAR_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DIG_FORCE); - CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX | SYSCON_SARADC_SAR_SEL); /* Restore SAR ADC mode */ CLEAR_PERI_REG_MASK(SENS_SAR_START_FORCE_REG, SENS_SAR2_EN_TEST); + CLEAR_PERI_REG_MASK(SYSCON_SARADC_CTRL_REG, SYSCON_SARADC_SAR2_MUX + | SYSCON_SARADC_SAR_SEL | SYSCON_SARADC_DATA_TO_I2S); + SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); + SET_PERI_REG_BITS(SYSCON_SARADC_FSM_REG, SYSCON_SARADC_START_WAIT, 8, SYSCON_SARADC_START_WAIT_S); /* Reset i2s peripheral */ SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);