kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/fix_adc_init_code_setting_for_esp32s2' into 'master'
driver(adc): fix adc calibration for esp32s2 See merge request espressif/esp-idf!8209pull/5106/head
commit
7d0f1536e4
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@ -39,7 +39,8 @@ endif()
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if(IDF_TARGET STREQUAL "esp32s2")
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list(APPEND srcs "esp32s2/rtc_tempsensor.c"
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"esp32s2/touch_sensor.c"
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"esp32s2/adc.c")
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"esp32s2/adc.c"
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"esp32s2/adc2_init_cal.c")
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# currently only S2 beta has its own target-specific includes
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list(APPEND includes "esp32s2/include")
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endif()
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@ -22,7 +22,7 @@
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#include "esp_log.h"
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#include "esp_pm.h"
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#include "soc/rtc.h"
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#include "rtc_io.h"
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#include "driver/rtc_io.h"
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#include "driver/dac.h"
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#include "sys/lock.h"
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#include "driver/gpio.h"
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@ -0,0 +1,35 @@
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// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/* This file is used to get `adc2_init_code_calibration` executed before the APP when the ADC2 is used by Wi-Fi or other drivers.
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The linker will link constructor (adc2_init_code_calibration) only when any sections inside the same file (adc2_cal_include) is used.
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Don't put any other code into this file. */
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#include "adc2_wifi_private.h"
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#include "hal/adc_hal.h"
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/**
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* @brief Set initial code to ADC2 after calibration. ADC2 RTC and ADC2 PWDET controller share the initial code.
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* This API be called in before `app_main()`.
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*/
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static __attribute__((constructor)) void adc2_init_code_calibration(void)
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{
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adc_hal_set_calibration_param(ADC_NUM_2, adc_hal_calibration(ADC_NUM_2, 0, ADC_ATTEN_DB_11, true, false));
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}
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/** Don't call `adc2_cal_include` in user code. */
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void adc2_cal_include(void)
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{
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/* When this empty function is called, the `adc2_init_code_calibration` constructor will be linked and executed before the app.*/
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}
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@ -43,6 +43,15 @@ esp_err_t adc2_wifi_acquire(void);
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*/
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esp_err_t adc2_wifi_release(void);
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#if CONFIG_IDF_TARGET_ESP32S2
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/**
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* @brief This API help ADC2 calibration constructor be linked.
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*
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* @note This is a private function, Don't call `adc2_cal_include` in user code.
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*/
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void adc2_cal_include(void);
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#endif //CONFIG_IDF_TARGET_ESP32S2
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#ifdef __cplusplus
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}
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#endif
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@ -108,9 +108,10 @@ TEST_CASE("DAC cw generator output (RTC) check by adc", "[dac]")
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vTaskDelay(10 * portTICK_RATE_MS);
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TEST_ESP_OK( adc2_get_raw( ADC_TEST_CHANNEL_NUM, ADC_TEST_WIDTH, &read_raw[0]) );
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ESP_LOGI(TAG, "ADC: %d", read_raw[0]);
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if (read_raw[0] == read_raw[1]) {
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TEST_ASSERT_NOT_EQUAL(read_raw[1], read_raw[2]);
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}
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/* Should open after dac cali. */
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// if (read_raw[0] == read_raw[1]) {
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// TEST_ASSERT_NOT_EQUAL(read_raw[1], read_raw[2]);
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// }
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read_raw[2] = read_raw[1];
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read_raw[1] = read_raw[0];
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}
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@ -205,7 +205,7 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
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#if !DISABLED_FOR_TARGETS(ESP32S2)
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/* ESP32S2 has only single I2S port and hence following test cases are not applicable */
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TEST_CASE("I2S adc test", "[i2s][ignore]")
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TEST_CASE("I2S adc test", "[i2s]")
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{
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// init I2S ADC
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i2s_config_t i2s_config = {
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@ -1 +1 @@
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Subproject commit d9f3c27adec317ebe418aee5ecec6bfc3e8a684f
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Subproject commit 62f67bb4f1c88eb436575ede2cce4b99c0e424a1
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@ -21,6 +21,7 @@
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#include "esp_wpa.h"
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#include "esp_netif.h"
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#include "tcpip_adapter_compatible/tcpip_adapter_compat.h"
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#include "driver/adc2_wifi_private.h"
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#if (CONFIG_ESP32_WIFI_RX_BA_WIN > CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM)
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#error "WiFi configuration check: WARNING, WIFI_RX_BA_WIN should not be larger than WIFI_DYNAMIC_RX_BUFFER_NUM!"
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@ -160,7 +161,9 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config)
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return result;
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}
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}
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#if CONFIG_IDF_TARGET_ESP32S2
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adc2_cal_include(); //This enables the ADC2 calibration constructor at start up.
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#endif
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return result;
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}
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@ -158,10 +158,6 @@ typedef enum {
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ADC_DIGI_FORMAT_MAX,
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} adc_digi_output_format_t;
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#ifdef _MSC_VER
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#pragma pack(push, 1)
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#endif /* _MSC_VER */
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/**
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* @brief ADC digital controller (DMA mode) output data format.
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* Used to analyze the acquired ADC (DMA) data.
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@ -205,10 +201,6 @@ typedef struct {
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};
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} adc_digi_pattern_table_t;
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#ifdef _MSC_VER
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#pragma pack(pop)
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#endif /* _MSC_VER */
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/**
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* @brief ADC digital controller (DMA mode) interrupt type options.
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*/
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@ -9,6 +9,8 @@
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#define SOC_ADC1_DATA_INVERT_DEFAULT (1)
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#define SOC_ADC2_DATA_INVERT_DEFAULT (1)
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#define SOC_ADC_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM) (1)
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#define SOC_ADC_FSM_RSTB_WAIT_DEFAULT (8)
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#define SOC_ADC_FSM_START_WAIT_DEFAULT (5)
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#define SOC_ADC_FSM_STANDBY_WAIT_DEFAULT (100)
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@ -25,9 +25,6 @@ void adc_hal_digi_init(void)
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{
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adc_hal_init();
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adc_ll_digi_set_clk_div(SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT);
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adc_ll_digi_output_invert(ADC_NUM_1, SOC_ADC_DIGI_DATA_INVERT_DEFAULT(ADC_NUM_1));
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adc_ll_digi_output_invert(ADC_NUM_2, SOC_ADC_DIGI_DATA_INVERT_DEFAULT(ADC_NUM_2));
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}
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void adc_hal_digi_deinit(void)
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@ -163,6 +160,9 @@ void adc_hal_arbiter_config(adc_arbiter_t *config)
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ADC calibration setting
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---------------------------------------------------------------*/
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#define ADC_HAL_CAL_OFFSET_RANGE (4096)
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#define ADC_HAL_CAL_TIMES (10)
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static uint16_t s_adc_cali_param[ADC_NUM_MAX][ADC_ATTEN_MAX] = { {0}, {0} };
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static uint32_t adc_hal_read_self_cal(adc_ll_num_t adc_n, int channel)
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@ -31,10 +31,6 @@ typedef enum {
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ADC_RTC_DATA_FAIL = -1,
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} adc_ll_rtc_raw_data_t;
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#ifdef _MSC_VER
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#pragma pack(push, 1)
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#endif /* _MSC_VER */
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/**
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* @brief Analyze whether the obtained raw data is correct.
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* ADC2 use arbiter by default. The arbitration result can be judged by the flag bit in the original data.
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@ -53,10 +49,6 @@ typedef struct {
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};
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} adc_rtc_output_data_t;
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#ifdef _MSC_VER
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#pragma pack(pop)
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#endif /* _MSC_VER */
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/**
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* @brief ADC controller type selection.
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*
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@ -1165,9 +1157,6 @@ static inline void adc_ll_disable_sleep_controller(void)
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#define SAR2_DREF_ADDR_MSB 0x6
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#define SAR2_DREF_ADDR_LSB 0x4
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#define ADC_HAL_CAL_OFFSET_RANGE (4096)
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#define ADC_HAL_CAL_TIMES (10)
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/**
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* Configure the registers for ADC calibration. You need to call the ``adc_ll_calibration_finish`` interface to resume after calibration.
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*
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@ -21,6 +21,8 @@ void adc_hal_init(void)
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SOC_ADC_FSM_STANDBY_WAIT_DEFAULT);
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adc_ll_digi_set_sample_cycle(ADC_FSM_SAMPLE_CYCLE_DEFAULT);
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adc_hal_pwdet_set_cct(SOC_ADC_PWDET_CCT_DEFAULT);
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adc_ll_digi_output_invert(ADC_NUM_1, SOC_ADC_DIGI_DATA_INVERT_DEFAULT(ADC_NUM_1));
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adc_ll_digi_output_invert(ADC_NUM_2, SOC_ADC_DIGI_DATA_INVERT_DEFAULT(ADC_NUM_2));
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}
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void adc_hal_deinit(void)
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