Merge branch 'feature/support_sdspi_on_s2_c3' into 'master'

example: support sdspi on s2 c3 Closes IDF-1279 See merge request espressif/esp-idf!15107
2021-09-27 03:48:52 +00:00 · 2021-09-27 03:48:52 +00:00 · 7b8d5562d2
commit 7b8d5562d2
--- a/.gitlab/ci/target-test.yml
+++ b/.gitlab/ci/target-test.yml
@ -270,20 +270,17 @@ example_test_ESP32_SDSPI:
    - ESP32
    - UT_T1_SPIMODE

-# uncomment when ESP32S2 & ESP32C3 runners with external SD connected over SPI are available
-# ensure the runners have required tags created
-#
-#example_test_ESP32S2_SDSPI:
-#  extends: .example_test_esp32s2_template
-#  tags:
-#    - ESP32S2
-#    - UT_T1_SPIMODE
-#
-#example_test_ESP32C3_SDSPI:
-#  extends: .example_test_esp32c3_template
-#  tags:
-#    - ESP32C3
-#    - UT_T1_SPIMODE
+example_test_ESP32S2_SDSPI:
+  extends: .example_test_esp32s2_template
+  tags:
+    - ESP32S2
+    - UT_T1_SPIMODE
+
+example_test_ESP32C3_SDSPI:
+  extends: .example_test_esp32c3_template
+  tags:
+    - ESP32C3
+    - UT_T1_SPIMODE

 .test_app_template:
  extends: .target_test_job_template
@ -644,6 +641,12 @@ UT_S2_SPI_DUAL:
    - ESP32S2_IDF
    - Example_SPI_Multi_device

+UT_S2_SDSPI:
+  extends: .unit_test_esp32s2_template
+  tags:
+    - ESP32S2_IDF
+    - UT_T1_SPIMODE
+
 UT_C3:
  extends: .unit_test_esp32c3_template
  parallel: 32
@ -682,6 +685,12 @@ UT_C3_FLASH_SUSPEND:
    - ESP32C3_IDF
    - UT_T1_Flash_Suspend

+UT_C3_SDSPI:
+  extends: .unit_test_esp32c3_template
+  tags:
+    - ESP32C3_IDF
+    - UT_T1_SPIMODE
+
 UT_S3:
  extends: .unit_test_esp32s3_template
  parallel: 29
--- a/components/sdmmc/test/test_sd.c
+++ b/components/sdmmc/test/test_sd.c
@ -1,16 +1,8 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */

 #include <stdio.h>
 #include <stdlib.h>
@ -35,8 +27,8 @@

 // Currently no runners for S3
 #define WITH_SD_TEST    (SOC_SDMMC_HOST_SUPPORTED && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
-//Currently no runners for S2, S3 and C3
-#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3))
+// Currently, no runners for S3
+#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
 // Can't test eMMC (slot 0) and PSRAM together
 #define WITH_EMMC_TEST  (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))

@ -48,8 +40,6 @@
 #define SD_TEST_BOARD_VSEL_3V3      1
 #define SD_TEST_BOARD_VSEL_1V8      0

-#define TEST_SDSPI_DMACHAN 1
-
 /* time to wait for reset / power-on */
 #define SD_TEST_BOARD_PWR_RST_DELAY_MS  5
 #define SD_TEST_BOARD_PWR_ON_DELAY_MS   50
@ -57,6 +47,24 @@
 /* gpio which is not connected to actual CD pin, used to simulate CD behavior */
 #define CD_WP_TEST_GPIO 18

+/* default GPIO selection */
+#ifdef CONFIG_IDF_TARGET_ESP32S2
+#define SDSPI_TEST_MOSI_PIN GPIO_NUM_35
+#define SDSPI_TEST_MISO_PIN GPIO_NUM_37
+#define SDSPI_TEST_SCLK_PIN GPIO_NUM_36
+#define SDSPI_TEST_CS_PIN GPIO_NUM_34
+#elif defined(CONFIG_IDF_TARGET_ESP32C3)
+#define SDSPI_TEST_MOSI_PIN GPIO_NUM_4
+#define SDSPI_TEST_MISO_PIN GPIO_NUM_6
+#define SDSPI_TEST_SCLK_PIN GPIO_NUM_5
+#define SDSPI_TEST_CS_PIN GPIO_NUM_1
+#else
+#define SDSPI_TEST_MOSI_PIN GPIO_NUM_15
+#define SDSPI_TEST_MISO_PIN GPIO_NUM_2
+#define SDSPI_TEST_SCLK_PIN GPIO_NUM_14
+#define SDSPI_TEST_CS_PIN GPIO_NUM_13
+#endif
+

 TEST_CASE("MMC_RSP_BITS", "[sd]")
 {
@ -174,6 +182,19 @@ TEST_CASE("probe eMMC, slot 0, 8-bit", "[sd][test_env=EMMC]")
 #endif // WITH_EMMC_TEST

 #if WITH_SDSPI_TEST
+
+#if !WITH_SD_TEST && !WITH_EMMC_TEST
+static void sd_test_board_power_on(void)
+{
+    // do nothing
+}
+
+static void sd_test_board_power_off(void)
+{
+    // do nothing
+}
+#endif
+
 static void test_sdspi_init_bus(spi_host_device_t host, int mosi_pin, int miso_pin, int clk_pin, int dma_chan)
 {
    spi_bus_config_t bus_config = {
@ -213,7 +234,7 @@ static void probe_spi(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int
    sdspi_dev_handle_t handle;
    sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
    dev_config.gpio_cs = pin_cs;
-    test_sdspi_init_bus(dev_config.host_id, pin_mosi, pin_miso, pin_sck, TEST_SDSPI_DMACHAN);
+    test_sdspi_init_bus(dev_config.host_id, pin_mosi, pin_miso, pin_sck, SPI_DMA_CH_AUTO);
    TEST_ESP_OK(sdspi_host_init());
    TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));

@ -233,6 +254,7 @@ static void probe_spi_legacy(int freq_khz, int pin_miso, int pin_mosi, int pin_s
    slot_config.gpio_mosi = pin_mosi;
    slot_config.gpio_sck = pin_sck;
    slot_config.gpio_cs = pin_cs;
+    slot_config.dma_channel = SPI_DMA_CH_AUTO;

    TEST_ESP_OK(sdspi_host_init());
    TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
@ -240,13 +262,16 @@ static void probe_spi_legacy(int freq_khz, int pin_miso, int pin_mosi, int pin_s
    probe_core(config.slot);

    TEST_ESP_OK(sdspi_host_deinit());
+
+    TEST_ESP_OK(spi_bus_free(config.slot));
+
    sd_test_board_power_off();
 }

 TEST_CASE("probe SD in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
 {
-    probe_spi(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
-    probe_spi_legacy(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
+    probe_spi(SDMMC_FREQ_DEFAULT, SDSPI_TEST_MISO_PIN, SDSPI_TEST_MOSI_PIN, SDSPI_TEST_SCLK_PIN, SDSPI_TEST_CS_PIN);
+    probe_spi_legacy(SDMMC_FREQ_DEFAULT, SDSPI_TEST_MISO_PIN, SDSPI_TEST_MOSI_PIN, SDSPI_TEST_SCLK_PIN, SDSPI_TEST_CS_PIN);
 }

 // No runner for this
@ -455,14 +480,15 @@ void sdspi_test_rw_blocks(sd_test_func_t test_func)
 {
    sd_test_board_power_on();

+    sdmmc_host_t config = SDSPI_HOST_DEFAULT();
    sdspi_dev_handle_t handle;
    sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
-    test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
+    dev_config.host_id = config.slot;
+    dev_config.gpio_cs = SDSPI_TEST_CS_PIN;
+    test_sdspi_init_bus(dev_config.host_id, SDSPI_TEST_MOSI_PIN, SDSPI_TEST_MISO_PIN, SDSPI_TEST_SCLK_PIN, SPI_DMA_CH_AUTO);
    TEST_ESP_OK(sdspi_host_init());
    TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));

-    sdmmc_host_t config = SDSPI_HOST_DEFAULT();
-    config.slot = handle;
    // This test can only run under 20MHz on ESP32, because the runner connects the card to
    // non-IOMUX pins of HSPI.

@ -623,14 +649,16 @@ TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
 {
    sd_test_board_power_on();

+    sdmmc_host_t config = SDSPI_HOST_DEFAULT();
    sdspi_dev_handle_t handle;
    sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
+    dev_config.host_id = config.slot;
+    dev_config.gpio_cs = SDSPI_TEST_CS_PIN;
    dev_config.gpio_cd = CD_WP_TEST_GPIO;
-    test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
+    test_sdspi_init_bus(dev_config.host_id, SDSPI_TEST_MOSI_PIN, SDSPI_TEST_MISO_PIN, SDSPI_TEST_SCLK_PIN, SPI_DMA_CH_AUTO);
    TEST_ESP_OK(sdspi_host_init());
    TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));

-    sdmmc_host_t config = SDSPI_HOST_DEFAULT();
    config.slot = handle;

    test_cd_input(CD_WP_TEST_GPIO, &config);
@ -644,15 +672,17 @@ TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
 {
    sd_test_board_power_on();

+    sdmmc_host_t config = SDSPI_HOST_DEFAULT();
    sdspi_dev_handle_t handle;
    sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
+    dev_config.host_id = config.slot;
+    dev_config.gpio_cs = SDSPI_TEST_CS_PIN;
    dev_config.gpio_wp = CD_WP_TEST_GPIO;
-    test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
+    test_sdspi_init_bus(dev_config.host_id, SDSPI_TEST_MOSI_PIN, SDSPI_TEST_MISO_PIN, SDSPI_TEST_SCLK_PIN, SPI_DMA_CH_AUTO);

    TEST_ESP_OK(sdspi_host_init());
    TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));

-    sdmmc_host_t config = SDSPI_HOST_DEFAULT();
    config.slot = handle;

    test_wp_input(CD_WP_TEST_GPIO, &config);
--- a/examples/storage/sd_card/sdspi/README.md
+++ b/examples/storage/sd_card/sdspi/README.md
@ -21,39 +21,44 @@ This example support SD (SDSC, SDHC, SDXC) cards.

 ## Hardware

-### Connections for ESP32 and ESP32-S2
+Pins can be customized. See the initialization of ``spi_bus_config_t`` and ``sdspi_slot_config_t`` structures in the example code.
+
+It is recommended to get familiar with [the document about pullup requirements](https://docs.espressif.com/projects/esp-idf/en/latest/api-reference/peripherals/sd_pullup_requirements.html) to understand Pullup/down resistor support and compatibility of various ESP modules and development boards.
+
+This example doesn't utilize card detect (CD) and write protect (WP) signals from SD card slot.
+
+### Connections for ESP32

 This example runs on ESP-WROVER-KIT boards without any extra modifications required, only the SD card needs to be inserted into the slot.

 Other ESP32 development boards need to be connected to SD card as follows:

-ESP32(S2) pin | SD card pin | SPI pin | Notes
+ESP32 pin     | SD card pin | SPI pin | Notes
 --------------|-------------|---------|------------
 GPIO2         | D0          | MISO    |
-GPIO13 (MTCK) | D3          | CS      | 
-GPIO14 (MTMS) | CLK         | SCK     | 
-GPIO15 (MTDO) | CMD         | MOSI    | 10k pullup 
+GPIO13 (MTCK) | D3          | CS      |
+GPIO14 (MTMS) | CLK         | SCK     |
+GPIO15 (MTDO) | CMD         | MOSI    | 10k pullup

-This example doesn't utilize card detect (CD) and write protect (WP) signals from SD card slot.
-
-In SPI mode, pins can be customized. See the initialization of ``spi_bus_config_t`` and ``sdspi_slot_config_t`` structures in the example code.
 Some boards require specific manipulation to enable UART Download mode (GPIO2 low) - eg ESP32-Azure IoT Kit needs KEY_IO0 pressed down for the time of firmware flashing operation (sets IO0 and IO2 low). See troubleshooting section for more details

-It is recommended to get familiar with [the document about pullup requirements](https://docs.espressif.com/projects/esp-idf/en/latest/api-reference/peripherals/sd_pullup_requirements.html) to understand Pullup/down resistor support and compatibility of various ESP modules and development boards.
+### Connections for ESP32S2

+ESP32S2 pin   | SD card pin | SPI pin | Notes
+--------------|-------------|---------|------------
+GPIO37        | D0          | MISO    |
+GPIO34        | D3          | CS      |
+GPIO36        | CLK         | SCK     |
+GPIO35        | CMD         | MOSI    | 10k pullup

 ### Connections for ESP32-C3

-Note that ESP32-C3 doesn't include SD Host peripheral and only supports SD over SPI. Therefore only SCK, MOSI, MISO, CS and ground pins need to be connected.
-
 ESP32-C3 pin  | SD card pin | SPI pin | Notes
 --------------|-------------|---------|------------
-GPIO8         | CLK         | SCK     | 
-GPIO9         | CMD         | MOSI    | 10k pullup
-GPIO18        | D0          | MISO    | 
-GPIO19        | D3          | CS      | 
-
-In SPI mode, pins can be customized. See the initialization of ``spi_bus_config_t`` and ``sdspi_slot_config_t`` structures in the example code.
+GPIO5         | CLK         | SCK     |
+GPIO4         | CMD         | MOSI    | 10k pullup
+GPIO6        | D0          | MISO    |
+GPIO1        | D3          | CS      |

 ### Build and flash

@ -120,5 +125,3 @@ An attempt to download a new firmware under this conditions may also result in t

 to clean your board's flash, then download your firmware properly.

-
-  
--- a/examples/storage/sd_card/sdspi/main/sd_card_example_main.c
+++ b/examples/storage/sd_card/sdspi/main/sd_card_example_main.c
@ -19,23 +19,33 @@ static const char *TAG = "example";
 #define MOUNT_POINT "/sdcard"

 // Pin mapping
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32

 #define PIN_NUM_MISO 2
 #define PIN_NUM_MOSI 15
 #define PIN_NUM_CLK  14
 #define PIN_NUM_CS   13

+#elif CONFIG_IDF_TARGET_ESP32S2
+
+// adapted for internal test board ESP-32-S3-USB-OTG-Ev-BOARD_V1.0 (with ESP32-S2-MINI-1 module)
+#define PIN_NUM_MISO 37
+#define PIN_NUM_MOSI 35
+#define PIN_NUM_CLK  36
+#define PIN_NUM_CS   34
+
 #elif CONFIG_IDF_TARGET_ESP32C3
-#define PIN_NUM_MISO 18
-#define PIN_NUM_MOSI 9
-#define PIN_NUM_CLK  8
-#define PIN_NUM_CS   19
+#define PIN_NUM_MISO 6
+#define PIN_NUM_MOSI 4
+#define PIN_NUM_CLK  5
+#define PIN_NUM_CS   1

 #endif //CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2

-#if CONFIG_IDF_TARGET_ESP32S2 ||CONFIG_IDF_TARGET_ESP32C3
+#if CONFIG_IDF_TARGET_ESP32S2
 #define SPI_DMA_CHAN    host.slot
+#elif CONFIG_IDF_TARGET_ESP32C3
+#define SPI_DMA_CHAN    SPI_DMA_CH_AUTO
 #else
 #define SPI_DMA_CHAN    1
 #endif
--- a/examples/storage/sd_card/sdspi/sd_card_example_test.py
+++ b/examples/storage/sd_card/sdspi/sd_card_example_test.py
@ -4,7 +4,7 @@ import ttfw_idf
 from tiny_test_fw import Utility


-@ttfw_idf.idf_example_test(env_tag='UT_T1_SPIMODE')
+@ttfw_idf.idf_example_test(env_tag='UT_T1_SPIMODE', target=['esp32', 'esp32s2', 'esp32c3'])
 def test_examples_sd_card(env, extra_data):  # type: (ttfw_idf.Env.Env, None ) -> None

    dut = env.get_dut('sd_card', 'examples/storage/sd_card/sdspi')
--- a/tools/ci/check_copyright_ignore.txt
+++ b/tools/ci/check_copyright_ignore.txt
@ -2216,7 +2216,6 @@ components/sdmmc/sdmmc_init.c
 components/sdmmc/sdmmc_io.c
 components/sdmmc/sdmmc_mmc.c
 components/sdmmc/sdmmc_sd.c
-components/sdmmc/test/test_sd.c
 components/sdmmc/test/test_sdio.c
 components/soc/esp32/adc_periph.c
 components/soc/esp32/dac_periph.c
--- a/tools/unit-test-app/configs/release_c3
+++ b/tools/unit-test-app/configs/release_c3
@ -1,5 +1,5 @@
 CONFIG_IDF_TARGET="esp32c3"
-TEST_COMPONENTS=freertos esp_hw_support esp_system esp_ipc esp_timer driver heap pthread soc spi_flash vfs
+TEST_COMPONENTS=freertos esp_hw_support esp_system esp_ipc esp_timer driver heap pthread soc spi_flash vfs sdmmc
 CONFIG_COMPILER_OPTIMIZATION_SIZE=y
-CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
 CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
+CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y