kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/flash_encyption_80Mflash_40Mram' into 'master'
flash_encryption/psram: fixed the issue that block when flash_encryption_write See merge request espressif/esp-idf!12177pull/7261/head
commit
747ac00f9b
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@ -125,6 +125,7 @@ extern "C" {
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//Extra dummy for flash read
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#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M 0
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#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_26M 0
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#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_40M 1
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#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M 2
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@ -507,10 +507,70 @@ out:
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}
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#endif // CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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#if !CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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extern void spi_common_set_dummy_output(esp_rom_spiflash_read_mode_t mode);
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extern void spi_dummy_len_fix(uint8_t spi, uint8_t freqdiv);
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static void IRAM_ATTR flash_rom_init(void)
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{
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uint32_t freqdiv = 0;
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esp_rom_spiflash_read_mode_t read_mode;
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#if CONFIG_IDF_TARGET_ESP32
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uint32_t dummy_bit = 0;
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#if CONFIG_ESPTOOLPY_FLASHFREQ_80M
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dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M
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dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_40M;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_26M
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dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_26M;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_20M
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dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M;
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#endif
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#endif//CONFIG_IDF_TARGET_ESP32
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#if CONFIG_ESPTOOLPY_FLASHFREQ_80M
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freqdiv = 1;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M
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freqdiv = 2;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_26M
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freqdiv = 3;
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_20M
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freqdiv = 4;
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#endif
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#if CONFIG_ESPTOOLPY_FLASHMODE_QIO
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read_mode = ESP_ROM_SPIFLASH_QIO_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_QOUT
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read_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_DIO
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read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
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#elif CONFIG_ESPTOOLPY_FLASHMODE_DOUT
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read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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g_rom_spiflash_dummy_len_plus[1] = dummy_bit;
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#else
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spi_dummy_len_fix(1, freqdiv);
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#endif //CONFIG_IDF_TARGET_ESP32
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#if !CONFIG_IDF_TARGET_ESP32S2 && !CONFIG_IDF_TARGET_ESP32
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spi_common_set_dummy_output(read_mode);
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#endif //!CONFIG_IDF_TARGET_ESP32S2
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esp_rom_spiflash_config_readmode(read_mode);
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esp_rom_spiflash_config_clk(freqdiv, 1);
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}
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#else
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static void IRAM_ATTR flash_rom_init(void)
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{
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return;
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}
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#endif // !CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size)
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{
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esp_err_t err = ESP_OK;
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flash_rom_init();
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const spi_flash_guard_funcs_t *guard = spi_flash_guard_get();
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CHECK_WRITE_ADDRESS(dest_addr, size);
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if ((dest_addr % 16) != 0) {
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@ -757,6 +817,7 @@ out:
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esp_err_t IRAM_ATTR spi_flash_read_encrypted(size_t src, void *dstv, size_t size)
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{
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flash_rom_init();
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if (src + size > g_rom_flashchip.chip_size) {
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return ESP_ERR_INVALID_SIZE;
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}
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@ -462,6 +462,14 @@ UT_020:
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- Example_SPI_Multi_device
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- psram
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UT_021:
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extends: .unit_test_32_template
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parallel: 2
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tags:
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- ESP32_IDF
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- psram
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- UT_T1_FlashEncryption
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UT_022:
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extends: .unit_test_32_template
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tags:
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@ -0,0 +1,14 @@
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# This config is for ESP32 only (no ESP32-S2/S3 flash encryption support yet, ESP32-C3 has no psram)
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CONFIG_IDF_TARGET="esp32"
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TEST_COMPONENTS=spi_flash
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TEST_GROUPS=flash_encryption
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CONFIG_SECURE_FLASH_ENC_ENABLED=y
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CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=y
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CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=y
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CONFIG_SECURE_BOOT_ALLOW_JTAG=y
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CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=y
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CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=y
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CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=y
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CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED=y
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CONFIG_ESP32_SPIRAM_SUPPORT=y
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CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
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@ -1,5 +1,5 @@
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CONFIG_IDF_TARGET="esp32"
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TEST_EXCLUDE_COMPONENTS=libsodium bt app_update driver esp32 esp_ipc esp_pm esp_system esp_timer mbedtls spi_flash test_utils heap pthread soc experimental_cpp_component esp-tls
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TEST_EXCLUDE_COMPONENTS=libsodium bt app_update driver esp32 esp_ipc esp_pm esp_system esp_timer mbedtls spi_flash test_utils heap pthread soc experimental_cpp_component esp-tls freertos sdmmc
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CONFIG_ESP32_SPIRAM_SUPPORT=y
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CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
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CONFIG_SPIRAM_OCCUPY_NO_HOST=y
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@ -1,5 +1,5 @@
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CONFIG_IDF_TARGET="esp32"
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TEST_COMPONENTS=driver
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TEST_COMPONENTS=driver freertos sdmmc
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CONFIG_ESP32_SPIRAM_SUPPORT=y
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CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
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CONFIG_SPIRAM_OCCUPY_NO_HOST=y
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