kopia lustrzana https://github.com/espressif/esp-idf
fix(i2s): fix no mclk output in i2s simplex mode on P4
rodzic
9614300f81
commit
6b3a35eea4
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@ -151,7 +151,10 @@ static esp_err_t i2s_pdm_tx_set_gpio(i2s_chan_handle_t handle, const i2s_pdm_tx_
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i2s_gpio_check_and_set(gpio_cfg->clk, i2s_periph_signal[id].m_tx_ws_sig, false, gpio_cfg->invert_flags.clk_inv);
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}
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#if SOC_I2S_HW_VERSION_2
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i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
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I2S_RCC_ATOMIC() {
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I2S_RCC_ATOMIC_ENV;
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i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
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}
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#endif
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/* Update the mode info: gpio configuration */
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memcpy(&(pdm_tx_cfg->gpio_cfg), gpio_cfg, sizeof(i2s_pdm_tx_gpio_config_t));
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@ -438,7 +441,10 @@ static esp_err_t i2s_pdm_rx_set_gpio(i2s_chan_handle_t handle, const i2s_pdm_rx_
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}
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}
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#if SOC_I2S_HW_VERSION_2
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i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
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I2S_RCC_ATOMIC() {
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I2S_RCC_ATOMIC_ENV;
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i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
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}
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#endif
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/* Update the mode info: gpio configuration */
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memcpy(&(pdm_rx_cfg->gpio_cfg), gpio_cfg, sizeof(i2s_pdm_rx_gpio_config_t));
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@ -47,8 +47,10 @@ extern "C" {
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#if !SOC_RCC_IS_INDEPENDENT
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#define I2S_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
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#define I2S_RCC_ATOMIC_ENV (void)__DECLARE_RCC_ATOMIC_ENV
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#else
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#define I2S_RCC_ATOMIC()
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#define I2S_RCC_ATOMIC_ENV
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#endif
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#define I2S_NULL_POINTER_CHECK(tag, p) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, tag, "input parameter '"#p"' is NULL")
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@ -164,7 +164,10 @@ static esp_err_t i2s_std_set_gpio(i2s_chan_handle_t handle, const i2s_std_gpio_c
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/* For "tx + slave" mode, select TX signal index for ws and bck */
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if (handle->dir == I2S_DIR_TX && !handle->controller->full_duplex) {
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#if SOC_I2S_HW_VERSION_2
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i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
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I2S_RCC_ATOMIC() {
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I2S_RCC_ATOMIC_ENV;
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i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
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}
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#endif
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i2s_gpio_check_and_set(gpio_cfg->ws, i2s_periph_signal[id].s_tx_ws_sig, true, gpio_cfg->invert_flags.ws_inv);
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i2s_gpio_check_and_set(gpio_cfg->bclk, i2s_periph_signal[id].s_tx_bck_sig, true, gpio_cfg->invert_flags.bclk_inv);
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@ -177,7 +180,10 @@ static esp_err_t i2s_std_set_gpio(i2s_chan_handle_t handle, const i2s_std_gpio_c
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/* For "rx + master" mode, select RX signal index for ws and bck */
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if (handle->dir == I2S_DIR_RX && !handle->controller->full_duplex) {
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#if SOC_I2S_HW_VERSION_2
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i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
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I2S_RCC_ATOMIC() {
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I2S_RCC_ATOMIC_ENV;
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i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
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}
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#endif
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i2s_gpio_check_and_set(gpio_cfg->ws, i2s_periph_signal[id].m_rx_ws_sig, false, gpio_cfg->invert_flags.ws_inv);
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i2s_gpio_check_and_set(gpio_cfg->bclk, i2s_periph_signal[id].m_rx_bck_sig, false, gpio_cfg->invert_flags.bclk_inv);
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@ -169,7 +169,10 @@ static esp_err_t i2s_tdm_set_gpio(i2s_chan_handle_t handle, const i2s_tdm_gpio_c
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/* For "tx + slave" mode, select TX signal index for ws and bck */
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if (handle->dir == I2S_DIR_TX && !handle->controller->full_duplex) {
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#if SOC_I2S_HW_VERSION_2
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i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
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I2S_RCC_ATOMIC() {
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I2S_RCC_ATOMIC_ENV;
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i2s_ll_mclk_bind_to_tx_clk(handle->controller->hal.dev);
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}
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#endif
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i2s_gpio_check_and_set(gpio_cfg->ws, i2s_periph_signal[id].s_tx_ws_sig, true, gpio_cfg->invert_flags.ws_inv);
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i2s_gpio_check_and_set(gpio_cfg->bclk, i2s_periph_signal[id].s_tx_bck_sig, true, gpio_cfg->invert_flags.bclk_inv);
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@ -182,7 +185,10 @@ static esp_err_t i2s_tdm_set_gpio(i2s_chan_handle_t handle, const i2s_tdm_gpio_c
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/* For "rx + master" mode, select RX signal index for ws and bck */
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if (handle->dir == I2S_DIR_RX && !handle->controller->full_duplex) {
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#if SOC_I2S_HW_VERSION_2
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i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
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I2S_RCC_ATOMIC() {
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I2S_RCC_ATOMIC_ENV;
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i2s_ll_mclk_bind_to_rx_clk(handle->controller->hal.dev);
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}
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#endif
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i2s_gpio_check_and_set(gpio_cfg->ws, i2s_periph_signal[id].m_rx_ws_sig, false, gpio_cfg->invert_flags.ws_inv);
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i2s_gpio_check_and_set(gpio_cfg->bclk, i2s_periph_signal[id].m_rx_bck_sig, false, gpio_cfg->invert_flags.bclk_inv);
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@ -207,15 +207,16 @@ static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw)
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static inline void i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw)
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{
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// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
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// Special on P4, set mst_clk_sel to 1 means attach the mclk signal to TX module
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switch (I2S_LL_GET_ID(hw)) {
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case 0:
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HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 0;
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HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 1;
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return;
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case 1:
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HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 0;
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HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 1;
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return;
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case 2:
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HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 0;
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HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 1;
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return;
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}
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}
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@ -228,15 +229,16 @@ static inline void i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw)
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static inline void i2s_ll_mclk_bind_to_rx_clk(i2s_dev_t *hw)
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{
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// Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer
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// Special on P4, set mst_clk_sel to 0 means attach the mclk signal to RX module
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switch (I2S_LL_GET_ID(hw)) {
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case 0:
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HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 1;
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HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 0;
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return;
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case 1:
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HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 1;
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HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 0;
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return;
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case 2:
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HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 1;
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HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 0;
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return;
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}
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}
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