diff --git a/components/driver/include/driver/spi_master.h b/components/driver/include/driver/spi_master.h
index 717287a62d..e6ed8c5a0a 100644
--- a/components/driver/include/driver/spi_master.h
+++ b/components/driver/include/driver/spi_master.h
@@ -63,7 +63,12 @@ typedef struct {
     uint8_t command_bits;           ///< Default amount of bits in command phase (0-16), used when ``SPI_TRANS_VARIABLE_CMD`` is not used, otherwise ignored.
     uint8_t address_bits;           ///< Default amount of bits in address phase (0-64), used when ``SPI_TRANS_VARIABLE_ADDR`` is not used, otherwise ignored.
     uint8_t dummy_bits;             ///< Amount of dummy bits to insert between address and data phase
-    uint8_t mode;                   ///< SPI mode (0-3)
+    uint8_t mode;                   /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
+                                         - 0: (0, 0)
+                                         - 1: (0, 1)
+                                         - 2: (1, 0)
+                                         - 3: (1, 1)
+                                     */
     uint16_t duty_cycle_pos;         ///< Duty cycle of positive clock, in 1/256th increments (128 = 50%/50% duty). Setting this to 0 (=not setting it) is equivalent to setting this to 128.
     uint16_t cs_ena_pretrans;        ///< Amount of SPI bit-cycles the cs should be activated before the transmission (0-16). This only works on half-duplex transactions.
     uint8_t cs_ena_posttrans;       ///< Amount of SPI bit-cycles the cs should stay active after the transmission (0-16)
diff --git a/components/driver/include/driver/spi_slave.h b/components/driver/include/driver/spi_slave.h
index 522c9fb8ab..4263735a42 100644
--- a/components/driver/include/driver/spi_slave.h
+++ b/components/driver/include/driver/spi_slave.h
@@ -43,7 +43,12 @@ typedef struct {
     int spics_io_num;               ///< CS GPIO pin for this device
     uint32_t flags;                 ///< Bitwise OR of SPI_SLAVE_* flags
     int queue_size;                 ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_queue_trans but not yet finished using spi_slave_get_trans_result) at the same time
-    uint8_t mode;                   ///< SPI mode (0-3)
+    uint8_t mode;                   /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
+                                         - 0: (0, 0)
+                                         - 1: (0, 1)
+                                         - 2: (1, 0)
+                                         - 3: (1, 1)
+                                     */
     slave_transaction_cb_t post_setup_cb;  /**< Callback called after the SPI registers are loaded with new data.
                                              *
                                              *  This callback is called within interrupt
diff --git a/components/driver/include/driver/spi_slave_hd.h b/components/driver/include/driver/spi_slave_hd.h
index edb1debc95..e847287362 100644
--- a/components/driver/include/driver/spi_slave_hd.h
+++ b/components/driver/include/driver/spi_slave_hd.h
@@ -74,7 +74,12 @@ typedef struct {
 
 /// Configuration structure for the SPI Slave HD driver
 typedef struct {
-    uint8_t  mode;                              ///< SPI mode (0-3)
+    uint8_t mode;                               /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
+                                                     - 0: (0, 0)
+                                                     - 1: (0, 1)
+                                                     - 2: (1, 0)
+                                                     - 3: (1, 1)
+                                                 */
     uint32_t spics_io_num;                      ///< CS GPIO pin for this device
     uint32_t flags;                             ///< Bitwise OR of SPI_SLAVE_HD_* flags
     uint32_t command_bits;                      ///< command field bits, multiples of 8 and at least 8.