diff --git a/components/esp_hw_support/include/esp_private/esp_modem_clock.h b/components/esp_hw_support/include/esp_private/esp_modem_clock.h index 1aae8638e8..a09d450ac3 100644 --- a/components/esp_hw_support/include/esp_private/esp_modem_clock.h +++ b/components/esp_hw_support/include/esp_private/esp_modem_clock.h @@ -70,15 +70,6 @@ void modem_clock_module_disable(periph_module_t module); */ void modem_clock_module_mac_reset(periph_module_t module); -/** - * @brief Initialize the clock gating control signal of each clock domain of the modem - * - * This is a global modem clock gating signal initialization interface, which is - * only configured during system initialization, and each modem module cannot - * use this interface. - */ -void modem_clock_domain_pmu_state_icg_map_init(void); - #if SOC_PMU_SUPPORTED /** * @brief Enable modem clock domain clock gate to gate it's output diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c index f48a281bc9..e61d276ce2 100644 --- a/components/esp_hw_support/modem_clock.c +++ b/components/esp_hw_support/modem_clock.c @@ -157,36 +157,6 @@ modem_clock_context_t * __attribute__((weak)) IRAM_ATTR MODEM_CLOCK_instance(voi } #if SOC_PM_SUPPORT_PMU_MODEM_STATE -static void IRAM_ATTR modem_clock_domain_power_state_icg_map_init(modem_clock_context_t *ctx) -{ - #define ICG_NOGATING_SLEEP (BIT(PMU_HP_ICG_MODEM_CODE_SLEEP)) - #define ICG_NOGATING_MODEM (BIT(PMU_HP_ICG_MODEM_CODE_MODEM)) - #define ICG_NOGATING_ACTIVE (BIT(PMU_HP_ICG_MODEM_CODE_ACTIVE)) - - /* the ICG code's bit 0, 1 and 2 indicates the ICG state - * of pmu SLEEP, MODEM and ACTIVE mode respectively */ - const uint32_t code[MODEM_CLOCK_DOMAIN_MAX] = { - [MODEM_CLOCK_DOMAIN_MODEM_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE, - [MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_COEX] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - [MODEM_CLOCK_DOMAIN_WIFIPWR] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, - }; - for (modem_clock_domain_t domain = MODEM_CLOCK_DOMAIN_MODEM_APB; domain < MODEM_CLOCK_DOMAIN_MAX; domain++) { - modem_clock_hal_set_clock_domain_icg_bitmap(ctx->hal, domain, code[domain]); - } -} - -void modem_clock_domain_pmu_state_icg_map_init(void) -{ - modem_clock_domain_power_state_icg_map_init(MODEM_CLOCK_instance()); -} - esp_err_t modem_clock_domain_clk_gate_enable(modem_clock_domain_t domain, pmu_hp_icg_modem_mode_t mode) { if (domain >= MODEM_CLOCK_DOMAIN_MAX || domain < MODEM_CLOCK_DOMAIN_MODEM_APB) { @@ -319,9 +289,76 @@ static IRAM_ATTR uint32_t modem_clock_get_module_deps(periph_module_t module) return deps; } +#if SOC_PM_SUPPORT_PMU_MODEM_STATE +#define MODEM_ADC_COMMON_FE_ICG_DEPS (BIT(MODEM_CLOCK_DOMAIN_MODEM_FE) | BIT(MODEM_CLOCK_DOMAIN_LP_APB)) +#define I2C_ANA_MST_ICG_DEPS (BIT(MODEM_CLOCK_DOMAIN_I2C_MASTER)) +#define PHY_ICG_DEPS (MODEM_ADC_COMMON_FE_ICG_DEPS | I2C_ANA_MST_ICG_DEPS) +#define COEX_ICG_DEPS (BIT(MODEM_CLOCK_DOMAIN_COEX)) +#define MODEM_ETM_ICG_DEPS (BIT(MODEM_CLOCK_DOMAIN_MODEM_PERIPH)) +#define WIFI_ICG_DEPS (COEX_ICG_DEPS | BIT(MODEM_CLOCK_DOMAIN_MODEM_APB) | BIT(MODEM_CLOCK_DOMAIN_WIFI) | BIT(MODEM_CLOCK_DOMAIN_WIFIPWR)) +#define BLE_ICG_DEPS (COEX_ICG_DEPS | BIT(MODEM_CLOCK_DOMAIN_MODEM_APB) | BIT(MODEM_CLOCK_DOMAIN_BT) | BIT(MODEM_CLOCK_DOMAIN_MODEM_PERIPH)) +#define IEEE802154_ICG_DEPS (COEX_ICG_DEPS | BIT(MODEM_CLOCK_DOMAIN_MODEM_APB) | BIT(MODEM_CLOCK_DOMAIN_BT) | BIT(MODEM_CLOCK_DOMAIN_IEEE802154)) + +/* the ICG code's bit 0, 1 and 2 indicates the ICG state + * of pmu SLEEP, MODEM and ACTIVE mode respectively */ +#define ICG_NOGATING_SLEEP (BIT(PMU_HP_ICG_MODEM_CODE_SLEEP)) +#define ICG_NOGATING_MODEM (BIT(PMU_HP_ICG_MODEM_CODE_MODEM)) +#define ICG_NOGATING_ACTIVE (BIT(PMU_HP_ICG_MODEM_CODE_ACTIVE)) + +static struct { + modem_clock_hal_context_t hal; + const uint32_t gating_mode[MODEM_CLOCK_DOMAIN_MAX]; +} icg_cfg = { + .hal = { .syscon_dev = &MODEM_SYSCON, .lpcon_dev = &MODEM_LPCON }, + .gating_mode = { + [MODEM_CLOCK_DOMAIN_MODEM_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_MODEM_PERIPH] = ICG_NOGATING_ACTIVE, + [MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE, + [MODEM_CLOCK_DOMAIN_MODEM_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE, + [MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_COEX] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + [MODEM_CLOCK_DOMAIN_WIFIPWR] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM, + } +}; + +static IRAM_ATTR uint32_t modem_clock_get_module_clock_domain_icg_deps(periph_module_t module) +{ + uint32_t deps = 0; + switch (module) { + case PERIPH_MODEM_ADC_COMMON_FE_MODULE: deps = MODEM_ADC_COMMON_FE_ICG_DEPS; break; + case PERIPH_ANA_I2C_MASTER_MODULE: deps = I2C_ANA_MST_ICG_DEPS; break; + case PERIPH_PHY_MODULE: deps = PHY_ICG_DEPS; break; + case PERIPH_WIFI_MODULE: deps = WIFI_ICG_DEPS; break; + case PERIPH_BT_MODULE: deps = BLE_ICG_DEPS; break; + case PERIPH_IEEE802154_MODULE: deps = IEEE802154_ICG_DEPS; break; + case PERIPH_COEX_MODULE: deps = COEX_ICG_DEPS; break; + case PERIPH_MODEM_ETM_MODULE: deps = MODEM_ETM_ICG_DEPS; break; + default: + assert(0); + } + return deps; +} + +static IRAM_ATTR void modem_clock_module_icg_map_init(uint32_t domain_map) +{ + for (int domain = 0; domain_map; domain_map >>= 1, domain++) { + if (domain_map & BIT(0)) { + modem_clock_hal_set_clock_domain_icg_bitmap(&(icg_cfg.hal), domain, icg_cfg.gating_mode[domain]); + } + } +} +#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE + void IRAM_ATTR modem_clock_module_enable(periph_module_t module) { assert(IS_MODEM_MODULE(module)); +#if SOC_PM_SUPPORT_PMU_MODEM_STATE + uint32_t icg_deps = modem_clock_get_module_clock_domain_icg_deps(module); + modem_clock_module_icg_map_init(icg_deps); +#endif uint32_t deps = modem_clock_get_module_deps(module); modem_clock_device_enable(MODEM_CLOCK_instance(), deps); } diff --git a/components/esp_system/port/soc/esp32c6/clk.c b/components/esp_system/port/soc/esp32c6/clk.c index 2f309bd27e..e16b697114 100644 --- a/components/esp_system/port/soc/esp32c6/clk.c +++ b/components/esp_system/port/soc/esp32c6/clk.c @@ -178,8 +178,6 @@ void rtc_clk_select_rtc_slow_clk(void) */ __attribute__((weak)) void esp_perip_clk_init(void) { - modem_clock_domain_pmu_state_icg_map_init(); - /* During system initialization, the low-power clock source of the modem * (WiFi, BLE or Coexist) follows the configuration of the slow clock source * of the system. If the WiFi, BLE or Coexist module needs a higher diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c index b5ecc7e6dd..86c1ab2766 100644 --- a/components/esp_system/port/soc/esp32p4/clk.c +++ b/components/esp_system/port/soc/esp32p4/clk.c @@ -174,8 +174,6 @@ void rtc_clk_select_rtc_slow_clk(void) */ __attribute__((weak)) void esp_perip_clk_init(void) { - modem_clock_domain_pmu_state_icg_map_init(); - ESP_EARLY_LOGW(TAG, "esp_perip_clk_init() has not been implemented yet"); #if 0 // TODO: IDF-5658 uint32_t common_perip_clk, hwcrypto_perip_clk, wifi_bt_sdio_clk = 0; diff --git a/components/hal/esp32c6/modem_clock_hal.c b/components/hal/esp32c6/modem_clock_hal.c index 6707c9b012..5beb69f955 100644 --- a/components/hal/esp32c6/modem_clock_hal.c +++ b/components/hal/esp32c6/modem_clock_hal.c @@ -36,7 +36,7 @@ void IRAM_ATTR modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_conte case MODEM_CLOCK_DOMAIN_BT: modem_syscon_ll_set_bt_icg_bitmap(hal->syscon_dev, bitmap); break; - case MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE: + case MODEM_CLOCK_DOMAIN_MODEM_FE: modem_syscon_ll_set_fe_icg_bitmap(hal->syscon_dev, bitmap); break; case MODEM_CLOCK_DOMAIN_IEEE802154: @@ -55,7 +55,7 @@ void IRAM_ATTR modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_conte modem_lpcon_ll_set_wifipwr_icg_bitmap(hal->lpcon_dev, bitmap); break; default: - break; + HAL_ASSERT(0); } } @@ -77,7 +77,7 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t * case MODEM_CLOCK_DOMAIN_BT: bitmap = modem_syscon_ll_get_bt_icg_bitmap(hal->syscon_dev); break; - case MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE: + case MODEM_CLOCK_DOMAIN_MODEM_FE: bitmap = modem_syscon_ll_get_fe_icg_bitmap(hal->syscon_dev); break; case MODEM_CLOCK_DOMAIN_IEEE802154: @@ -96,7 +96,7 @@ uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t * bitmap = modem_lpcon_ll_get_wifipwr_icg_bitmap(hal->lpcon_dev); break; default: - break; + HAL_ASSERT(0); } return bitmap; } @@ -163,7 +163,7 @@ void modem_clock_hal_select_ble_rtc_timer_lpclk_source(modem_clock_hal_context_t modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_EXT32K_CODE); break; default: - break; + HAL_ASSERT(0); } } @@ -203,7 +203,7 @@ void modem_clock_hal_select_coex_lpclk_source(modem_clock_hal_context_t *hal, mo modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_EXT32K_CODE); break; default: - break; + HAL_ASSERT(0); } } @@ -243,7 +243,7 @@ void modem_clock_hal_select_wifi_lpclk_source(modem_clock_hal_context_t *hal, mo modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_EXT32K_CODE); break; default: - break; + HAL_ASSERT(0); } } diff --git a/components/hal/esp32h2/modem_clock_hal.c b/components/hal/esp32h2/modem_clock_hal.c index 8ac871fe74..879e694d2a 100644 --- a/components/hal/esp32h2/modem_clock_hal.c +++ b/components/hal/esp32h2/modem_clock_hal.c @@ -79,7 +79,7 @@ void modem_clock_hal_select_ble_rtc_timer_lpclk_source(modem_clock_hal_context_t lp_clkrst_ll_select_modem_32k_clock_source(&LP_CLKRST, MODEM_CLOCK_EXT32K_CODE); break; default: - break; + HAL_ASSERT(0); } } @@ -119,6 +119,6 @@ void modem_clock_hal_select_coex_lpclk_source(modem_clock_hal_context_t *hal, mo lp_clkrst_ll_select_modem_32k_clock_source(&LP_CLKRST, MODEM_CLOCK_EXT32K_CODE); break; default: - break; + HAL_ASSERT(0); } } diff --git a/components/hal/include/hal/modem_clock_types.h b/components/hal/include/hal/modem_clock_types.h index e430a0610f..bb972f7a7f 100644 --- a/components/hal/include/hal/modem_clock_types.h +++ b/components/hal/include/hal/modem_clock_types.h @@ -15,8 +15,7 @@ typedef enum { MODEM_CLOCK_DOMAIN_MODEM_PERIPH, MODEM_CLOCK_DOMAIN_WIFI, MODEM_CLOCK_DOMAIN_BT, - MODEM_CLOCK_DOMAIN_MODEM_ADC_COMMON_FE, - MODEM_CLOCK_DOMAIN_MODEM_PRIVATE_FE, + MODEM_CLOCK_DOMAIN_MODEM_FE, MODEM_CLOCK_DOMAIN_IEEE802154, MODEM_CLOCK_DOMAIN_LP_APB, MODEM_CLOCK_DOMAIN_I2C_MASTER,