kopia lustrzana https://github.com/espressif/esp-idf
i80_lcd: support PSRAM buffer for esp32s3
morris
rodzic
3e7448d0f3
commit
5f28db177d
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@ -151,6 +151,8 @@ typedef struct {
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int data_gpio_nums[SOC_LCD_I80_BUS_WIDTH]; /*!< GPIOs used for data lines */
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size_t bus_width; /*!< Number of data lines, 8 or 16 */
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size_t max_transfer_bytes; /*!< Maximum transfer size, this determines the length of internal DMA link */
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size_t psram_trans_align; /*!< DMA transfer alignment for data allocated from PSRAM */
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size_t sram_trans_align; /*!< DMA transfer alignment for data allocated from SRAM */
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} esp_lcd_i80_bus_config_t;
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/**
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -16,13 +16,13 @@
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#include "freertos/queue.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_intr_alloc.h"
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#include "esp_heap_caps.h"
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#include "esp_pm.h"
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#include "esp_lcd_panel_io_interface.h"
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#include "esp_lcd_panel_io.h"
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#include "esp_rom_gpio.h"
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#include "soc/soc_caps.h"
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#include "soc/rtc.h" // for `rtc_clk_xtal_freq_get()`
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#include "soc/soc_memory_types.h"
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#include "hal/dma_types.h"
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#include "hal/gpio_hal.h"
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#include "esp_private/gdma.h"
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@ -40,6 +40,9 @@ typedef struct esp_lcd_i80_bus_t esp_lcd_i80_bus_t;
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typedef struct lcd_panel_io_i80_t lcd_panel_io_i80_t;
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typedef struct lcd_i80_trans_descriptor_t lcd_i80_trans_descriptor_t;
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// This function is located in ROM (also see esp_rom/${target}/ld/${target}.rom.ld)
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extern int Cache_WriteBack_Addr(uint32_t addr, uint32_t size);
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static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, const void *param, size_t param_size);
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static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, const void *color, size_t color_size);
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static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io);
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@ -49,7 +52,7 @@ static esp_err_t lcd_i80_select_periph_clock(esp_lcd_i80_bus_handle_t bus, lcd_c
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static esp_err_t lcd_i80_bus_configure_gpio(esp_lcd_i80_bus_handle_t bus, const esp_lcd_i80_bus_config_t *bus_config);
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static void lcd_i80_switch_devices(lcd_panel_io_i80_t *cur_device, lcd_panel_io_i80_t *next_device);
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static void lcd_start_transaction(esp_lcd_i80_bus_t *bus, lcd_i80_trans_descriptor_t *trans_desc);
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static IRAM_ATTR void lcd_default_isr_handler(void *args);
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static void lcd_default_isr_handler(void *args);
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struct esp_lcd_i80_bus_t {
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int bus_id; // Bus ID, index from 0
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@ -62,6 +65,8 @@ struct esp_lcd_i80_bus_t {
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uint8_t *format_buffer; // The driver allocates an internal buffer for DMA to do data format transformer
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size_t resolution_hz; // LCD_CLK resolution, determined by selected clock source
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gdma_channel_handle_t dma_chan; // DMA channel handle
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size_t psram_trans_align; // DMA transfer alignment for data allocated from PSRAM
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size_t sram_trans_align; // DMA transfer alignment for data allocated from SRAM
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lcd_i80_trans_descriptor_t *cur_trans; // Current transaction
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lcd_panel_io_i80_t *cur_device; // Current working device
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LIST_HEAD(i80_device_list, lcd_panel_io_i80_t) device_list; // Head of i80 device list
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@ -119,11 +124,11 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
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ESP_GOTO_ON_FALSE(bus_config && ret_bus, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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size_t num_dma_nodes = bus_config->max_transfer_bytes / DMA_DESCRIPTOR_BUFFER_MAX_SIZE + 1;
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// DMA descriptors must be placed in internal SRAM
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bus = heap_caps_calloc(1, sizeof(esp_lcd_i80_bus_t) + num_dma_nodes * sizeof(dma_descriptor_t), MALLOC_CAP_DMA);
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bus = heap_caps_calloc(1, sizeof(esp_lcd_i80_bus_t) + num_dma_nodes * sizeof(dma_descriptor_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA);
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ESP_GOTO_ON_FALSE(bus, ESP_ERR_NO_MEM, err, TAG, "no mem for i80 bus");
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bus->num_dma_nodes = num_dma_nodes;
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bus->bus_id = -1;
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bus->format_buffer = heap_caps_calloc(1, CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE, MALLOC_CAP_DMA);
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bus->format_buffer = heap_caps_calloc(1, CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE, MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA);
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ESP_GOTO_ON_FALSE(bus->format_buffer, ESP_ERR_NO_MEM, err, TAG, "no mem for format buffer");
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// register to platform
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int bus_id = lcd_com_register_device(LCD_COM_DEVICE_TYPE_I80, bus);
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@ -142,7 +147,7 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
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ESP_GOTO_ON_ERROR(ret, err, TAG, "select periph clock %d failed", bus_config->clk_src);
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// install interrupt service, (LCD peripheral shares the same interrupt source with Camera peripheral with different mask)
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// interrupt is disabled by default
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int isr_flags = ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED;
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int isr_flags = LCD_I80_INTR_ALLOC_FLAGS | ESP_INTR_FLAG_SHARED;
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ret = esp_intr_alloc_intrstatus(lcd_periph_signals.buses[bus_id].irq_id, isr_flags,
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(uint32_t)lcd_ll_get_interrupt_status_reg(bus->hal.dev),
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LCD_LL_EVENT_TRANS_DONE, lcd_default_isr_handler, bus, &bus->intr);
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@ -150,12 +155,14 @@ esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lc
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lcd_ll_enable_interrupt(bus->hal.dev, LCD_LL_EVENT_TRANS_DONE, false); // disable all interrupts
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lcd_ll_clear_interrupt_status(bus->hal.dev, UINT32_MAX); // clear pending interrupt
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// install DMA service
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bus->psram_trans_align = bus_config->psram_trans_align;
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bus->sram_trans_align = bus_config->sram_trans_align;
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ret = lcd_i80_init_dma_link(bus);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "install DMA failed");
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// enable 8080 mode and set bus width
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lcd_ll_enable_rgb_mode(bus->hal.dev, false);
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lcd_ll_set_data_width(bus->hal.dev, bus_config->bus_width);
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bus->bus_width = lcd_ll_get_data_width(bus->hal.dev);
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bus->bus_width = bus_config->bus_width;
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// number of data cycles is controlled by DMA buffer size
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lcd_ll_enable_output_always_on(bus->hal.dev, true);
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// enable trans done interrupt
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@ -237,7 +244,7 @@ esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_p
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uint32_t pclk_prescale = bus->resolution_hz / io_config->pclk_hz;
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ESP_GOTO_ON_FALSE(pclk_prescale > 0 && pclk_prescale <= LCD_LL_CLOCK_PRESCALE_MAX, ESP_ERR_NOT_SUPPORTED, err, TAG,
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"prescaler can't satisfy PCLK clock %u", io_config->pclk_hz);
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i80_device = calloc(1, sizeof(lcd_panel_io_i80_t) + io_config->trans_queue_depth * sizeof(lcd_i80_trans_descriptor_t));
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i80_device = heap_caps_calloc(1, sizeof(lcd_panel_io_i80_t) + io_config->trans_queue_depth * sizeof(lcd_i80_trans_descriptor_t), LCD_I80_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(i80_device, ESP_ERR_NO_MEM, err, TAG, "no mem for i80 panel io");
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// create two queues for i80 device
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i80_device->trans_queue = xQueueCreate(io_config->trans_queue_depth, sizeof(lcd_i80_trans_descriptor_t *));
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@ -302,8 +309,11 @@ static esp_err_t panel_io_i80_del(esp_lcd_panel_io_t *io)
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esp_lcd_i80_bus_t *bus = i80_device->bus;
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lcd_i80_trans_descriptor_t *trans_desc = NULL;
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// wait all pending transaction to finish
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for (size_t i = 0; i < i80_device->num_trans_inflight; i++) {
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xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY);
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size_t num_trans_inflight = i80_device->num_trans_inflight;
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for (size_t i = 0; i < num_trans_inflight; i++) {
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ESP_RETURN_ON_FALSE(xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY) == pdTRUE,
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ESP_FAIL, TAG, "recycle inflight transactions failed");
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i80_device->num_trans_inflight--;
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}
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// remove from device list
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portENTER_CRITICAL(&bus->spinlock);
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@ -370,19 +380,20 @@ static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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i80_lcd_prepare_cmd_buffer(bus, next_device, &lcd_cmd);
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uint32_t param_len = i80_lcd_prepare_param_buffer(bus, next_device, param, param_size);
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// wait all pending transaction in the queue to finish
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for (size_t i = 0; i < next_device->num_trans_inflight; i++) {
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xQueueReceive(next_device->done_queue, &trans_desc, portMAX_DELAY);
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size_t num_trans_inflight = next_device->num_trans_inflight;
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for (size_t i = 0; i < num_trans_inflight; i++) {
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ESP_RETURN_ON_FALSE( xQueueReceive(next_device->done_queue, &trans_desc, portMAX_DELAY) == pdTRUE,
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ESP_FAIL, TAG, "recycle inflight transactions failed");
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next_device->num_trans_inflight--;
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}
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next_device->num_trans_inflight = 0;
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uint32_t intr_status = lcd_ll_get_interrupt_status(bus->hal.dev);
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lcd_ll_clear_interrupt_status(bus->hal.dev, intr_status);
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// switch devices if necessary
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lcd_i80_switch_devices(cur_device, next_device);
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// set data format
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lcd_ll_reverse_data_byte_order(bus->hal.dev, false);
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lcd_ll_reverse_data_bit_order(bus->hal.dev, false);
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lcd_ll_reverse_data_8bits_order(bus->hal.dev, next_device->lcd_param_bits > bus->bus_width);
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lcd_ll_reverse_bit_order(bus->hal.dev, false);
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lcd_ll_swap_byte_order(bus->hal.dev, bus->bus_width, next_device->lcd_param_bits > bus->bus_width);
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bus->cur_trans = NULL;
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bus->cur_device = next_device;
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// package a transaction
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@ -425,7 +436,8 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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trans_desc = &i80_device->trans_pool[i80_device->num_trans_inflight];
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} else {
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// transaction pool has used up, recycle one from done_queue
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xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY);
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ESP_RETURN_ON_FALSE(xQueueReceive(i80_device->done_queue, &trans_desc, portMAX_DELAY) == pdTRUE,
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ESP_FAIL, TAG, "recycle inflight transactions failed");
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i80_device->num_trans_inflight--;
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}
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trans_desc->i80_device = i80_device;
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@ -435,6 +447,12 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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trans_desc->data_length = color_size;
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trans_desc->trans_done_cb = i80_device->on_color_trans_done;
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trans_desc->user_ctx = i80_device->user_ctx;
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if (esp_ptr_external_ram(color)) {
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// flush framebuffer from cache to the physical PSRAM
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Cache_WriteBack_Addr((uint32_t)color, color_size);
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}
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// send transaction to trans_queue
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xQueueSend(i80_device->trans_queue, &trans_desc, portMAX_DELAY);
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i80_device->num_trans_inflight++;
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@ -447,7 +465,8 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
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static esp_err_t lcd_i80_select_periph_clock(esp_lcd_i80_bus_handle_t bus, lcd_clock_source_t clk_src)
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{
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esp_err_t ret = ESP_OK;
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lcd_ll_set_group_clock_src(bus->hal.dev, clk_src, LCD_PERIPH_CLOCK_PRE_SCALE, 1, 0);
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// force to use integer division, as fractional division might lead to clock jitter
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lcd_ll_set_group_clock_src(bus->hal.dev, clk_src, LCD_PERIPH_CLOCK_PRE_SCALE, 0, 0);
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switch (clk_src) {
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case LCD_CLK_SRC_PLL160M:
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bus->resolution_hz = 160000000 / LCD_PERIPH_CLOCK_PRE_SCALE;
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@ -488,6 +507,12 @@ static esp_err_t lcd_i80_init_dma_link(esp_lcd_i80_bus_handle_t bus)
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.owner_check = true
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};
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gdma_apply_strategy(bus->dma_chan, &strategy_config);
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// set DMA transfer ability
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gdma_transfer_ability_t ability = {
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.psram_trans_align = bus->psram_trans_align,
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.sram_trans_align = bus->sram_trans_align,
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};
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gdma_set_transfer_ability(bus->dma_chan, &ability);
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return ESP_OK;
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err:
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if (bus->dma_chan) {
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@ -540,6 +565,9 @@ static void lcd_start_transaction(esp_lcd_i80_bus_t *bus, lcd_i80_trans_descript
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lcd_ll_set_command(bus->hal.dev, bus->bus_width, trans_desc->cmd_value);
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if (trans_desc->data) { // some specific LCD commands can have no parameters
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gdma_start(bus->dma_chan, (intptr_t)(bus->dma_nodes));
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// delay 1us is sufficient for DMA to pass data to LCD FIFO
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// in fact, this is only needed when LCD pixel clock is set too high
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esp_rom_delay_us(1);
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}
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lcd_ll_start(bus->hal.dev);
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}
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@ -612,14 +640,15 @@ IRAM_ATTR static void lcd_default_isr_handler(void *args)
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if (high_task_woken == pdTRUE) {
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need_yield = true;
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}
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// sanity check
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assert(trans_desc);
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// only clear the interrupt status when we're sure there still remains transaction to handle
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lcd_ll_clear_interrupt_status(bus->hal.dev, intr_status);
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// switch devices if necessary
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lcd_i80_switch_devices(cur_device, next_device);
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// only reverse data bit/bytes for color data
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lcd_ll_reverse_data_bit_order(bus->hal.dev, next_device->flags.reverse_color_bits);
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lcd_ll_reverse_data_byte_order(bus->hal.dev, next_device->flags.swap_color_bytes);
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lcd_ll_reverse_data_8bits_order(bus->hal.dev, false);
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lcd_ll_reverse_bit_order(bus->hal.dev, next_device->flags.reverse_color_bits);
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lcd_ll_swap_byte_order(bus->hal.dev, bus->bus_width, next_device->flags.swap_color_bytes);
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bus->cur_trans = trans_desc;
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bus->cur_device = next_device;
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// mount data to DMA links
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