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Merge branch 'contrib/github_pr_12179_v4.4' into 'release/v4.4' 

fix(uart): Fix uart_ll_set_baudrate div-by-zero crash due to uint32_t overflow (backport v4.4)

See merge request espressif/esp-idf!26018
pull/9151/merge
morris 2023-10-20 22:19:34 +08:00
rodzic 7a60a294c5 a2682d4ffb
commit 5f257494c5
3 zmienionych plików z 14 dodań i 5 usunięć
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7
components/hal/esp32c3/include/hal/uart_ll.h
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@ -10,6 +10,7 @@
#pragma once
#include <stdlib.h>
#include "hal/misc.h"
#include "hal/uart_types.h"
#include "soc/uart_periph.h"
@ -152,13 +153,15 @@ static inline void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud)
#define DIV_UP(a, b) (((a) + (b) - 1) / (b))
uint32_t sclk_freq = uart_ll_get_sclk_freq(hw);
const uint32_t max_div = BIT(12) - 1; // UART divider integer part only has 12 bits
int sclk_div = DIV_UP(sclk_freq, max_div * baud);
uint32_t sclk_div = DIV_UP(sclk_freq, (uint64_t)max_div * baud);
if (sclk_div == 0) abort();
uint32_t clk_div = ((sclk_freq) << 4) / (baud * sclk_div);
// The baud rate configuration register is divided into
// an integer part and a fractional part.
hw->clk_div.div_int = clk_div >> 4;
hw->clk_div.div_frag = clk_div & 0xf;
hw->clk_div.div_frag = clk_div & 0xf;
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clk_conf, sclk_div_num, sclk_div - 1);
#undef DIV_UP
}

5
components/hal/esp32h2/include/hal/uart_ll.h
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@ -18,6 +18,7 @@
#pragma once
#include <stdlib.h>
#include "hal/misc.h"
#include "hal/uart_types.h"
#include "soc/uart_periph.h"
@ -160,7 +161,9 @@ static inline void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud)
#define DIV_UP(a, b) (((a) + (b) - 1) / (b))
uint32_t sclk_freq = uart_ll_get_sclk_freq(hw);
const uint32_t max_div = BIT(12) - 1; // UART divider integer part only has 12 bits
int sclk_div = DIV_UP(sclk_freq, max_div * baud);
uint32_t sclk_div = DIV_UP(sclk_freq, (uint64_t)max_div * baud);
if (sclk_div == 0) abort();
uint32_t clk_div = ((sclk_freq) << 4) / (baud * sclk_div);
// The baud rate configuration register is divided into

7
components/hal/esp32s3/include/hal/uart_ll.h
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@ -10,6 +10,7 @@
#pragma once
#include <stdlib.h>
#include "hal/misc.h"
#include "hal/uart_types.h"
#include "soc/uart_periph.h"
@ -150,13 +151,15 @@ FORCE_INLINE_ATTR void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud)
#define DIV_UP(a, b) (((a) + (b) - 1) / (b))
uint32_t sclk_freq = uart_ll_get_sclk_freq(hw);
const uint32_t max_div = BIT(12) - 1; // UART divider integer part only has 12 bits
int sclk_div = DIV_UP(sclk_freq, max_div * baud);
uint32_t sclk_div = DIV_UP(sclk_freq, (uint64_t)max_div * baud);
if (sclk_div == 0) abort();
uint32_t clk_div = ((sclk_freq) << 4) / (baud * sclk_div);
// The baud rate configuration register is divided into
// an integer part and a fractional part.
hw->clkdiv.clkdiv = clk_div >> 4;
hw->clkdiv.clkdiv_frag = clk_div & 0xf;
hw->clkdiv.clkdiv_frag = clk_div & 0xf;
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->clk_conf, sclk_div_num, sclk_div - 1);
#undef DIV_UP
}