From ee00029c05e08c2719b401a79c97831cd92a2b19 Mon Sep 17 00:00:00 2001 From: morris Date: Mon, 8 Nov 2021 10:26:52 +0800 Subject: [PATCH] gdma: support IRAM interrupt --- components/driver/Kconfig | 18 ++++++ components/driver/gdma.c | 59 ++++++++++++++++---- components/hal/esp32c3/include/hal/gdma_ll.h | 37 +++++++----- components/hal/esp32h2/include/hal/gdma_ll.h | 37 +++++++----- components/hal/esp32s3/include/hal/gdma_ll.h | 37 +++++++----- 5 files changed, 139 insertions(+), 49 deletions(-) diff --git a/components/driver/Kconfig b/components/driver/Kconfig index 6ca95be2ca..68c421a698 100644 --- a/components/driver/Kconfig +++ b/components/driver/Kconfig @@ -184,4 +184,22 @@ menu "Driver configurations" endmenu # GPIO Configuration + menu "GDMA Configuration" + config GDMA_CTRL_FUNC_IN_IRAM + bool "Place GDMA control functions into IRAM" + default n + help + Place GDMA control functions (like start/stop/append/reset) into IRAM, + so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context. + Enabling this option can improve driver performance as well. + + config GDMA_ISR_IRAM_SAFE + bool "GDMA ISR IRAM-Safe" + default n + help + This will ensure the GDMA interrupt handler is IRAM-Safe, allow to avoid flash + cache misses, and also be able to run whilst the cache is disabled. + (e.g. SPI Flash write). + endmenu # GDMA Configuration + endmenu # Driver configurations diff --git a/components/driver/gdma.c b/components/driver/gdma.c index 7e64c15ed3..8e2e9fd027 100644 --- a/components/driver/gdma.c +++ b/components/driver/gdma.c @@ -8,6 +8,7 @@ #include #include +#include "sdkconfig.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "soc/soc_caps.h" @@ -17,12 +18,28 @@ #include "esp_check.h" #include "driver/periph_ctrl.h" #include "esp_private/gdma.h" +#include "esp_heap_caps.h" #include "hal/gdma_hal.h" #include "hal/gdma_ll.h" #include "soc/gdma_periph.h" +#include "soc/soc_memory_types.h" static const char *TAG = "gdma"; +#if CONFIG_GDMA_ISR_IRAM_SAFE +#define GDMA_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED) +#define GDMA_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) +#else +#define GDMA_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED +#define GDMA_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT +#endif // CONFIG_GDMA_ISR_IRAM_SAFE + +#if CONFIG_GDMA_CTRL_FUNC_IN_IRAM +#define GDMA_CTRL_FUNC_ATTR IRAM_ATTR +#else +#define GDMA_CTRL_FUNC_ATTR +#endif // CONFIG_GDMA_CTRL_FUNC_IN_IRAM + #define GDMA_INVALID_PERIPH_TRIG (0x3F) #define SEARCH_REQUEST_RX_CHANNEL (1 << 0) #define SEARCH_REQUEST_TX_CHANNEL (1 << 1) @@ -123,11 +140,11 @@ esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_chann } if (config->direction == GDMA_CHANNEL_DIRECTION_TX) { search_code |= SEARCH_REQUEST_TX_CHANNEL; // search TX only - alloc_tx_channel = calloc(1, sizeof(gdma_tx_channel_t)); + alloc_tx_channel = heap_caps_calloc(1, sizeof(gdma_tx_channel_t), GDMA_MEM_ALLOC_CAPS); ESP_GOTO_ON_FALSE(alloc_tx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma tx channel"); } else if (config->direction == GDMA_CHANNEL_DIRECTION_RX) { search_code |= SEARCH_REQUEST_RX_CHANNEL; // search RX only - alloc_rx_channel = calloc(1, sizeof(gdma_rx_channel_t)); + alloc_rx_channel = heap_caps_calloc(1, sizeof(gdma_rx_channel_t), GDMA_MEM_ALLOC_CAPS); ESP_GOTO_ON_FALSE(alloc_rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma rx channel"); } @@ -364,6 +381,17 @@ esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_ group = pair->group; gdma_tx_channel_t *tx_chan = __containerof(dma_chan, gdma_tx_channel_t, base); +#if CONFIG_GDMA_ISR_IRAM_SAFE + if (cbs->on_trans_eof) { + ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_trans_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_trans_eof not in IRAM"); + } + if (user_data) { + ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) || + esp_ptr_in_diram_dram(user_data) || + esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM"); + } +#endif // CONFIG_GDMA_ISR_IRAM_SAFE + // lazy install interrupt service ESP_GOTO_ON_ERROR(gdma_install_tx_interrupt(tx_chan), err, TAG, "install interrupt service failed"); @@ -391,6 +419,17 @@ esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_ group = pair->group; gdma_rx_channel_t *rx_chan = __containerof(dma_chan, gdma_rx_channel_t, base); +#if CONFIG_GDMA_ISR_IRAM_SAFE + if (cbs->on_recv_eof) { + ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_recv_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_recv_eof not in IRAM"); + } + if (user_data) { + ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) || + esp_ptr_in_diram_dram(user_data) || + esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM"); + } +#endif // CONFIG_GDMA_ISR_IRAM_SAFE + // lazy install interrupt service ESP_GOTO_ON_ERROR(gdma_install_rx_interrupt(rx_chan), err, TAG, "install interrupt service failed"); @@ -408,7 +447,7 @@ err: return ret; } -esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr) +GDMA_CTRL_FUNC_ATTR esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr) { esp_err_t ret = ESP_OK; gdma_pair_t *pair = NULL; @@ -429,7 +468,7 @@ err: return ret; } -esp_err_t gdma_stop(gdma_channel_handle_t dma_chan) +GDMA_CTRL_FUNC_ATTR esp_err_t gdma_stop(gdma_channel_handle_t dma_chan) { esp_err_t ret = ESP_OK; gdma_pair_t *pair = NULL; @@ -448,7 +487,7 @@ err: return ret; } -esp_err_t gdma_append(gdma_channel_handle_t dma_chan) +GDMA_CTRL_FUNC_ATTR esp_err_t gdma_append(gdma_channel_handle_t dma_chan) { esp_err_t ret = ESP_OK; gdma_pair_t *pair = NULL; @@ -467,7 +506,7 @@ err: return ret; } -esp_err_t gdma_reset(gdma_channel_handle_t dma_chan) +GDMA_CTRL_FUNC_ATTR esp_err_t gdma_reset(gdma_channel_handle_t dma_chan) { esp_err_t ret = ESP_OK; gdma_pair_t *pair = NULL; @@ -512,7 +551,7 @@ static gdma_group_t *gdma_acquire_group_handle(int group_id) { bool new_group = false; gdma_group_t *group = NULL; - gdma_group_t *pre_alloc_group = calloc(1, sizeof(gdma_group_t)); + gdma_group_t *pre_alloc_group = heap_caps_calloc(1, sizeof(gdma_group_t), GDMA_MEM_ALLOC_CAPS); if (!pre_alloc_group) { goto out; } @@ -576,7 +615,7 @@ static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id) { bool new_pair = false; gdma_pair_t *pair = NULL; - gdma_pair_t *pre_alloc_pair = calloc(1, sizeof(gdma_pair_t)); + gdma_pair_t *pre_alloc_pair = heap_caps_calloc(1, sizeof(gdma_pair_t), GDMA_MEM_ALLOC_CAPS); if (!pre_alloc_pair) { goto out; } @@ -724,7 +763,7 @@ static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan) gdma_pair_t *pair = rx_chan->base.pair; gdma_group_t *group = pair->group; // pre-alloc a interrupt handle, with handler disabled - int isr_flags = ESP_INTR_FLAG_INTRDISABLED; + int isr_flags = GDMA_INTR_ALLOC_FLAGS; #if SOC_GDMA_TX_RX_SHARE_INTERRUPT isr_flags |= ESP_INTR_FLAG_SHARED; #endif @@ -751,7 +790,7 @@ static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan) gdma_pair_t *pair = tx_chan->base.pair; gdma_group_t *group = pair->group; // pre-alloc a interrupt handle, with handler disabled - int isr_flags = ESP_INTR_FLAG_INTRDISABLED; + int isr_flags = GDMA_INTR_ALLOC_FLAGS; #if SOC_GDMA_TX_RX_SHARE_INTERRUPT isr_flags |= ESP_INTR_FLAG_SHARED; #endif diff --git a/components/hal/esp32c3/include/hal/gdma_ll.h b/components/hal/esp32c3/include/hal/gdma_ll.h index 6ce2f89f66..fb7a8713be 100644 --- a/components/hal/esp32c3/include/hal/gdma_ll.h +++ b/components/hal/esp32c3/include/hal/gdma_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include @@ -67,6 +59,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable) /** * @brief Get DMA RX channel interrupt status word */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel) { return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK; @@ -87,6 +80,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel /** * @brief Clear DMA RX channel interrupt */ +__attribute__((always_inline)) static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask) { dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK); @@ -127,6 +121,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t /** * @brief Reset DMA RX channel FSM and FIFO pointer */ +__attribute__((always_inline)) static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_conf0.in_rst = 1; @@ -172,6 +167,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel) /** * @brief Set the descriptor link base address for RX channel */ +__attribute__((always_inline)) static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr) { dev->channel[channel].in.in_link.addr = addr; @@ -180,6 +176,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u /** * @brief Start dealing with RX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_link.start = 1; @@ -188,6 +185,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel) /** * @brief Stop dealing with RX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_link.stop = 1; @@ -196,6 +194,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel) /** * @brief Restart a new inlink right after the last descriptor */ +__attribute__((always_inline)) static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_link.restart = 1; @@ -220,6 +219,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel) /** * @brief Get RX success EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.in_suc_eof_des_addr; @@ -228,6 +228,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin /** * @brief Get RX error EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.in_err_eof_des_addr; @@ -236,6 +237,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3 /** * @brief Get current RX descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.in_dscr; @@ -261,6 +263,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe /** * @brief Get DMA TX channel interrupt status word */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel) { return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK; @@ -281,6 +284,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel /** * @brief Clear DMA TX channel interrupt */ +__attribute__((always_inline)) static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask) { dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK); @@ -337,6 +341,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c /** * @brief Reset DMA TX channel FSM and FIFO pointer */ +__attribute__((always_inline)) static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_conf0.out_rst = 1; @@ -382,6 +387,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3 /** * @brief Set the descriptor link base address for TX channel */ +__attribute__((always_inline)) static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr) { dev->channel[channel].out.out_link.addr = addr; @@ -390,6 +396,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u /** * @brief Start dealing with TX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_link.start = 1; @@ -398,6 +405,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel) /** * @brief Stop dealing with TX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_link.stop = 1; @@ -406,6 +414,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel) /** * @brief Restart a new outlink right after the last descriptor */ +__attribute__((always_inline)) static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_link.restart = 1; @@ -422,6 +431,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel) /** * @brief Get TX EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.out_eof_des_addr; @@ -430,6 +440,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch /** * @brief Get current TX descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.out_dscr; diff --git a/components/hal/esp32h2/include/hal/gdma_ll.h b/components/hal/esp32h2/include/hal/gdma_ll.h index 6ce2f89f66..fb7a8713be 100644 --- a/components/hal/esp32h2/include/hal/gdma_ll.h +++ b/components/hal/esp32h2/include/hal/gdma_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include @@ -67,6 +59,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable) /** * @brief Get DMA RX channel interrupt status word */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel) { return dev->intr[channel].st.val & GDMA_LL_RX_EVENT_MASK; @@ -87,6 +80,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel /** * @brief Clear DMA RX channel interrupt */ +__attribute__((always_inline)) static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask) { dev->intr[channel].clr.val = (mask & GDMA_LL_RX_EVENT_MASK); @@ -127,6 +121,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t /** * @brief Reset DMA RX channel FSM and FIFO pointer */ +__attribute__((always_inline)) static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_conf0.in_rst = 1; @@ -172,6 +167,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel) /** * @brief Set the descriptor link base address for RX channel */ +__attribute__((always_inline)) static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr) { dev->channel[channel].in.in_link.addr = addr; @@ -180,6 +176,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u /** * @brief Start dealing with RX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_link.start = 1; @@ -188,6 +185,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel) /** * @brief Stop dealing with RX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_link.stop = 1; @@ -196,6 +194,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel) /** * @brief Restart a new inlink right after the last descriptor */ +__attribute__((always_inline)) static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.in_link.restart = 1; @@ -220,6 +219,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel) /** * @brief Get RX success EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.in_suc_eof_des_addr; @@ -228,6 +228,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin /** * @brief Get RX error EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.in_err_eof_des_addr; @@ -236,6 +237,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3 /** * @brief Get current RX descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.in_dscr; @@ -261,6 +263,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe /** * @brief Get DMA TX channel interrupt status word */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel) { return dev->intr[channel].st.val & GDMA_LL_TX_EVENT_MASK; @@ -281,6 +284,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel /** * @brief Clear DMA TX channel interrupt */ +__attribute__((always_inline)) static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask) { dev->intr[channel].clr.val = (mask & GDMA_LL_TX_EVENT_MASK); @@ -337,6 +341,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c /** * @brief Reset DMA TX channel FSM and FIFO pointer */ +__attribute__((always_inline)) static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_conf0.out_rst = 1; @@ -382,6 +387,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3 /** * @brief Set the descriptor link base address for TX channel */ +__attribute__((always_inline)) static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr) { dev->channel[channel].out.out_link.addr = addr; @@ -390,6 +396,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u /** * @brief Start dealing with TX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_link.start = 1; @@ -398,6 +405,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel) /** * @brief Stop dealing with TX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_link.stop = 1; @@ -406,6 +414,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel) /** * @brief Restart a new outlink right after the last descriptor */ +__attribute__((always_inline)) static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.out_link.restart = 1; @@ -422,6 +431,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel) /** * @brief Get TX EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.out_eof_des_addr; @@ -430,6 +440,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch /** * @brief Get current TX descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.out_dscr; diff --git a/components/hal/esp32s3/include/hal/gdma_ll.h b/components/hal/esp32s3/include/hal/gdma_ll.h index 194081dbb9..4035c76934 100644 --- a/components/hal/esp32s3/include/hal/gdma_ll.h +++ b/components/hal/esp32s3/include/hal/gdma_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include @@ -81,6 +73,7 @@ static inline void gdma_ll_enable_clock(gdma_dev_t *dev, bool enable) /** * @brief Get DMA RX channel interrupt status word */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.int_st.val; @@ -101,6 +94,7 @@ static inline void gdma_ll_rx_enable_interrupt(gdma_dev_t *dev, uint32_t channel /** * @brief Clear DMA RX channel interrupt */ +__attribute__((always_inline)) static inline void gdma_ll_rx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask) { dev->channel[channel].in.int_clr.val = mask; @@ -141,6 +135,7 @@ static inline void gdma_ll_rx_enable_descriptor_burst(gdma_dev_t *dev, uint32_t /** * @brief Reset DMA RX channel FSM and FIFO pointer */ +__attribute__((always_inline)) static inline void gdma_ll_rx_reset_channel(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.conf0.in_rst = 1; @@ -210,6 +205,7 @@ static inline uint32_t gdma_ll_rx_pop_data(gdma_dev_t *dev, uint32_t channel) /** * @brief Set the descriptor link base address for RX channel */ +__attribute__((always_inline)) static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr) { dev->channel[channel].in.link.addr = addr; @@ -218,6 +214,7 @@ static inline void gdma_ll_rx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u /** * @brief Start dealing with RX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.link.start = 1; @@ -226,6 +223,7 @@ static inline void gdma_ll_rx_start(gdma_dev_t *dev, uint32_t channel) /** * @brief Stop dealing with RX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.link.stop = 1; @@ -234,6 +232,7 @@ static inline void gdma_ll_rx_stop(gdma_dev_t *dev, uint32_t channel) /** * @brief Restart a new inlink right after the last descriptor */ +__attribute__((always_inline)) static inline void gdma_ll_rx_restart(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].in.link.restart = 1; @@ -258,6 +257,7 @@ static inline bool gdma_ll_rx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel) /** * @brief Get RX success EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.suc_eof_des_addr; @@ -266,6 +266,7 @@ static inline uint32_t gdma_ll_rx_get_success_eof_desc_addr(gdma_dev_t *dev, uin /** * @brief Get RX error EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.err_eof_des_addr; @@ -274,6 +275,7 @@ static inline uint32_t gdma_ll_rx_get_error_eof_desc_addr(gdma_dev_t *dev, uint3 /** * @brief Get current RX descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_rx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].in.dscr; @@ -307,6 +309,7 @@ static inline void gdma_ll_rx_connect_to_periph(gdma_dev_t *dev, uint32_t channe /** * @brief Get DMA TX channel interrupt status word */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_interrupt_status(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.int_st.val; @@ -327,6 +330,7 @@ static inline void gdma_ll_tx_enable_interrupt(gdma_dev_t *dev, uint32_t channel /** * @brief Clear DMA TX channel interrupt */ +__attribute__((always_inline)) static inline void gdma_ll_tx_clear_interrupt_status(gdma_dev_t *dev, uint32_t channel, uint32_t mask) { dev->channel[channel].out.int_clr.val = mask; @@ -383,6 +387,7 @@ static inline void gdma_ll_tx_enable_auto_write_back(gdma_dev_t *dev, uint32_t c /** * @brief Reset DMA TX channel FSM and FIFO pointer */ +__attribute__((always_inline)) static inline void gdma_ll_tx_reset_channel(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.conf0.out_rst = 1; @@ -444,6 +449,7 @@ static inline void gdma_ll_tx_push_data(gdma_dev_t *dev, uint32_t channel, uint3 /** * @brief Set the descriptor link base address for TX channel */ +__attribute__((always_inline)) static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, uint32_t addr) { dev->channel[channel].out.link.addr = addr; @@ -452,6 +458,7 @@ static inline void gdma_ll_tx_set_desc_addr(gdma_dev_t *dev, uint32_t channel, u /** * @brief Start dealing with TX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.link.start = 1; @@ -460,6 +467,7 @@ static inline void gdma_ll_tx_start(gdma_dev_t *dev, uint32_t channel) /** * @brief Stop dealing with TX descriptors */ +__attribute__((always_inline)) static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.link.stop = 1; @@ -468,6 +476,7 @@ static inline void gdma_ll_tx_stop(gdma_dev_t *dev, uint32_t channel) /** * @brief Restart a new outlink right after the last descriptor */ +__attribute__((always_inline)) static inline void gdma_ll_tx_restart(gdma_dev_t *dev, uint32_t channel) { dev->channel[channel].out.link.restart = 1; @@ -484,6 +493,7 @@ static inline bool gdma_ll_tx_is_fsm_idle(gdma_dev_t *dev, uint32_t channel) /** * @brief Get TX EOF descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.eof_des_addr; @@ -492,6 +502,7 @@ static inline uint32_t gdma_ll_tx_get_eof_desc_addr(gdma_dev_t *dev, uint32_t ch /** * @brief Get current TX descriptor's address */ +__attribute__((always_inline)) static inline uint32_t gdma_ll_tx_get_current_desc_addr(gdma_dev_t *dev, uint32_t channel) { return dev->channel[channel].out.dscr;