kopia lustrzana https://github.com/espressif/esp-idf
feature(sdio): allow to enable internal pullups of the SDIO host and slave as a debug feature
NOTE: the internal pullups are not totally reliable, please do add external pullups on your bus.pull/2093/head
michael
rodzic
e1a6e71486
commit
5b37a96ddc
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@ -20,7 +20,7 @@
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#include "esp_err.h"
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#include "rom/queue.h"
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#include "soc/host_reg.h"
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#include "soc/sdio_slave_periph.h"
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#ifdef __cplusplus
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extern "C" {
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@ -71,6 +71,23 @@ typedef struct {
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///< All data that do not fully fill a buffer is still counted as one buffer. E.g. 10 bytes data costs 2 buffers if the size is 8 bytes per buffer.
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///< Buffer size of the slave pre-defined between host and slave before communication. All receive buffer given to the driver should be larger than this.
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sdio_event_cb_t event_cb; ///< when the host interrupts slave, this callback will be called with interrupt number (0-7).
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uint32_t flags; ///< Features to be enabled for the slave, combinations of ``SDIO_SLAVE_FLAG_*``.
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#define SDIO_SLAVE_FLAG_DAT2_DISABLED BIT(0) /**< It is required by the SD specification that all 4 data
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lines should be used and pulled up even in 1-bit mode or SPI mode. However, as a feature, the user can speicfy
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this flag to make use of DAT2 pin in 1-bit mode. Note that the host cannot read CCCR registers to know we don't
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support 4-bit mode anymore, please do this at your own risk.
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*/
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#define SDIO_SLAVE_FLAG_HOST_INTR_DISABLED BIT(1) /**< The DAT1 line is used as the interrupt line in SDIO
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protocol. However, as a feature, the user can speicfy this flag to make use of DAT1 pin of the slave in 1-bit
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mode. Note that the host has to do polling to the interrupt registers to know whether there are interrupts from
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the slave. And it cannot read CCCR registers to know we don't support 4-bit mode anymore, please do this at
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your own risk.
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*/
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#define SDIO_SLAVE_FLAG_INTERNAL_PULLUP BIT(2) /**< Enable internal pullups for enabled pins. It is required
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by the SD specification that all the 4 data lines should be pulled up even in 1-bit mode or SPI mode. Note that
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the internal pull-ups are not sufficient for stable communication, please do connect external pull-ups on the
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bus. This is only for example and debug use.
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*/
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} sdio_slave_config_t;
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/** Handle of a receive buffer, register a handle by calling ``sdio_slave_recv_register_buf``. Use the handle to load the buffer to the
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@ -55,6 +55,12 @@ typedef struct {
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gpio_num_t gpio_cd; ///< GPIO number of card detect signal
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gpio_num_t gpio_wp; ///< GPIO number of write protect signal
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uint8_t width; ///< Bus width used by the slot (might be less than the max width supported)
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uint32_t flags; ///< Features used by this slot
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#define SDMMC_SLOT_FLAG_INTERNAL_PULLUP BIT(0)
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/**< Enable internal pullups on enabled pins. The internal pullups
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are insufficient however, please make sure external pullups are
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connected on the bus. This is for debug / example purpose only.
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*/
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} sdmmc_slot_config_t;
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#define SDMMC_SLOT_NO_CD ((gpio_num_t) -1) ///< indicates that card detect line is not used
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@ -68,6 +74,7 @@ typedef struct {
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.gpio_cd = SDMMC_SLOT_NO_CD, \
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.gpio_wp = SDMMC_SLOT_NO_WP, \
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.width = SDMMC_SLOT_WIDTH_DEFAULT, \
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.flags = 0, \
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}
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/**
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@ -199,6 +206,23 @@ esp_err_t sdmmc_host_io_int_wait(int slot, TickType_t timeout_ticks);
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*/
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esp_err_t sdmmc_host_deinit();
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/**
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* @brief Enable the pull-ups of sd pins.
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*
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* @note You should always place actual pullups on the lines instead of using
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* this function. Internal pullup resistance are high and not sufficient, may
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* cause instability in products. This is for debug or examples only.
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*
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* @param slot Slot to use, normally set it to 1.
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* @param width Bit width of your configuration, 1 or 4.
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*
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* @return
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* - ESP_OK: if success
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* - ESP_ERR_INVALID_ARG: if configured width larger than maximum the slot can
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* support
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*/
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esp_err_t sdmmc_host_pullup_en(int slot, int width);
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#ifdef __cplusplus
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}
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#endif
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@ -86,10 +86,7 @@ The driver of FIFOs works as below:
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#include <string.h>
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#include "driver/sdio_slave.h"
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#include "soc/slc_struct.h"
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#include "soc/slc_reg.h"
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#include "soc/host_struct.h"
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#include "soc/hinf_struct.h"
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#include "soc/sdio_slave_periph.h"
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#include "rom/lldesc.h"
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#include "esp_log.h"
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#include "esp_intr_alloc.h"
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@ -119,41 +116,6 @@ typedef enum {
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STATE_SENDING = 3,
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} send_state_t;
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typedef struct {
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uint32_t clk;
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uint32_t cmd;
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uint32_t d0;
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uint32_t d1;
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uint32_t d2;
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uint32_t d3;
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int func;
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} sdio_slave_slot_info_t ;
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// I/O slot of sdio slave:
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// 0: GPIO 6, 11, 7, 8, 9, 10,
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// 1: GPIO 14, 15, 2, 4, 12, 13 for CLK, CMD, D0, D1, D2, D3 respectively.
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// only one peripheral for SDIO and only one slot can work at the same time.
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// currently slot 0 is occupied by SPI for flash
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static const sdio_slave_slot_info_t s_slot_info[2] = {
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{
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.clk = PERIPHS_IO_MUX_SD_CLK_U,
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.cmd = PERIPHS_IO_MUX_SD_CMD_U,
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.d0 = PERIPHS_IO_MUX_SD_DATA0_U,
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.d1 = PERIPHS_IO_MUX_SD_DATA1_U,
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.d2 = PERIPHS_IO_MUX_SD_DATA2_U,
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.d3 = PERIPHS_IO_MUX_SD_DATA3_U,
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.func = 0,
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}, {
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.clk = PERIPHS_IO_MUX_MTMS_U,
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.cmd = PERIPHS_IO_MUX_MTDO_U,
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.d0 = PERIPHS_IO_MUX_GPIO2_U,
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.d1 = PERIPHS_IO_MUX_GPIO4_U,
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.d2 = PERIPHS_IO_MUX_MTDI_U,
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.d3 = PERIPHS_IO_MUX_MTCK_U,
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.func = 4,
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},
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};
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// first 3 WORDs of this struct is defined by and compatible to the DMA link list format.
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// sdio_slave_buf_handle_t is of type buf_desc_t*;
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typedef struct buf_desc_s{
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@ -499,13 +461,21 @@ no_mem:
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return ESP_ERR_NO_MEM;
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}
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static inline void configure_pin(uint32_t io_mux_reg, uint32_t func)
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static void configure_pin(int pin, uint32_t func, bool pullup)
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{
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const int sdmmc_func = func;
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const int drive_strength = 3;
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PIN_INPUT_ENABLE(io_mux_reg);
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PIN_FUNC_SELECT(io_mux_reg, sdmmc_func);
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PIN_SET_DRV(io_mux_reg, drive_strength);
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assert(pin!=-1);
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uint32_t reg = GPIO_PIN_MUX_REG[pin];
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assert(reg!=UINT32_MAX);
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PIN_INPUT_ENABLE(reg);
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PIN_FUNC_SELECT(reg, sdmmc_func);
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PIN_SET_DRV(reg, drive_strength);
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if (pullup) {
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gpio_pullup_en(pin);
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gpio_pulldown_dis(pin);
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}
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}
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static inline esp_err_t sdio_slave_hw_init(sdio_slave_config_t *config)
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@ -514,13 +484,20 @@ static inline esp_err_t sdio_slave_hw_init(sdio_slave_config_t *config)
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SLC.slc0_int_ena.val = 0;
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//initialize pin
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const sdio_slave_slot_info_t *slot = &s_slot_info[1];
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configure_pin(slot->clk, slot->func);
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configure_pin(slot->cmd, slot->func);
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configure_pin(slot->d0, slot->func);
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configure_pin(slot->d1, slot->func);
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configure_pin(slot->d2, slot->func);
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configure_pin(slot->d3, slot->func);
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const sdio_slave_slot_info_t *slot = &sdio_slave_slot_info[1];
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bool pullup = config->flags & SDIO_SLAVE_FLAG_INTERNAL_PULLUP;
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configure_pin(slot->clk_gpio, slot->func, false); //clk doesn't need a pullup
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configure_pin(slot->cmd_gpio, slot->func, pullup);
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configure_pin(slot->d0_gpio, slot->func, pullup);
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if ((config->flags & SDIO_SLAVE_FLAG_HOST_INTR_DISABLED)==0) {
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configure_pin(slot->d1_gpio, slot->func, pullup);
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}
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if ((config->flags & SDIO_SLAVE_FLAG_DAT2_DISABLED)==0) {
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configure_pin(slot->d2_gpio, slot->func, pullup);
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}
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configure_pin(slot->d3_gpio, slot->func, pullup);
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//enable module and config
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periph_module_reset(PERIPH_SDIO_SLAVE_MODULE);
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periph_module_enable(PERIPH_SDIO_SLAVE_MODULE);
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@ -17,76 +17,21 @@
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#include <sys/param.h>
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#include "esp_log.h"
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#include "esp_intr_alloc.h"
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#include "soc/sdmmc_struct.h"
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#include "soc/sdmmc_reg.h"
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#include "soc/io_mux_reg.h"
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#include "soc/gpio_sig_map.h"
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#include "rom/gpio.h"
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#include "driver/gpio.h"
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#include "driver/sdmmc_host.h"
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#include "driver/periph_ctrl.h"
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#include "sdmmc_private.h"
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#include "freertos/semphr.h"
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#include "soc/sdmmc_periph.h"
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#define SDMMC_EVENT_QUEUE_LENGTH 32
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typedef struct {
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uint32_t clk;
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uint32_t cmd;
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uint32_t d0;
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uint32_t d1;
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uint32_t d2;
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uint32_t d3;
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uint32_t d4;
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uint32_t d5;
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uint32_t d6;
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uint32_t d7;
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uint8_t d1_gpio;
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uint8_t d3_gpio;
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uint8_t card_detect;
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uint8_t write_protect;
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uint8_t card_int;
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uint8_t width;
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} sdmmc_slot_info_t;
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static void sdmmc_isr(void* arg);
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static void sdmmc_host_dma_init();
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static const sdmmc_slot_info_t s_slot_info[2] = {
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{
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.clk = PERIPHS_IO_MUX_SD_CLK_U,
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.cmd = PERIPHS_IO_MUX_SD_CMD_U,
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.d0 = PERIPHS_IO_MUX_SD_DATA0_U,
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.d1 = PERIPHS_IO_MUX_SD_DATA1_U,
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.d2 = PERIPHS_IO_MUX_SD_DATA2_U,
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.d3 = PERIPHS_IO_MUX_SD_DATA3_U,
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.d1_gpio = 8,
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.d3_gpio = 10,
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.d4 = PERIPHS_IO_MUX_GPIO16_U,
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.d5 = PERIPHS_IO_MUX_GPIO17_U,
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.d6 = PERIPHS_IO_MUX_GPIO5_U,
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.d7 = PERIPHS_IO_MUX_GPIO18_U,
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.card_detect = HOST_CARD_DETECT_N_1_IDX,
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.write_protect = HOST_CARD_WRITE_PRT_1_IDX,
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.card_int = HOST_CARD_INT_N_1_IDX,
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.width = 8
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},
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{
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.clk = PERIPHS_IO_MUX_MTMS_U,
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.cmd = PERIPHS_IO_MUX_MTDO_U,
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.d0 = PERIPHS_IO_MUX_GPIO2_U,
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.d1 = PERIPHS_IO_MUX_GPIO4_U,
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.d2 = PERIPHS_IO_MUX_MTDI_U,
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.d3 = PERIPHS_IO_MUX_MTCK_U,
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.d1_gpio = 4,
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.d3_gpio = 13,
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.card_detect = HOST_CARD_DETECT_N_2_IDX,
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.write_protect = HOST_CARD_WRITE_PRT_2_IDX,
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.card_int = HOST_CARD_INT_N_2_IDX,
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.width = 4
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}
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};
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static const char* TAG = "sdmmc_periph";
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static intr_handle_t s_intr_handle;
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@ -340,18 +285,24 @@ esp_err_t sdmmc_host_init()
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return ESP_OK;
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}
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static inline void configure_pin(uint32_t io_mux_reg)
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static void configure_pin(int pin)
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{
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const int sdmmc_func = 3;
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const int drive_strength = 3;
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PIN_INPUT_ENABLE(io_mux_reg);
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PIN_FUNC_SELECT(io_mux_reg, sdmmc_func);
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PIN_SET_DRV(io_mux_reg, drive_strength);
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assert(pin!=-1);
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uint32_t reg = GPIO_PIN_MUX_REG[pin];
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assert(reg != UINT32_MAX);
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PIN_INPUT_ENABLE(reg);
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PIN_FUNC_SELECT(reg, sdmmc_func);
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PIN_SET_DRV(reg, drive_strength);
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}
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esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
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{
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bool pullup = slot_config->flags & SDMMC_SLOT_FLAG_INTERNAL_PULLUP;
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if (pullup) {
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sdmmc_host_pullup_en(slot, slot_config->width);
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}
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if (!s_intr_handle) {
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return ESP_ERR_INVALID_STATE;
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}
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@ -366,7 +317,7 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
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uint8_t slot_width = slot_config->width;
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// Configure pins
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const sdmmc_slot_info_t* pslot = &s_slot_info[slot];
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const sdmmc_slot_info_t* pslot = &sdmmc_slot_info[slot];
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if (slot_width == SDMMC_SLOT_WIDTH_DEFAULT) {
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slot_width = pslot->width;
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@ -376,13 +327,13 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
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}
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s_slot_width[slot] = slot_width;
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configure_pin(pslot->clk);
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configure_pin(pslot->cmd);
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configure_pin(pslot->d0);
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configure_pin(pslot->clk_gpio);
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configure_pin(pslot->cmd_gpio);
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configure_pin(pslot->d0_gpio);
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if (slot_width >= 4) {
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configure_pin(pslot->d1);
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configure_pin(pslot->d2);
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configure_pin(pslot->d1_gpio);
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configure_pin(pslot->d2_gpio);
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//force pull-up D3 to make slave detect SD mode. connect to peripheral after width configuration.
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gpio_config_t gpio_conf = {
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.pin_bit_mask = BIT(pslot->d3_gpio),
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@ -394,10 +345,10 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
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gpio_config( &gpio_conf );
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gpio_set_level( pslot->d3_gpio, 1 );
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if (slot_width == 8) {
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configure_pin(pslot->d4);
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configure_pin(pslot->d5);
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configure_pin(pslot->d6);
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configure_pin(pslot->d7);
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configure_pin(pslot->d4_gpio);
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configure_pin(pslot->d5_gpio);
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configure_pin(pslot->d6_gpio);
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configure_pin(pslot->d7_gpio);
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}
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}
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@ -482,7 +433,7 @@ esp_err_t sdmmc_host_set_bus_width(int slot, size_t width)
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if (!(slot == 0 || slot == 1)) {
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return ESP_ERR_INVALID_ARG;
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}
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if (s_slot_info[slot].width < width) {
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if (sdmmc_slot_info[slot].width < width) {
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return ESP_ERR_INVALID_ARG;
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}
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const uint16_t mask = BIT(slot);
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@ -492,10 +443,10 @@ esp_err_t sdmmc_host_set_bus_width(int slot, size_t width)
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} else if (width == 4) {
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SDMMC.ctype.card_width_8 &= ~mask;
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SDMMC.ctype.card_width |= mask;
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configure_pin(s_slot_info[slot].d3); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
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configure_pin(sdmmc_slot_info[slot].d3_gpio); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
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} else if (width == 8){
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SDMMC.ctype.card_width_8 |= mask;
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configure_pin(s_slot_info[slot].d3); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
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configure_pin(sdmmc_slot_info[slot].d3_gpio); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
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} else {
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return ESP_ERR_INVALID_ARG;
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}
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@ -550,7 +501,7 @@ void sdmmc_host_dma_resume()
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esp_err_t sdmmc_host_io_int_enable(int slot)
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{
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configure_pin(s_slot_info[slot].d1);
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configure_pin(sdmmc_slot_info[slot].d1_gpio);
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return ESP_OK;
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}
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@ -566,7 +517,7 @@ esp_err_t sdmmc_host_io_int_wait(int slot, TickType_t timeout_ticks)
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SDMMC.intmask.sdio &= ~BIT(slot); /* Disable SDIO interrupt */
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SDMMC.rintsts.sdio = BIT(slot);
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if (gpio_get_level(s_slot_info[slot].d1_gpio) == 0) {
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if (gpio_get_level(sdmmc_slot_info[slot].d1_gpio) == 0) {
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return ESP_OK;
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}
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/* Otherwise, need to wait for an interrupt. Since D1 was high,
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@ -627,3 +578,34 @@ static void sdmmc_isr(void* arg) {
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}
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}
|
||||
|
||||
esp_err_t sdmmc_host_pullup_en(int slot, int width)
|
||||
{
|
||||
if (width > sdmmc_slot_info[slot].width) {
|
||||
//in esp32 we only support 8 bit in slot 0, note this is occupied by the flash by default
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
//according to the spec, the host control the clk, we don't to pull it up here
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].cmd_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].cmd_gpio);
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d0_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d0_gpio);
|
||||
if (width >= 4) {
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d1_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d1_gpio);
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d2_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d2_gpio);
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d3_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d3_gpio);
|
||||
}
|
||||
if (width == 8) {
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d4_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d4_gpio);
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d5_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d5_gpio);
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d6_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d6_gpio);
|
||||
gpio_pullup_en(sdmmc_slot_info[slot].d7_gpio);
|
||||
gpio_pulldown_dis(sdmmc_slot_info[slot].d7_gpio);
|
||||
}
|
||||
return ESP_OK;
|
||||
}
|
||||
|
|
@ -19,7 +19,7 @@
|
|||
#include "esp_err.h"
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/queue.h"
|
||||
#include "soc/sdmmc_struct.h"
|
||||
#include "soc/sdmmc_periph.h"
|
||||
|
||||
typedef struct {
|
||||
uint32_t sdmmc_status; ///< masked SDMMC interrupt status
|
||||
|
|
|
|||
|
|
@ -19,8 +19,7 @@
|
|||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/queue.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "soc/sdmmc_reg.h"
|
||||
#include "soc/sdmmc_struct.h"
|
||||
#include "soc/sdmmc_periph.h"
|
||||
#include "soc/soc_memory_layout.h"
|
||||
#include "driver/sdmmc_types.h"
|
||||
#include "driver/sdmmc_defs.h"
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
#include "esp_log.h"
|
||||
#include "sys/lock.h"
|
||||
#include "soc/sdmmc_reg.h"
|
||||
#include "soc/sdmmc_struct.h"
|
||||
#include "soc/sdmmc_periph.h"
|
||||
#include "driver/sdmmc_types.h"
|
||||
#include "driver/sdmmc_defs.h"
|
||||
#include "driver/sdmmc_host.h"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,34 @@
|
|||
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _SOC_SDIO_SLAVE_PINS_H_
|
||||
#define _SOC_SDIO_SLAVE_PINS_H_
|
||||
|
||||
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CLK 6
|
||||
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CMD 11
|
||||
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D0 7
|
||||
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D1 8
|
||||
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D2 9
|
||||
#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D3 10
|
||||
#define SDIO_SLAVE_SLOT0_FUNC 0
|
||||
|
||||
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK 14
|
||||
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD 15
|
||||
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0 2
|
||||
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1 4
|
||||
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2 12
|
||||
#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3 13
|
||||
#define SDIO_SLAVE_SLOT1_FUNC 4
|
||||
|
||||
#endif /* _SOC_SDIO_SLAVE_PINS_H_ */
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _SOC_SDMMC_PINS_H_
|
||||
#define _SOC_SDMMC_PINS_H_
|
||||
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_CLK 6
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_CMD 11
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D0 7
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D1 8
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D2 9
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D3 10
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D4 16
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D5 17
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D6 5
|
||||
#define SDMMC_SLOT0_IOMUX_PIN_NUM_D7 18
|
||||
#define SDMMC_SLOT0_FUNC 0
|
||||
|
||||
#define SDMMC_SLOT1_IOMUX_PIN_NUM_CLK 14
|
||||
#define SDMMC_SLOT1_IOMUX_PIN_NUM_CMD 15
|
||||
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D0 2
|
||||
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D1 4
|
||||
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D2 12
|
||||
#define SDMMC_SLOT1_IOMUX_PIN_NUM_D3 13
|
||||
#define SDMMC_SLOT1_FUNC 4
|
||||
|
||||
#endif /* _SOC_SDMMC_PINS_H_ */
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include <stdint.h>
|
||||
#include "soc/sdio_slave_periph.h"
|
||||
#include "soc/io_mux_reg.h"
|
||||
#include "soc/sdio_slave_pins.h"
|
||||
|
||||
// I/O slot of sdio slave:
|
||||
// 0: GPIO 6, 11, 7, 8, 9, 10,
|
||||
// 1: GPIO 14, 15, 2, 4, 12, 13 for CLK, CMD, D0, D1, D2, D3 respectively.
|
||||
// only one peripheral for SDIO and only one slot can work at the same time.
|
||||
// currently slot 0 is occupied by SPI for flash
|
||||
const sdio_slave_slot_info_t sdio_slave_slot_info[2] = {
|
||||
{
|
||||
.clk_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CLK,
|
||||
.cmd_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CMD,
|
||||
.d0_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D0,
|
||||
.d1_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D1,
|
||||
.d2_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D2,
|
||||
.d3_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D3,
|
||||
.func = SDIO_SLAVE_SLOT0_FUNC,
|
||||
}, {
|
||||
.clk_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK,
|
||||
.cmd_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD,
|
||||
.d0_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0,
|
||||
.d1_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1,
|
||||
.d2_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2,
|
||||
.d3_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3,
|
||||
.func = SDIO_SLAVE_SLOT1_FUNC,
|
||||
},
|
||||
};
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "soc/sdmmc_periph.h"
|
||||
|
||||
const sdmmc_slot_info_t sdmmc_slot_info[2] = {
|
||||
{
|
||||
.clk_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_CLK,
|
||||
.cmd_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_CMD,
|
||||
.d0_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D0,
|
||||
.d1_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D1,
|
||||
.d2_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D2,
|
||||
.d3_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D3,
|
||||
.d4_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D4,
|
||||
.d5_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D5,
|
||||
.d6_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D6,
|
||||
.d7_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D7,
|
||||
.card_detect = HOST_CARD_DETECT_N_1_IDX,
|
||||
.write_protect = HOST_CARD_WRITE_PRT_1_IDX,
|
||||
.card_int = HOST_CARD_INT_N_1_IDX,
|
||||
.width = 8
|
||||
},
|
||||
{
|
||||
.clk_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_CLK,
|
||||
.cmd_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_CMD,
|
||||
.d0_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D0,
|
||||
.d1_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D1,
|
||||
.d2_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D2,
|
||||
.d3_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D3,
|
||||
.d4_gpio = -1, //slot1 has no D4-7
|
||||
.d5_gpio = -1,
|
||||
.d6_gpio = -1,
|
||||
.d7_gpio = -1,
|
||||
.card_detect = HOST_CARD_DETECT_N_2_IDX,
|
||||
.write_protect = HOST_CARD_WRITE_PRT_2_IDX,
|
||||
.card_int = HOST_CARD_INT_N_2_IDX,
|
||||
.width = 4
|
||||
}
|
||||
};
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _SOC_SDIO_SLAVE_PERIPH_H_
|
||||
#define _SOC_SDIO_SLAVE_PERIPH_H_
|
||||
|
||||
#include <stdint.h>
|
||||
//include soc related (generated) definitions
|
||||
#include "soc/sdio_slave_pins.h"
|
||||
#include "soc/slc_reg.h"
|
||||
#include "soc/slc_struct.h"
|
||||
#include "soc/host_reg.h"
|
||||
#include "soc/host_struct.h"
|
||||
#include "soc/hinf_reg.h"
|
||||
#include "soc/hinf_struct.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** pin and signal information of each slot */
|
||||
typedef struct {
|
||||
uint32_t clk_gpio;
|
||||
uint32_t cmd_gpio;
|
||||
uint32_t d0_gpio;
|
||||
uint32_t d1_gpio;
|
||||
uint32_t d2_gpio;
|
||||
uint32_t d3_gpio;
|
||||
int func;
|
||||
} sdio_slave_slot_info_t;
|
||||
|
||||
extern const sdio_slave_slot_info_t sdio_slave_slot_info[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SOC_SDIO_SLAVE_PERIPH_H_ */
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _SOC_SDMMC_PERIPH_H_
|
||||
#define _SOC_SDMMC_PERIPH_H_
|
||||
|
||||
#include <stdint.h>
|
||||
//include soc related (generated) definitions
|
||||
#include "soc/sdmmc_pins.h"
|
||||
#include "soc/sdmmc_reg.h"
|
||||
#include "soc/sdmmc_struct.h"
|
||||
#include "soc/gpio_sig_map.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
uint8_t clk_gpio;
|
||||
uint8_t cmd_gpio;
|
||||
uint8_t d0_gpio;
|
||||
uint8_t d1_gpio;
|
||||
uint8_t d2_gpio;
|
||||
uint8_t d3_gpio;
|
||||
uint8_t d4_gpio;
|
||||
uint8_t d5_gpio;
|
||||
uint8_t d6_gpio;
|
||||
uint8_t d7_gpio;
|
||||
uint8_t card_detect;
|
||||
uint8_t write_protect;
|
||||
uint8_t card_int;
|
||||
uint8_t width;
|
||||
} sdmmc_slot_info_t;
|
||||
|
||||
/** pin and signal information of each slot */
|
||||
extern const sdmmc_slot_info_t sdmmc_slot_info[];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _SOC_SDMMC_PERIPH_H_ */
|
||||
Ładowanie…
Reference in New Issue