diff --git a/components/driver/include/driver/timer.h b/components/driver/include/driver/timer.h
index 204fc9db27..a3ab39267c 100644
--- a/components/driver/include/driver/timer.h
+++ b/components/driver/include/driver/timer.h
@@ -130,8 +130,9 @@ esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num,
 esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload);
 
 /**
- * @brief Set hardware timer source clock divider. Timer groups clock are divider from APB clock.
- *
+ * @brief Set hardware divider of the source clock to the timer group.
+ * By default, the source clock is APB clock running at 80 MHz.
+ * For more information, please check Chapter Reset and Clock in Chip Technical Reference Manual.
  * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
  * @param timer_num Timer index, 0 for hw_timer[0] & 1 for hw_timer[1]
  * @param divider Timer clock divider value. The divider's range is from from 2 to 65536.
diff --git a/docs/en/api-reference/peripherals/timer.rst b/docs/en/api-reference/peripherals/timer.rst
index 6118321e65..1868514e59 100644
--- a/docs/en/api-reference/peripherals/timer.rst
+++ b/docs/en/api-reference/peripherals/timer.rst
@@ -35,8 +35,8 @@ First of all, the timer should be initialized by calling the function :cpp:func:
 
 .. list::
 
-    :not esp32: - **Clock Source**: Select the clock source, which together with the **Divider** define the resolution of the working timer. By default the clock source is APB_CLK (typically 80 MHz).
-    - **Divider**: Sets how quickly the timer's counter is "ticking". The setting :cpp:member:`divider` is used as a divisor of the clock source.
+    :not esp32: - **Clock Source**: Select the clock source, which together with the **Divider** define the resolution of the working timer.
+    - **Divider**: Sets how quickly the timer's counter is "ticking". The setting :cpp:member:`divider` is used as a divisor of the clock source that by default is APB_CLK running at 80 MHz. For more information of APB_CLK frequency, please check *{IDF_TARGET_NAME} Technical Reference Manual* > *Reset and Clock* [`PDF <{IDF_TARGET_TRM_EN_URL}#resclk>`__] chapter for more details.
     - **Mode**: Sets if the counter should be incrementing or decrementing. It can be defined using :cpp:member:`counter_dir` by selecting one of the values from :cpp:type:`timer_count_dir_t`.
     - **Counter Enable**: If the counter is enabled, it will start incrementing / decrementing immediately after calling :cpp:func:`timer_init`. You can change the behavior with :cpp:member:`counter_en` by selecting one of the values from :cpp:type:`timer_start_t`.
     - **Alarm Enable**: Can be set using :cpp:member:`alarm_en`.
diff --git a/docs/zh_CN/api-reference/peripherals/timer.rst b/docs/zh_CN/api-reference/peripherals/timer.rst
index 81c69646a4..89eea0d816 100644
--- a/docs/zh_CN/api-reference/peripherals/timer.rst
+++ b/docs/zh_CN/api-reference/peripherals/timer.rst
@@ -42,8 +42,8 @@
 
 .. list::
 
-    :not esp32: - **时钟源**: 选择时钟源，它同时钟分频器一起决定了定时器的分辨率。默认的时钟源是 APB_CLK (一般是 80 MHz)。
-    - **分频器**: 设置定时器中计数器计数的速度，:cpp:member:`divider` 的设置将用作输入时钟源的除数。
+    :not esp32: - **时钟源**: 选择时钟源，与时钟分频器一起决定了定时器的分辨率。
+    - **分频器**: 设置定时器中计数器计数的速度，:cpp:member:`divider` 的设置将用作输入时钟源的除数。默认的时钟源是 APB_CLK (一般是 80 MHz)。更多有关 APB_CLK 时钟频率信息，请查看 *{IDF_TARGET_NAME} 技术参考手册* > *复位和时钟* [`PDF <{IDF_TARGET_TRM_CN_URL}#resclk>`__] 章节。
     - **模式**: 设置计数器是递增还是递减。可通过从 :cpp:type:`timer_count_dir_t` 中选取一个值，后使用 :cpp:member:`counter_dir` 来选择模式。
     - **计数器使能**: 如果计数器已使能，则在调用 :cpp:func:`timer_init` 后计数器将立即开始递增/递减。您可通过从 :cpp:type:`timer_start_t` 中选取一个值，后使用 :cpp:member:`counter_en` 改变此行为。
     - **报警使能**: 可使用 :cpp:member:`alarm_en` 设置。