From 58d83dda4075af6d92b9da0c7762ef87c473b720 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Thu, 8 Apr 2021 18:50:56 +0800 Subject: [PATCH] rtc: increase CI acceptance range for calc 8M test --- components/esp_hw_support/test/test_rtc_clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_hw_support/test/test_rtc_clk.c b/components/esp_hw_support/test/test_rtc_clk.c index 1a12903905..8d0496efdb 100644 --- a/components/esp_hw_support/test/test_rtc_clk.c +++ b/components/esp_hw_support/test/test_rtc_clk.c @@ -153,7 +153,7 @@ TEST_CASE("Calculate 8M clock frequency", "[rtc_clk]") uint32_t rtc_8md256_period = rtc_clk_cal(RTC_CAL_8MD256, 100); uint32_t rtc_fast_freq_hz = 1000000ULL * (1 << RTC_CLK_CAL_FRACT) * 256 / rtc_8md256_period; printf("RTC_FAST_CLK=%d Hz\n", rtc_fast_freq_hz); - TEST_ASSERT_INT32_WITHIN(500000, RTC_FAST_CLK_FREQ_APPROX, rtc_fast_freq_hz); + TEST_ASSERT_INT32_WITHIN(650000, RTC_FAST_CLK_FREQ_APPROX, rtc_fast_freq_hz); } TEST_CASE("Test switching between PLL and XTAL", "[rtc_clk]")