kopia lustrzana https://github.com/espressif/esp-idf
spi: add explaination to the modes
rodzic
4edaf134bb
commit
586dd7d7cd
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@ -63,7 +63,12 @@ typedef struct {
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uint8_t command_bits; ///< Default amount of bits in command phase (0-16), used when ``SPI_TRANS_VARIABLE_CMD`` is not used, otherwise ignored.
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uint8_t address_bits; ///< Default amount of bits in address phase (0-64), used when ``SPI_TRANS_VARIABLE_ADDR`` is not used, otherwise ignored.
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uint8_t dummy_bits; ///< Amount of dummy bits to insert between address and data phase
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uint8_t mode; ///< SPI mode (0-3)
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uint8_t mode; /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
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- 0: (0, 0)
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- 1: (0, 1)
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- 2: (1, 0)
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- 3: (1, 1)
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*/
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uint16_t duty_cycle_pos; ///< Duty cycle of positive clock, in 1/256th increments (128 = 50%/50% duty). Setting this to 0 (=not setting it) is equivalent to setting this to 128.
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uint16_t cs_ena_pretrans; ///< Amount of SPI bit-cycles the cs should be activated before the transmission (0-16). This only works on half-duplex transactions.
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uint8_t cs_ena_posttrans; ///< Amount of SPI bit-cycles the cs should stay active after the transmission (0-16)
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@ -43,7 +43,12 @@ typedef struct {
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int spics_io_num; ///< CS GPIO pin for this device
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uint32_t flags; ///< Bitwise OR of SPI_SLAVE_* flags
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int queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_slave_queue_trans but not yet finished using spi_slave_get_trans_result) at the same time
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uint8_t mode; ///< SPI mode (0-3)
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uint8_t mode; /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
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- 0: (0, 0)
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- 1: (0, 1)
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- 2: (1, 0)
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- 3: (1, 1)
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*/
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slave_transaction_cb_t post_setup_cb; /**< Callback called after the SPI registers are loaded with new data.
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*
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* This callback is called within interrupt
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@ -74,7 +74,12 @@ typedef struct {
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/// Configuration structure for the SPI Slave HD driver
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typedef struct {
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uint8_t mode; ///< SPI mode (0-3)
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uint8_t mode; /**< SPI mode, representing a pair of (CPOL, CPHA) configuration:
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- 0: (0, 0)
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- 1: (0, 1)
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- 2: (1, 0)
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- 3: (1, 1)
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*/
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uint32_t spics_io_num; ///< CS GPIO pin for this device
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uint32_t flags; ///< Bitwise OR of SPI_SLAVE_HD_* flags
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uint32_t command_bits; ///< command field bits, multiples of 8 and at least 8.
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