kopia lustrzana https://github.com/espressif/esp-idf
esp_phy: enable for esp32c6
rodzic
b887f86a78
commit
5822cdf93b
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@ -1,7 +1,6 @@
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idf_build_get_property(idf_target IDF_TARGET)
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if(IDF_TARGET STREQUAL "esp32c6" OR IDF_TARGET STREQUAL "esp32h2")
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# TODO : IDF-5680
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if(IDF_TARGET STREQUAL "esp32h2")
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# TODO : IDF-6337
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return()
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endif()
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@ -68,15 +67,10 @@ if(link_binary_libs)
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target_link_libraries(${COMPONENT_LIB} PUBLIC rtc)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a librtc.a
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$<TARGET_FILE:${esp_phy_lib}>)
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endif()
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if(CONFIG_IDF_TARGET_ESP32S2)
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elseif(CONFIG_IDF_TARGET_ESP32S2)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a
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$<TARGET_FILE:${esp_phy_lib}>)
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endif()
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if(CONFIG_IDF_TARGET_ESP32C3 OR CONFIG_IDF_TARGET_ESP32S3
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OR CONFIG_IDF_TARGET_ESP32H4 OR CONFIG_IDF_TARGET_ESP32C2)
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elseif(CONFIG_SOC_BT_SUPPORTED OR CONFIG_SOC_IEEE802154_SUPPORTED)
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target_link_libraries(${COMPONENT_LIB} PUBLIC btbb)
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target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a
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$<TARGET_FILE:${esp_phy_lib}>)
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@ -0,0 +1,184 @@
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/*
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* SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef PHY_INIT_DATA_H
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#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
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#include "esp_phy_init.h"
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#include "sdkconfig.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// constrain a value between 'low' and 'high', inclusive
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#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val)
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#define PHY_INIT_MAGIC "PHYINIT"
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// define the lowest tx power as LOWEST_PHY_TX_POWER
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#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
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#define PHY_TX_POWER_OFFSET 2
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#define PHY_TX_POWER_NUM 14
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#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
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#define PHY_CRC_ALGORITHM 1
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#define PHY_COUNTRY_CODE_LEN 2
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#define PHY_INIT_DATA_TYPE_OFFSET 126
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#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
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#endif
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static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
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/**
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* @brief Structure containing default recommended PHY initialization parameters.
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*/
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static const esp_phy_init_data_t phy_init_data= { {
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0x01,
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0x00,
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
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0x00,
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0x00,
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0x00,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0xff,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0,
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0x9B
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} };
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static const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
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#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
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/**
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* @brief PHY init data control infomation structure
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*/
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typedef struct {
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uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
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uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
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uint8_t check_algorithm; /*!< check algorithm */
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uint8_t version; /*!< PHY init data bin version */
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uint8_t number; /*!< PHY init data bin number */
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uint8_t length[2]; /*!< Length of each PHY init data bin */
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uint8_t reserved[19]; /*!< 19-byte reserved */
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} __attribute__ ((packed)) phy_control_info_data_t;
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/**
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* @brief Country corresponds to PHY init data type structure
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*/
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typedef struct {
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char cc[PHY_COUNTRY_CODE_LEN];
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uint8_t type;
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} phy_country_to_bin_type_t;
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* PHY_INIT_DATA_H */
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Plik binarny nie jest wyświetlany.
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@ -1 +1 @@
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Subproject commit 3daf842446056002dcdb12866001c3d567f1abd9
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Subproject commit 979b0530b1210dd53d4a776053cb953d27d951b9
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@ -31,8 +31,12 @@
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#include "esp_rom_crc.h"
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#include "esp_rom_sys.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/rtc_periph.h"
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#if __has_include("soc/syscon_reg.h")
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#include "soc/syscon_reg.h"
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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#include "soc/dport_reg.h"
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#endif
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@ -46,7 +50,7 @@ static const char* TAG = "phy_init";
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static _lock_t s_phy_access_lock;
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#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
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#if !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 // TODO - WIFI-4424
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static DRAM_ATTR struct {
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int count; /* power on count of wifi and bt power domain */
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_lock_t lock;
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@ -200,12 +204,16 @@ static inline void phy_update_wifi_mac_time(bool en_clock_stopped, int64_t now)
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IRAM_ATTR void esp_phy_common_clock_enable(void)
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{
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#if !CONFIG_IDF_TARGET_ESP32C6 // IDF-5679
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wifi_bt_common_module_enable();
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#endif
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}
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IRAM_ATTR void esp_phy_common_clock_disable(void)
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{
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#if !CONFIG_IDF_TARGET_ESP32C6 // IDF-5679
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wifi_bt_common_module_disable();
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#endif
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}
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static inline void phy_digital_regs_store(void)
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@ -280,7 +288,7 @@ void esp_phy_disable(void)
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void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
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{
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#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
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#if !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 // TODO - WIFI-4424
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_lock_acquire(&s_wifi_bt_pd_controller.lock);
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if (s_wifi_bt_pd_controller.count++ == 0) {
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
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@ -296,7 +304,7 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
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void esp_wifi_bt_power_domain_off(void)
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{
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#if !CONFIG_IDF_TARGET_ESP32C2 // TODO - WIFI-4424
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#if !CONFIG_IDF_TARGET_ESP32C2 && !CONFIG_IDF_TARGET_ESP32C6 // TODO - WIFI-4424
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_lock_acquire(&s_wifi_bt_pd_controller.lock);
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if (--s_wifi_bt_pd_controller.count == 0) {
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SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
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@ -66,7 +66,6 @@ void IRAM_ATTR esp_restart_noos(void)
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// Reset wifi/bluetooth/ethernet/sdio (bb/mac)
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// Moved to module internal
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// SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG,
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// SYSTEM_WIFIBB_RST | SYSTEM_FE_RST | // TODO: IDF-5680 (esp_phy)
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// SYSTEM_WIFIMAC_RST | // TODO: IDF-5679 (esp_wifi)
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// SYSTEM_SDIO_RST | // SDIO_HINF_HINF_SDIO_RST?
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// SYSTEM_EMAC_RST | SYSTEM_MACPWR_RST | // TODO: IDF-5325 (ethernet)
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@ -410,7 +410,6 @@
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/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
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#define SOC_COEX_HW_PTI (1)
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// TODO: IDF-5680 (Copy from esp32c3, need check)
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/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
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#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
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#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
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@ -399,7 +399,7 @@
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/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
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#define SOC_COEX_HW_PTI (1)
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// TODO: IDF-5680 (Copy from esp32c6, need check)
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// TODO: IDF-6337
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/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
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#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
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#define SOC_MAC_BB_PD_MEM_SIZE (192*4)
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@ -150,6 +150,8 @@ ESP32C3_DOCS = ['hw-reference/esp32c3/**',
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ESP32C2_DOCS = ['api-guides/RF_calibration.rst']
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ESP32C6_DOCS = ['api-guides/RF_calibration.rst']
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# format: {tag needed to include: documents to included}, tags are parsed from sdkconfig and peripheral_caps.h headers
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conditional_include_dict = {'SOC_BT_SUPPORTED':BT_DOCS,
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'SOC_BLE_MESH_SUPPORTED':BLE_MESH_DOCS,
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@ -187,7 +189,8 @@ conditional_include_dict = {'SOC_BT_SUPPORTED':BT_DOCS,
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'esp32s2':ESP32S2_DOCS,
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'esp32s3':ESP32S3_DOCS,
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'esp32c2':ESP32C2_DOCS,
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'esp32c3':ESP32C3_DOCS}
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'esp32c3':ESP32C3_DOCS,
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'esp32c6':ESP32C6_DOCS}
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extensions += ['sphinx_copybutton',
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'sphinxcontrib.wavedrom',
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@ -32,7 +32,6 @@ api-guides/tools/idf-docker-image
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api-guides/tools/index
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api-guides/startup
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api-guides/hlinterrupts
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api-guides/RF_calibration
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api-guides/unit-tests
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api-guides/deep-sleep-stub
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api-guides/blufi
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@ -34,7 +34,7 @@ API Guides
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partition-tables
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performance/index
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reproducible-builds
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:not esp32c6: RF_calibration
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RF_calibration
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../security/security
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:esp32: ../security/secure-boot-v1
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../security/secure-boot-v2
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@ -89,7 +89,7 @@ The ESP-IDF bootloader ignores any partition types other than ``app`` (0x00) and
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SubType
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~~~~~~~
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{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`", esp32c6 = "(not updated yet)"}
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{IDF_TARGET_ESP_PHY_REF:default = ":ref:`CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION`"}
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The 8-bit SubType field is specific to a given partition type. ESP-IDF currently only specifies the meaning of the subtype field for ``app`` and ``data`` partition types.
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@ -30,7 +30,7 @@ API 指南
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openthread
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partition-tables
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performance/index
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:not esp32c6: RF_calibration
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RF_calibration
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../security/security
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:esp32: ../security/secure-boot-v1
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../security/secure-boot-v2
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|
|
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@ -36,6 +36,7 @@ components/esp_phy/esp32s2/include/phy_init_data.h
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components/esp_phy/esp32s3/include/phy_init_data.h
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components/esp_phy/esp32c3/include/phy_init_data.h
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components/esp_phy/esp32c2/include/phy_init_data.h
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components/esp_phy/esp32c6/include/phy_init_data.h
|
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components/spi_flash/include/spi_flash_chip_issi.h
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components/spi_flash/include/spi_flash_chip_mxic.h
|
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|
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