kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'refactor/flash_qio_overidable' into 'master'
spi_flash: refactor flash qio to make it overridable Closes IDF-3089 See merge request espressif/esp-idf!15371pull/7903/head
Simon
commit
4f7e51231f
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@ -9,6 +9,7 @@
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#include <esp_spi_flash.h> /* including in bootloader for error values */
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#include "sdkconfig.h"
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#include "soc/soc_caps.h"
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#include "bootloader_flash_override.h"
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#ifdef __cplusplus
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extern "C" {
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@ -32,14 +33,6 @@ uint32_t bootloader_read_flash_id(void);
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esp_err_t bootloader_flash_wrap_set(spi_flash_wrap_mode_t mode);
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#endif
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/**
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* @brief Unlock Flash write protect.
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* Please do not call this function in SDK.
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*
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* @note This can be overridden because it's attribute weak.
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*/
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esp_err_t bootloader_flash_unlock(void);
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/**
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* @brief Startup flow recommended by XMC. Call at startup before any erase/write operation.
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*
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@ -47,6 +40,15 @@ esp_err_t bootloader_flash_unlock(void);
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*/
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esp_err_t bootloader_flash_xmc_startup(void);
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/**
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* @brief Unlock Flash write protect.
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* Please do not call this function in SDK.
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*
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* @note This can be overridden because it's attribute weak.
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*/
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esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
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#ifdef __cplusplus
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}
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#endif
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@ -0,0 +1,101 @@
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/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_err.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef unsigned (*bootloader_flash_read_status_fn_t)(void);
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typedef void (*bootloader_flash_write_status_fn_t)(unsigned);
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typedef struct __attribute__((packed))
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{
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const char *manufacturer;
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uint8_t mfg_id; /* 8-bit JEDEC manufacturer ID */
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uint16_t flash_id; /* 16-bit JEDEC flash chip ID */
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uint16_t id_mask; /* Bits to match on in flash chip ID */
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bootloader_flash_read_status_fn_t read_status_fn;
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bootloader_flash_write_status_fn_t write_status_fn;
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uint8_t status_qio_bit;
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} bootloader_qio_info_t;
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/**
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* @brief Read 8 bit status using RDSR command
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*
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* @return Value of SR1.
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*/
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unsigned bootloader_read_status_8b_rdsr(void);
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/**
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* @brief Read 8 bit status (second byte) using RDSR2 command
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*
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* @return Value of SR2
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*/
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unsigned bootloader_read_status_8b_rdsr2(void);
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/**
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* @brief Read 16 bit status using RDSR & RDSR2 (low and high bytes)
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*
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* @return Value of SR2#SR1.
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*/
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unsigned bootloader_read_status_16b_rdsr_rdsr2(void);
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/**
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* @brief Write 8 bit status using WRSR
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*/
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void bootloader_write_status_8b_wrsr(unsigned new_status);
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/**
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* @brief Write 8 bit status (second byte) using WRSR2.
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*/
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void bootloader_write_status_8b_wrsr2(unsigned new_status);
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/**
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* @brief Write 16 bit status using WRSR, (both write SR1 and SR2)
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*/
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void bootloader_write_status_16b_wrsr(unsigned new_status);
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/**
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* @brief Read 8 bit status of XM25QU64A.
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*
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* @return Value of 8 bit SR.
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*/
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unsigned bootloader_read_status_8b_xmc25qu64a(void);
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/**
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* @brief Write 8 bit status for XM25QU64A
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*/
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void bootloader_write_status_8b_xmc25qu64a(unsigned new_status);
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/* Array of known flash chips and data to enable Quad I/O mode
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Manufacturer & flash ID can be tested by running "esptool.py
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flash_id"
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If manufacturer ID matches, and flash ID ORed with flash ID mask
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matches, enable_qio_mode() will execute "Read Cmd", test if bit
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number "QIE Bit" is set, and if not set it will call "Write Cmd"
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with this bit set.
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Searching of this table stops when the first match is found.
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*/
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extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_support_list[];
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/**
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* @brief Unlock Flash write protect.
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* Please do not call this function in SDK.
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*
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* @note This can be overridden because it's attribute weak.
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*/
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esp_err_t IRAM_ATTR __attribute__((weak)) bootloader_flash_unlock(void);
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#ifdef __cplusplus
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}
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#endif
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@ -32,39 +32,6 @@
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static const char *TAG = "qio_mode";
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typedef unsigned (*read_status_fn_t)(void);
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typedef void (*write_status_fn_t)(unsigned);
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typedef struct __attribute__((packed))
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{
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const char *manufacturer;
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uint8_t mfg_id; /* 8-bit JEDEC manufacturer ID */
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uint16_t flash_id; /* 16-bit JEDEC flash chip ID */
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uint16_t id_mask; /* Bits to match on in flash chip ID */
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read_status_fn_t read_status_fn;
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write_status_fn_t write_status_fn;
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uint8_t status_qio_bit;
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} qio_info_t;
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/* Read 8 bit status using RDSR command */
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static unsigned read_status_8b_rdsr(void);
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/* Read 8 bit status (second byte) using RDSR2 command */
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static unsigned read_status_8b_rdsr2(void);
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/* read 16 bit status using RDSR & RDSR2 (low and high bytes) */
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static unsigned read_status_16b_rdsr_rdsr2(void);
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/* Write 8 bit status using WRSR */
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static void write_status_8b_wrsr(unsigned new_status);
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/* Write 8 bit status (second byte) using WRSR2 */
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static void write_status_8b_wrsr2(unsigned new_status);
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/* Write 16 bit status using WRSR */
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static void write_status_16b_wrsr(unsigned new_status);
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/* Read 8 bit status of XM25QU64A */
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static unsigned read_status_8b_xmc25qu64a(void);
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/* Write 8 bit status of XM25QU64A */
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static void write_status_8b_xmc25qu64a(unsigned new_status);
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/* Array of known flash chips and data to enable Quad I/O mode
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Manufacturer & flash ID can be tested by running "esptool.py
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@ -77,13 +44,13 @@ static void write_status_8b_xmc25qu64a(unsigned new_status);
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Searching of this table stops when the first match is found.
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*/
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const static qio_info_t chip_data[] = {
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const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_support_list[] = {
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/* Manufacturer, mfg_id, flash_id, id mask, Read Status, Write Status, QIE Bit */
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{ "MXIC", 0xC2, 0x2000, 0xFF00, read_status_8b_rdsr, write_status_8b_wrsr, 6 },
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{ "ISSI", 0x9D, 0x4000, 0xCF00, read_status_8b_rdsr, write_status_8b_wrsr, 6 }, /* IDs 0x40xx, 0x70xx */
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{ "WinBond", 0xEF, 0x4000, 0xFF00, read_status_16b_rdsr_rdsr2, write_status_16b_wrsr, 9 },
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{ "GD", 0xC8, 0x6000, 0xFF00, read_status_16b_rdsr_rdsr2, write_status_16b_wrsr, 9 },
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{ "XM25QU64A", 0x20, 0x3817, 0xFFFF, read_status_8b_xmc25qu64a, write_status_8b_xmc25qu64a, 6 },
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{ "MXIC", 0xC2, 0x2000, 0xFF00, bootloader_read_status_8b_rdsr, bootloader_write_status_8b_wrsr, 6 },
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{ "ISSI", 0x9D, 0x4000, 0xCF00, bootloader_read_status_8b_rdsr, bootloader_write_status_8b_wrsr, 6 }, /* IDs 0x40xx, 0x70xx */
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{ "WinBond", 0xEF, 0x4000, 0xFF00, bootloader_read_status_16b_rdsr_rdsr2, bootloader_write_status_16b_wrsr, 9 },
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{ "GD", 0xC8, 0x6000, 0xFF00, bootloader_read_status_16b_rdsr_rdsr2, bootloader_write_status_16b_wrsr, 9 },
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{ "XM25QU64A", 0x20, 0x3817, 0xFFFF, bootloader_read_status_8b_xmc25qu64a, bootloader_write_status_8b_xmc25qu64a, 6 },
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/* Final entry is default entry, if no other IDs have matched.
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@ -92,13 +59,13 @@ const static qio_info_t chip_data[] = {
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FM25Q32 (QOUT mode only, mfg ID 0xA1, flash IDs including 4016)
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BY25Q32 (mfg ID 0x68, flash IDs including 4016)
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*/
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{ NULL, 0xFF, 0xFFFF, 0xFFFF, read_status_8b_rdsr2, write_status_8b_wrsr2, 1 },
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{ NULL, 0xFF, 0xFFFF, 0xFFFF, bootloader_read_status_8b_rdsr2, bootloader_write_status_8b_wrsr2, 1 },
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};
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#define NUM_CHIPS (sizeof(chip_data) / sizeof(qio_info_t))
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#define NUM_CHIPS (sizeof(bootloader_flash_qe_support_list) / sizeof(bootloader_qio_info_t))
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static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
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write_status_fn_t write_status_fn,
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static esp_err_t enable_qio_mode(bootloader_flash_read_status_fn_t read_status_fn,
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bootloader_flash_write_status_fn_t write_status_fn,
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uint8_t status_qio_bit);
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/* Generic function to use the "user command" SPI controller functionality
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@ -125,9 +92,9 @@ void bootloader_enable_qio_mode(void)
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ESP_LOGD(TAG, "Manufacturer ID 0x%02x chip ID 0x%04x", mfg_id, flash_id);
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for (i = 0; i < NUM_CHIPS - 1; i++) {
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const qio_info_t *chip = &chip_data[i];
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const bootloader_qio_info_t *chip = &bootloader_flash_qe_support_list[i];
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if (mfg_id == chip->mfg_id && (flash_id & chip->id_mask) == (chip->flash_id & chip->id_mask)) {
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ESP_LOGI(TAG, "Enabling QIO for flash chip %s", chip_data[i].manufacturer);
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ESP_LOGI(TAG, "Enabling QIO for flash chip %s", bootloader_flash_qe_support_list[i].manufacturer);
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break;
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}
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}
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@ -135,16 +102,16 @@ void bootloader_enable_qio_mode(void)
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if (i == NUM_CHIPS - 1) {
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ESP_LOGI(TAG, "Enabling default flash chip QIO");
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}
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enable_qio_mode(chip_data[i].read_status_fn,
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chip_data[i].write_status_fn,
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chip_data[i].status_qio_bit);
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enable_qio_mode(bootloader_flash_qe_support_list[i].read_status_fn,
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bootloader_flash_qe_support_list[i].write_status_fn,
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bootloader_flash_qe_support_list[i].status_qio_bit);
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#if SOC_CACHE_SUPPORT_WRAP
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bootloader_flash_wrap_set(FLASH_WRAP_MODE_DISABLE);
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#endif
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}
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static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
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write_status_fn_t write_status_fn,
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static esp_err_t enable_qio_mode(bootloader_flash_read_status_fn_t read_status_fn,
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bootloader_flash_write_status_fn_t write_status_fn,
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uint8_t status_qio_bit)
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{
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uint32_t status;
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@ -199,37 +166,37 @@ static esp_err_t enable_qio_mode(read_status_fn_t read_status_fn,
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return ESP_OK;
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}
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static unsigned read_status_8b_rdsr(void)
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unsigned bootloader_read_status_8b_rdsr(void)
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{
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return bootloader_execute_flash_command(CMD_RDSR, 0, 0, 8);
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}
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static unsigned read_status_8b_rdsr2(void)
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unsigned bootloader_read_status_8b_rdsr2(void)
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{
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return bootloader_execute_flash_command(CMD_RDSR2, 0, 0, 8);
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}
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static unsigned read_status_16b_rdsr_rdsr2(void)
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unsigned bootloader_read_status_16b_rdsr_rdsr2(void)
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{
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return bootloader_execute_flash_command(CMD_RDSR, 0, 0, 8) | (bootloader_execute_flash_command(CMD_RDSR2, 0, 0, 8) << 8);
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}
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static void write_status_8b_wrsr(unsigned new_status)
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void bootloader_write_status_8b_wrsr(unsigned new_status)
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{
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bootloader_execute_flash_command(CMD_WRSR, new_status, 8, 0);
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}
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static void write_status_8b_wrsr2(unsigned new_status)
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void bootloader_write_status_8b_wrsr2(unsigned new_status)
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{
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bootloader_execute_flash_command(CMD_WRSR2, new_status, 8, 0);
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}
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static void write_status_16b_wrsr(unsigned new_status)
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void bootloader_write_status_16b_wrsr(unsigned new_status)
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{
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bootloader_execute_flash_command(CMD_WRSR, new_status, 16, 0);
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}
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static unsigned read_status_8b_xmc25qu64a(void)
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unsigned bootloader_read_status_8b_xmc25qu64a(void)
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{
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bootloader_execute_flash_command(CMD_OTPEN, 0, 0, 0); /* Enter OTP mode */
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esp_rom_spiflash_wait_idle(&g_rom_flashchip);
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@ -238,7 +205,7 @@ static unsigned read_status_8b_xmc25qu64a(void)
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return read_status;
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}
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static void write_status_8b_xmc25qu64a(unsigned new_status)
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void bootloader_write_status_8b_xmc25qu64a(unsigned new_status)
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{
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bootloader_execute_flash_command(CMD_OTPEN, 0, 0, 0); /* Enter OTP mode */
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esp_rom_spiflash_wait_idle(&g_rom_flashchip);
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