diff --git a/components/hal/include/hal/sha_hal.h b/components/hal/include/hal/sha_hal.h index ff3e7e233f..6a3cf1be4c 100644 --- a/components/hal/include/hal/sha_hal.h +++ b/components/hal/include/hal/sha_hal.h @@ -22,7 +22,7 @@ #include #include -#include "soc/sha_caps.h" +#include "soc/soc_caps.h" #include "soc/lldesc.h" #include "hal/sha_types.h" diff --git a/components/mbedtls/port/esp_bignum.c b/components/mbedtls/port/esp_bignum.c index b9a7b3d97f..d16b2d5859 100644 --- a/components/mbedtls/port/esp_bignum.c +++ b/components/mbedtls/port/esp_bignum.c @@ -32,7 +32,7 @@ #include "esp_log.h" #include "esp_attr.h" #include "bignum_impl.h" -#include "soc/rsa_caps.h" +#include "soc/soc_caps.h" #include diff --git a/components/mbedtls/port/include/sha1_alt.h b/components/mbedtls/port/include/sha1_alt.h index aad0437caa..f97c0e49b8 100644 --- a/components/mbedtls/port/include/sha1_alt.h +++ b/components/mbedtls/port/include/sha1_alt.h @@ -26,7 +26,7 @@ #if defined(MBEDTLS_SHA1_ALT) #include "hal/sha_types.h" -#include "soc/sha_caps.h" +#include "soc/soc_caps.h" #ifdef __cplusplus extern "C" { diff --git a/components/mbedtls/port/include/sha256_alt.h b/components/mbedtls/port/include/sha256_alt.h index 3a1f385e9a..5d3b6135c5 100644 --- a/components/mbedtls/port/include/sha256_alt.h +++ b/components/mbedtls/port/include/sha256_alt.h @@ -26,7 +26,7 @@ #if defined(MBEDTLS_SHA256_ALT) #include "hal/sha_types.h" -#include "soc/sha_caps.h" +#include "soc/soc_caps.h" #ifdef __cplusplus extern "C" { diff --git a/components/mbedtls/port/include/sha512_alt.h b/components/mbedtls/port/include/sha512_alt.h index 4f5cc005e6..9472abceff 100644 --- a/components/mbedtls/port/include/sha512_alt.h +++ b/components/mbedtls/port/include/sha512_alt.h @@ -26,7 +26,7 @@ #if defined(MBEDTLS_SHA512_ALT) #include "hal/sha_types.h" -#include "soc/sha_caps.h" +#include "soc/soc_caps.h" #ifdef __cplusplus extern "C" { diff --git a/components/mbedtls/port/sha/dma/sha.c b/components/mbedtls/port/sha/dma/sha.c index 757457f7e8..8e21aa5b38 100644 --- a/components/mbedtls/port/sha/dma/sha.c +++ b/components/mbedtls/port/sha/dma/sha.c @@ -44,7 +44,7 @@ #include "sha/sha_dma.h" #include "hal/sha_hal.h" -#include "soc/sha_caps.h" +#include "soc/soc_caps.h" #if CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rom/cache.h" diff --git a/components/mbedtls/port/sha/esp_sha.c b/components/mbedtls/port/sha/esp_sha.c index c61be3730c..317292b0f3 100644 --- a/components/mbedtls/port/sha/esp_sha.c +++ b/components/mbedtls/port/sha/esp_sha.c @@ -16,7 +16,7 @@ #include #include #include "hal/sha_types.h" -#include "soc/sha_caps.h" +#include "soc/soc_caps.h" #include "esp_log.h" #include diff --git a/components/soc/esp32/include/soc/rsa_caps.h b/components/soc/esp32/include/soc/rsa_caps.h deleted file mode 100644 index 475dc4fe8b..0000000000 --- a/components/soc/esp32/include/soc/rsa_caps.h +++ /dev/null @@ -1,26 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - - -#define SOC_RSA_MAX_BIT_LEN (4096) - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32/include/soc/sha_caps.h b/components/soc/esp32/include/soc/sha_caps.h deleted file mode 100644 index b409013f30..0000000000 --- a/components/soc/esp32/include/soc/sha_caps.h +++ /dev/null @@ -1,34 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#define SOC_SHA_SUPPORT_DMA (0) - -/* ESP32 style SHA engine, where multiple states can be stored in parallel */ -#define SOC_SHA_SUPPORT_PARALLEL_ENG (1) - -/* Supported HW algorithms */ -#define SOC_SHA_SUPPORT_SHA1 (1) -#define SOC_SHA_SUPPORT_SHA256 (1) -#define SOC_SHA_SUPPORT_SHA384 (1) -#define SOC_SHA_SUPPORT_SHA512 (1) - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index b882876526..e8508f7e2b 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -231,6 +231,22 @@ #define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */ #define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */ + +/*--------------------------- SHA CAPS ---------------------------------------*/ +/* ESP32 style SHA engine, where multiple states can be stored in parallel */ +#define SOC_SHA_SUPPORT_PARALLEL_ENG (1) + +/* Supported HW algorithms */ +#define SOC_SHA_SUPPORT_SHA1 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA384 (1) +#define SOC_SHA_SUPPORT_SHA512 (1) + + +/*--------------------------- RSA CAPS ---------------------------------------*/ +#define SOC_RSA_MAX_BIT_LEN (4096) + + /* ---------------------------- Compatibility ------------------------------- */ #define SOC_CAN_SUPPORTED SOC_TWAI_SUPPORTED #define CAN_BRP_MIN SOC_TWAI_BRP_MIN diff --git a/components/soc/esp32s2/include/soc/rsa_caps.h b/components/soc/esp32s2/include/soc/rsa_caps.h deleted file mode 100644 index 475dc4fe8b..0000000000 --- a/components/soc/esp32s2/include/soc/rsa_caps.h +++ /dev/null @@ -1,26 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - - -#define SOC_RSA_MAX_BIT_LEN (4096) - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32s2/include/soc/sha_caps.h b/components/soc/esp32s2/include/soc/sha_caps.h deleted file mode 100644 index 10118590ed..0000000000 --- a/components/soc/esp32s2/include/soc/sha_caps.h +++ /dev/null @@ -1,54 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -/* Max amount of bytes in a single DMA operation is 4095, - for SHA this means that the biggest safe amount of bytes is - 31 blocks of 128 bytes = 3968 -*/ -#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968) -#define SOC_SHA_SUPPORT_DMA (1) - -/* ESP32 style SHA engine, where multiple states can be stored in parallel */ -#define SOC_SHA_SUPPORT_PARALLEL_ENG (0) - -/* The SHA engine is able to resume hashing from a user */ -#define SOC_SHA_SUPPORT_RESUME (1) - -/* Has "crypto DMA", which is shared with AES */ -#define SOC_SHA_CRYPTO_DMA (1) - -/* Has a centralized DMA, which is shared with all peripherals */ -#define SOC_SHA_GENERAL_DMA (0) - -/* Supported HW algorithms */ -#define SOC_SHA_SUPPORT_SHA1 (1) -#define SOC_SHA_SUPPORT_SHA224 (1) -#define SOC_SHA_SUPPORT_SHA256 (1) -#define SOC_SHA_SUPPORT_SHA384 (1) -#define SOC_SHA_SUPPORT_SHA256 (1) -#define SOC_SHA_SUPPORT_SHA512 (1) -#define SOC_SHA_SUPPORT_SHA512_224 (1) -#define SOC_SHA_SUPPORT_SHA512_256 (1) -#define SOC_SHA_SUPPORT_SHA512_T (1) - - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index f8a9b5205b..e730f3cac8 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -222,5 +222,43 @@ /*-------------------------- USB CAPS ----------------------------------------*/ #define SOC_USB_PERIPH_NUM 1 + +/*--------------------------- SHA CAPS ---------------------------------------*/ +/* Max amount of bytes in a single DMA operation is 4095, + for SHA this means that the biggest safe amount of bytes is + 31 blocks of 128 bytes = 3968 +*/ +#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968) +#define SOC_SHA_SUPPORT_DMA (1) + +/* The SHA engine is able to resume hashing from a user supplied context */ +#define SOC_SHA_SUPPORT_RESUME (1) + +/* Has "crypto DMA", which is shared with AES */ +#define SOC_SHA_CRYPTO_DMA (1) + +/* Supported HW algorithms */ +#define SOC_SHA_SUPPORT_SHA1 (1) +#define SOC_SHA_SUPPORT_SHA224 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA384 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA512 (1) +#define SOC_SHA_SUPPORT_SHA512_224 (1) +#define SOC_SHA_SUPPORT_SHA512_256 (1) +#define SOC_SHA_SUPPORT_SHA512_T (1) + +/* Supported HW algorithms */ +#define SOC_SHA_SUPPORT_SHA1 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA384 (1) +#define SOC_SHA_SUPPORT_SHA512 (1) + + +/*--------------------------- RSA CAPS ---------------------------------------*/ +#define SOC_RSA_MAX_BIT_LEN (4096) + + + /* ---------------------------- Compatibility ------------------------------- */ // No contents diff --git a/components/soc/esp32s3/include/soc/rsa_caps.h b/components/soc/esp32s3/include/soc/rsa_caps.h deleted file mode 100644 index 475dc4fe8b..0000000000 --- a/components/soc/esp32s3/include/soc/rsa_caps.h +++ /dev/null @@ -1,26 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - - -#define SOC_RSA_MAX_BIT_LEN (4096) - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32s3/include/soc/sha_caps.h b/components/soc/esp32s3/include/soc/sha_caps.h deleted file mode 100644 index 63ea748512..0000000000 --- a/components/soc/esp32s3/include/soc/sha_caps.h +++ /dev/null @@ -1,54 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -/* Max amount of bytes in a single DMA operation is 4095, - for SHA this means that the biggest safe amount of bytes is - 31 blocks of 128 bytes = 3968 -*/ -#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968) -#define SOC_SHA_SUPPORT_DMA (1) - -/* ESP32 style SHA engine, where multiple states can be stored in parallel */ -#define SOC_SHA_SUPPORT_PARALLEL_ENG (0) - -/* The SHA engine is able to resume hashing from a user */ -#define SOC_SHA_SUPPORT_RESUME (1) - -/* Has "crypto DMA", which is shared with AES */ -#define SOC_SHA_CRYPTO_DMA (0) - -/* Has a centralized DMA, which is shared with all peripherals */ -#define SOC_SHA_GENERAL_DMA (1) - -/* Supported HW algorithms */ -#define SOC_SHA_SUPPORT_SHA1 (1) -#define SOC_SHA_SUPPORT_SHA224 (1) -#define SOC_SHA_SUPPORT_SHA256 (1) -#define SOC_SHA_SUPPORT_SHA384 (1) -#define SOC_SHA_SUPPORT_SHA256 (1) -#define SOC_SHA_SUPPORT_SHA512 (1) -#define SOC_SHA_SUPPORT_SHA512_224 (1) -#define SOC_SHA_SUPPORT_SHA512_256 (1) -#define SOC_SHA_SUPPORT_SHA512_T (1) - - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index 509c03b9ec..4e455694ed 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -93,6 +93,43 @@ /*-------------------------- UART CAPS ---------------------------------------*/ #include "uart_caps.h" + +/*--------------------------- SHA CAPS ---------------------------------------*/ +/* Max amount of bytes in a single DMA operation is 4095, + for SHA this means that the biggest safe amount of bytes is + 31 blocks of 128 bytes = 3968 +*/ +#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968) +#define SOC_SHA_SUPPORT_DMA (1) + +/* The SHA engine is able to resume hashing from a user supplied context */ +#define SOC_SHA_SUPPORT_RESUME (1) + +/* Has a centralized DMA, which is shared with all peripherals */ +#define SOC_SHA_GENERAL_DMA (1) + +/* Supported HW algorithms */ +#define SOC_SHA_SUPPORT_SHA1 (1) +#define SOC_SHA_SUPPORT_SHA224 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA384 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA512 (1) +#define SOC_SHA_SUPPORT_SHA512_224 (1) +#define SOC_SHA_SUPPORT_SHA512_256 (1) +#define SOC_SHA_SUPPORT_SHA512_T (1) + +/* Supported HW algorithms */ +#define SOC_SHA_SUPPORT_SHA1 (1) +#define SOC_SHA_SUPPORT_SHA256 (1) +#define SOC_SHA_SUPPORT_SHA384 (1) +#define SOC_SHA_SUPPORT_SHA512 (1) + + +/*--------------------------- RSA CAPS ---------------------------------------*/ +#define SOC_RSA_MAX_BIT_LEN (4096) + + // Attention: These fixed DMA channels are temporarily workaround before we have a centralized DMA controller API to help alloc the channel dynamically // Remove them when GDMA driver API is ready #define SOC_GDMA_M2M_DMA_CHANNEL (0)