From 3f034a50055b3a4daffd915e7f10affaa5307255 Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Tue, 16 Jun 2020 14:51:31 +1000 Subject: [PATCH] spiram: Add soc macro for SPIRAM address space size, use it where applicable Reference https://github.com/espressif/esp-idf/pull/5373 --- components/esp32/spiram.c | 8 ++++---- components/soc/soc/esp32/include/soc/soc.h | 2 ++ components/soc/soc/esp32s2/include/soc/soc.h | 2 ++ components/soc/soc/esp32s3/include/soc/soc.h | 2 ++ components/soc/src/esp32/soc_memory_layout.c | 8 ++++---- components/soc/src/esp32s2/soc_memory_layout.c | 6 ++++-- 6 files changed, 18 insertions(+), 10 deletions(-) diff --git a/components/esp32/spiram.c b/components/esp32/spiram.c index 20f9921ad2..e43acad59d 100644 --- a/components/esp32/spiram.c +++ b/components/esp32/spiram.c @@ -74,11 +74,11 @@ size_t __attribute__((weak)) esp_himem_reserved_area_size(void) { } -static int spiram_size_usable_for_malloc(void) +static size_t spiram_size_usable_for_malloc(void) { - int s=esp_spiram_get_size(); - if (s>4*1024*1024) s=4*1024*1024; //we can map at most 4MiB - return s-esp_himem_reserved_area_size(); + /* SPIRAM chip may be larger than the size we can map into address space */ + size_t s = MIN(esp_spiram_get_size(), SOC_EXTRAM_DATA_SIZE); + return s - esp_himem_reserved_area_size(); } diff --git a/components/soc/soc/esp32/include/soc/soc.h b/components/soc/soc/esp32/include/soc/soc.h index a6c62f2845..a707c8afd8 100644 --- a/components/soc/soc/esp32/include/soc/soc.h +++ b/components/soc/soc/esp32/include/soc/soc.h @@ -256,6 +256,8 @@ #define SOC_EXTRAM_DATA_LOW 0x3F800000 #define SOC_EXTRAM_DATA_HIGH 0x3FC00000 +#define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) + //First and last words of the D/IRAM region, for both the DRAM address as well as the IRAM alias. #define SOC_DIRAM_IRAM_LOW 0x400A0000 #define SOC_DIRAM_IRAM_HIGH 0x400C0000 diff --git a/components/soc/soc/esp32s2/include/soc/soc.h b/components/soc/soc/esp32s2/include/soc/soc.h index 1db40881ed..a8c4cd7bc2 100644 --- a/components/soc/soc/esp32s2/include/soc/soc.h +++ b/components/soc/soc/esp32s2/include/soc/soc.h @@ -270,6 +270,8 @@ #define SOC_EXTRAM_DATA_LOW 0x3F500000 #define SOC_EXTRAM_DATA_HIGH 0x3FF80000 +#define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) + //First and last words of the D/IRAM region, for both the DRAM address as well as the IRAM alias. #define SOC_DIRAM_IRAM_LOW 0x40020000 #define SOC_DIRAM_IRAM_HIGH 0x40070000 diff --git a/components/soc/soc/esp32s3/include/soc/soc.h b/components/soc/soc/esp32s3/include/soc/soc.h index cf6f0db65e..7be31d5375 100644 --- a/components/soc/soc/esp32s3/include/soc/soc.h +++ b/components/soc/soc/esp32s3/include/soc/soc.h @@ -248,6 +248,8 @@ #define SOC_IROM_MASK_LOW 0x40000000 #define SOC_IROM_MASK_HIGH 0x4001A100 +#define SOC_EXTRAM_DATA_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) + //First and last words of the D/IRAM region, for both the DRAM address as well as the IRAM alias. #define SOC_DIRAM_IRAM_LOW 0x40378000 #define SOC_DIRAM_IRAM_HIGH 0x403E0000 diff --git a/components/soc/src/esp32/soc_memory_layout.c b/components/soc/src/esp32/soc_memory_layout.c index 93855f4532..d6303161bd 100644 --- a/components/soc/src/esp32/soc_memory_layout.c +++ b/components/soc/src/esp32/soc_memory_layout.c @@ -74,8 +74,6 @@ const soc_memory_type_desc_t soc_memory_types[] = { const size_t soc_memory_type_count = sizeof(soc_memory_types)/sizeof(soc_memory_type_desc_t); -#define RESERVE_SPIRAM_SIZE (4*1024*1024) - /* Region descriptors. These describe all regions of memory available, and map them to a type in the above type. @@ -87,7 +85,7 @@ const soc_memory_region_t soc_memory_regions[] = { { SOC_RTC_DRAM_LOW, 0x2000, 16, 0}, //RTC Fast Memory #endif #ifdef CONFIG_SPIRAM - { SOC_EXTRAM_DATA_LOW, RESERVE_SPIRAM_SIZE, 15, 0}, //SPI SRAM, if available + { SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_SIZE, 15, 0}, //SPI SRAM, if available #endif { 0x3FFAE000, 0x2000, 0, 0}, //pool 16 <- used for rom code { 0x3FFB0000, 0x8000, 0, 0}, //pool 15 <- if BT is enabled, used as BT HW shared memory @@ -178,7 +176,9 @@ SOC_RESERVE_MEMORY_REGION(0x3fffc000, 0x40000000, trace_mem); //Reserve trace me #endif #ifdef CONFIG_SPIRAM -SOC_RESERVE_MEMORY_REGION(SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_LOW + RESERVE_SPIRAM_SIZE, spi_ram); //SPI RAM gets added later if needed, in spiram.c; reserve it for now +/* Reserve the whole possible SPIRAM region here, spiram.c will add some or all of this + * memory to heap depending on the actual SPIRAM chip size. */ +SOC_RESERVE_MEMORY_REGION(SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, spi_ram); #endif extern int _data_start, _heap_start, _iram_start, _iram_end, _rtc_force_fast_end, _rtc_noinit_end; diff --git a/components/soc/src/esp32s2/soc_memory_layout.c b/components/soc/src/esp32s2/soc_memory_layout.c index 8bcd0ae239..3b3b1e7565 100644 --- a/components/soc/src/esp32s2/soc_memory_layout.c +++ b/components/soc/src/esp32s2/soc_memory_layout.c @@ -74,7 +74,7 @@ const soc_memory_region_t soc_memory_regions[] = { { SOC_RTC_DRAM_LOW, 0x2000, 5, 0}, //RTC Fast Memory #endif #ifdef CONFIG_SPIRAM - { SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW, 4, 0}, //SPI SRAM, if available + { SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_SIZE, 4, 0}, //SPI SRAM, if available #endif #if CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB #if CONFIG_ESP32S2_DATA_CACHE_0KB @@ -138,7 +138,9 @@ SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start, (intptr_t)&_heap_start, dram_d SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start - I_D_OFFSET, (intptr_t)&_iram_end - I_D_OFFSET, iram_code); #ifdef CONFIG_SPIRAM -SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_data_region); //SPI RAM gets added later if needed, in spiram.c; reserve it for now +/* Reserve the whole possible SPIRAM region here, spiram.c will add some or all of this + * memory to heap depending on the actual SPIRAM chip size. */ +SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_data_region); #endif // Blocks 19 and 20 may be reserved for the trace memory