diff --git a/components/app_update/test/test_switch_ota.c b/components/app_update/test/test_switch_ota.c index afdd6be8e1..7ccdfc78f5 100644 --- a/components/app_update/test/test_switch_ota.c +++ b/components/app_update/test/test_switch_ota.c @@ -12,11 +12,7 @@ #include "string.h" #include "sdkconfig.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#endif +#include "esp_rom_spiflash.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/components/bootloader_support/src/bootloader_common.c b/components/bootloader_support/src/bootloader_common.c index 9cdcc6a975..e4594f2fdf 100644 --- a/components/bootloader_support/src/bootloader_common.c +++ b/components/bootloader_support/src/bootloader_common.c @@ -9,19 +9,7 @@ #include "sdkconfig.h" #include "esp_err.h" #include "esp_log.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP8684 -#include "esp8684/rom/spi_flash.h" -#endif +#include "esp_rom_spiflash.h" #include "esp_rom_crc.h" #include "esp_rom_gpio.h" #include "esp_rom_sys.h" diff --git a/components/bootloader_support/src/bootloader_common_loader.c b/components/bootloader_support/src/bootloader_common_loader.c index ba905370d3..7d064dc4ef 100644 --- a/components/bootloader_support/src/bootloader_common_loader.c +++ b/components/bootloader_support/src/bootloader_common_loader.c @@ -8,12 +8,7 @@ #include "sdkconfig.h" #include "esp_err.h" #include "esp_log.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#include "esp32s2/rom/ets_sys.h" -#endif +#include "esp_rom_spiflash.h" #include "esp_rom_crc.h" #include "esp_rom_gpio.h" #include "esp_flash_partitions.h" diff --git a/components/bootloader_support/src/bootloader_flash.c b/components/bootloader_support/src/bootloader_flash.c index 6c331fc6a7..d038fc525d 100644 --- a/components/bootloader_support/src/bootloader_flash.c +++ b/components/bootloader_support/src/bootloader_flash.c @@ -23,19 +23,7 @@ # define SPIFLASH SPIMEM1 #endif -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP8684 -#include "esp8684/rom/spi_flash.h" -#endif +#include "esp_rom_spiflash.h" #ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH #define ENCRYPTION_IS_VIRTUAL 1 @@ -150,6 +138,7 @@ esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size) #include "esp8684/rom/cache.h" #include "soc/cache_memory.h" #endif +#include "esp_rom_spiflash.h" static const char *TAG = "bootloader_flash"; #if CONFIG_IDF_TARGET_ESP32 diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32.c b/components/bootloader_support/src/bootloader_flash_config_esp32.c index 40e5be2a7a..e7d12178fc 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32.c @@ -21,6 +21,7 @@ #include "flash_qio_mode.h" #include "bootloader_common.h" #include "bootloader_flash_config.h" +#include "esp_rom_spiflash.h" void bootloader_flash_update_id(void) { diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32c3.c b/components/bootloader_support/src/bootloader_flash_config_esp32c3.c index 61ec2de7cc..afea291240 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32c3.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32c3.c @@ -20,6 +20,7 @@ #include "flash_qio_mode.h" #include "bootloader_flash_config.h" #include "bootloader_common.h" +#include "esp_rom_spiflash.h" #define FLASH_IO_MATRIX_DUMMY_40M 0 #define FLASH_IO_MATRIX_DUMMY_80M 0 diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32h2.c b/components/bootloader_support/src/bootloader_flash_config_esp32h2.c index 547e86767f..9fa9364b89 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32h2.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32h2.c @@ -20,6 +20,7 @@ #include "flash_qio_mode.h" #include "bootloader_flash_config.h" #include "bootloader_common.h" +#include "esp_rom_spiflash.h" #define FLASH_IO_MATRIX_DUMMY_40M 0 #define FLASH_IO_MATRIX_DUMMY_80M 0 diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32s2.c b/components/bootloader_support/src/bootloader_flash_config_esp32s2.c index 1959b1b38e..73bccd895f 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32s2.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32s2.c @@ -17,6 +17,7 @@ #include "flash_qio_mode.h" #include "bootloader_flash_config.h" #include "bootloader_common.h" +#include "esp_rom_spiflash.h" #define FLASH_IO_MATRIX_DUMMY_40M 0 #define FLASH_IO_MATRIX_DUMMY_80M 0 diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32s3.c b/components/bootloader_support/src/bootloader_flash_config_esp32s3.c index 357de775a5..b8f37b0f82 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32s3.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32s3.c @@ -17,6 +17,7 @@ #include "flash_qio_mode.h" #include "bootloader_flash_config.h" #include "bootloader_common.h" +#include "esp_rom_spiflash.h" #define FLASH_IO_MATRIX_DUMMY_40M 0 #define FLASH_IO_MATRIX_DUMMY_80M 0 diff --git a/components/bootloader_support/src/bootloader_utility.c b/components/bootloader_support/src/bootloader_utility.c index e6e44179b9..5399756b58 100644 --- a/components/bootloader_support/src/bootloader_utility.c +++ b/components/bootloader_support/src/bootloader_utility.c @@ -17,17 +17,14 @@ #if CONFIG_IDF_TARGET_ESP32 #include "soc/dport_reg.h" #include "esp32/rom/cache.h" -#include "esp32/rom/spi_flash.h" #include "esp32/rom/secure_boot.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rom/cache.h" -#include "esp32s2/rom/spi_flash.h" #include "esp32s2/rom/secure_boot.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rom/cache.h" -#include "esp32s3/rom/spi_flash.h" #include "esp32s3/rom/secure_boot.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" @@ -35,7 +32,6 @@ #include "esp32c3/rom/cache.h" #include "esp32c3/rom/efuse.h" #include "esp32c3/rom/ets_sys.h" -#include "esp32c3/rom/spi_flash.h" #include "esp32c3/rom/crc.h" #include "esp32c3/rom/uart.h" #include "esp32c3/rom/gpio.h" @@ -46,7 +42,6 @@ #include "esp32h2/rom/cache.h" #include "esp32h2/rom/efuse.h" #include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/spi_flash.h" #include "esp32h2/rom/crc.h" #include "esp32h2/rom/uart.h" #include "esp32h2/rom/gpio.h" @@ -68,6 +63,7 @@ #else // CONFIG_IDF_TARGET_* #error "Unsupported IDF_TARGET" #endif +#include "esp_rom_spiflash.h" #include "soc/soc.h" #include "esp_cpu.h" diff --git a/components/bootloader_support/src/esp32/bootloader_esp32.c b/components/bootloader_support/src/esp32/bootloader_esp32.c index c2632074ef..a42f30ebd7 100644 --- a/components/bootloader_support/src/esp32/bootloader_esp32.c +++ b/components/bootloader_support/src/esp32/bootloader_esp32.c @@ -32,7 +32,7 @@ #include "esp_rom_gpio.h" #include "esp_rom_efuse.h" #include "esp_rom_sys.h" -#include "esp32/rom/spi_flash.h" +#include "esp_rom_spiflash.h" #include "esp_efuse.h" static const char *TAG = "boot.esp32"; diff --git a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c index 3e926a6e2d..f21d610769 100644 --- a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c +++ b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c @@ -13,6 +13,7 @@ #include "esp_rom_efuse.h" #include "esp_rom_uart.h" #include "esp_rom_sys.h" +#include "esp_rom_spiflash.h" #include "soc/efuse_reg.h" #include "soc/gpio_sig_map.h" #include "soc/io_mux_reg.h" @@ -24,10 +25,8 @@ #include "soc/io_mux_reg.h" #include "soc/system_reg.h" #include "esp32c3/rom/efuse.h" -#include "esp32c3/rom/spi_flash.h" #include "esp32c3/rom/cache.h" #include "esp32c3/rom/ets_sys.h" -#include "esp32c3/rom/spi_flash.h" #include "bootloader_common.h" #include "bootloader_init.h" #include "bootloader_clock.h" diff --git a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c index eb317c370f..e28214439d 100644 --- a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c +++ b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c @@ -13,6 +13,7 @@ #include "esp_rom_efuse.h" #include "esp_rom_uart.h" #include "esp_rom_sys.h" +#include "esp_rom_spiflash.h" #include "soc/efuse_reg.h" #include "soc/gpio_sig_map.h" #include "soc/io_mux_reg.h" @@ -24,10 +25,8 @@ #include "soc/io_mux_reg.h" #include "soc/system_reg.h" #include "esp32h2/rom/efuse.h" -#include "esp32h2/rom/spi_flash.h" #include "esp32h2/rom/cache.h" #include "esp32h2/rom/ets_sys.h" -#include "esp32h2/rom/spi_flash.h" #include "bootloader_common.h" #include "bootloader_init.h" #include "bootloader_clock.h" diff --git a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c index ea28e055bb..0a7f85efd8 100644 --- a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c +++ b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c @@ -22,8 +22,8 @@ #include "esp_rom_gpio.h" #include "esp_rom_efuse.h" #include "esp_rom_sys.h" +#include "esp_rom_spiflash.h" #include "esp32s2/rom/cache.h" -#include "esp32s2/rom/spi_flash.h" #include "esp_attr.h" #include "esp_log.h" diff --git a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c index 0aff0d5c9d..3ed1614802 100644 --- a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c +++ b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c @@ -23,7 +23,7 @@ #include "esp_rom_gpio.h" #include "esp_rom_efuse.h" #include "esp_rom_sys.h" -#include "esp32s3/rom/spi_flash.h" +#include "esp_rom_spiflash.h" #include "esp32s3/rom/cache.h" #include "esp32s3/rom/rtc.h" diff --git a/components/bootloader_support/src/flash_partitions.c b/components/bootloader_support/src/flash_partitions.c index 3289906e82..d043941c81 100644 --- a/components/bootloader_support/src/flash_partitions.c +++ b/components/bootloader_support/src/flash_partitions.c @@ -7,19 +7,7 @@ #include "esp_flash_partitions.h" #include "esp_log.h" #include "esp_rom_md5.h" -#if CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP8684 -#include "esp8684/rom/spi_flash.h" -#else -#include "esp32/rom/spi_flash.h" -#endif +#include "esp_rom_spiflash.h" static const char *TAG = "flash_parts"; diff --git a/components/bootloader_support/src/flash_qio_mode.c b/components/bootloader_support/src/flash_qio_mode.c index 1d7a4e78f3..42b65f6421 100644 --- a/components/bootloader_support/src/flash_qio_mode.c +++ b/components/bootloader_support/src/flash_qio_mode.c @@ -12,20 +12,8 @@ #include "esp_log.h" #include "esp_err.h" #include "esp_rom_efuse.h" +#include "esp_rom_spiflash.h" #include "flash_qio_mode.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP8684 -#include "esp8684/rom/spi_flash.h" -#endif #include "soc/efuse_periph.h" #include "soc/io_mux_reg.h" diff --git a/components/esp_hw_support/port/esp32/spiram_psram.c b/components/esp_hw_support/port/esp32/spiram_psram.c index 35ca3b90e7..817f7fba3d 100644 --- a/components/esp_hw_support/port/esp32/spiram_psram.c +++ b/components/esp_hw_support/port/esp32/spiram_psram.c @@ -31,6 +31,7 @@ #include "bootloader_common.h" #include "esp_rom_gpio.h" #include "bootloader_flash_config.h" +#include "esp_rom_spiflash.h" #if CONFIG_SPIRAM #include "soc/rtc.h" diff --git a/components/esp_hw_support/port/esp32s2/spiram_psram.c b/components/esp_hw_support/port/esp32s2/spiram_psram.c index 886e08b045..2c0acebc85 100644 --- a/components/esp_hw_support/port/esp32s2/spiram_psram.c +++ b/components/esp_hw_support/port/esp32s2/spiram_psram.c @@ -33,6 +33,7 @@ #include "driver/spi_common.h" #include "esp_private/periph_ctrl.h" #include "bootloader_common.h" +#include "esp_rom_spiflash.h" #if CONFIG_SPIRAM #include "soc/rtc.h" diff --git a/components/esp_hw_support/port/esp32s3/opiram_psram.c b/components/esp_hw_support/port/esp32s3/opiram_psram.c index efcecdbc6b..d29d564a36 100644 --- a/components/esp_hw_support/port/esp32s3/opiram_psram.c +++ b/components/esp_hw_support/port/esp32s3/opiram_psram.c @@ -24,6 +24,7 @@ #include "driver/gpio.h" #include "driver/spi_common.h" #include "esp_private/periph_ctrl.h" +#include "esp_rom_spiflash.h" #if CONFIG_SPIRAM_MODE_OCT #include "soc/rtc.h" diff --git a/components/esp_hw_support/port/esp32s3/spiram_psram.c b/components/esp_hw_support/port/esp32s3/spiram_psram.c index 9ca43271ec..22129d8940 100644 --- a/components/esp_hw_support/port/esp32s3/spiram_psram.c +++ b/components/esp_hw_support/port/esp32s3/spiram_psram.c @@ -35,6 +35,7 @@ #include "driver/spi_common.h" #include "esp_private/periph_ctrl.h" #include "bootloader_common.h" +#include "esp_rom_spiflash.h" #if CONFIG_SPIRAM_MODE_QUAD #include "soc/rtc.h" diff --git a/components/esp_rom/include/esp32/rom/spi_flash.h b/components/esp_rom/include/esp32/rom/spi_flash.h index 500ba300cb..db70b1ba90 100644 --- a/components/esp_rom/include/esp32/rom/spi_flash.h +++ b/components/esp_rom/include/esp32/rom/spi_flash.h @@ -1,16 +1,8 @@ -// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_SPI_FLASH_H_ #define _ROM_SPI_FLASH_H_ @@ -30,14 +22,6 @@ extern "C" { #endif -/** \defgroup spi_flash_apis, spi flash operation related apis - * @brief spi_flash apis - */ - -/** @addtogroup spi_flash_apis - * @{ - */ - /************************************************************* * Note ************************************************************* @@ -131,431 +115,6 @@ extern "C" { #define FLASH_ID_GD25LQ32C 0xC86016 -typedef enum { - ESP_ROM_SPIFLASH_QIO_MODE = 0, - ESP_ROM_SPIFLASH_QOUT_MODE, - ESP_ROM_SPIFLASH_DIO_MODE, - ESP_ROM_SPIFLASH_DOUT_MODE, - ESP_ROM_SPIFLASH_FASTRD_MODE, - ESP_ROM_SPIFLASH_SLOWRD_MODE -} esp_rom_spiflash_read_mode_t; - -typedef enum { - ESP_ROM_SPIFLASH_RESULT_OK, - ESP_ROM_SPIFLASH_RESULT_ERR, - ESP_ROM_SPIFLASH_RESULT_TIMEOUT -} esp_rom_spiflash_result_t; - -typedef struct { - uint32_t device_id; - uint32_t chip_size; // chip size in bytes - uint32_t block_size; - uint32_t sector_size; - uint32_t page_size; - uint32_t status_mask; -} esp_rom_spiflash_chip_t; - -typedef struct { - uint8_t data_length; - uint8_t read_cmd0; - uint8_t read_cmd1; - uint8_t write_cmd; - uint16_t data_mask; - uint16_t data; -} esp_rom_spiflash_common_cmd_t; - -/** - * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. - * - * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). - * - * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. - * - * @return None - */ -void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); - -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - -/** - * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. - * Values usually read from falsh by rom code, function usually callde by rom code. - * if value with bit(3) set, the value is valid, bit[2:0] is the real value. - * - * @return None - */ -void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); - -/** - * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); - -/** - * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t legacy: In legacy mode, more SPI command is used in line. - * - * @return None - */ -void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy); - -/** - * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief Write status to Flash status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t status_value : Value to . - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); - -/** - * @brief Use a command to Read Flash status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t*status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); - -/** - * @brief Config SPI Flash read mode when init. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. - * - * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); - -/** - * @brief Config SPI Flash clock divisor. - * Please do not call this function in SDK. - * - * @param uint8_t freqdiv: clock divisor. - * - * @param uint8_t spi: 0 for SPI0, 1 for SPI1. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); - -/** - * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. - * - * @return uint16_t 0 : do not send command any more. - * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. - */ -uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); - -/** - * @brief Unlock SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); - -/** - * @brief SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Lock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_lock(void); - -/** - * @brief Update SPI Flash parameter. - * Please do not call this function in SDK. - * - * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. - * - * @param uint32_t chip_size : The Flash size. - * - * @param uint32_t block_size : The Flash block size. - * - * @param uint32_t sector_size : The Flash sector size. - * - * @param uint32_t page_size : The Flash page size. - * - * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, - uint32_t sector_size, uint32_t page_size, uint32_t status_mask); - -/** - * @brief Erase whole flash chip. - * Please do not call this function in SDK. - * - * @param None - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); - -/** - * @brief Erase a 64KB block of flash - * Uses SPI flash command D8H. - * Please do not call this function in SDK. - * - * @param uint32_t block_num : Which block to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); - -/** - * @brief Erase a sector of flash. - * Uses SPI flash command 20H. - * Please do not call this function in SDK. - * - * @param uint32_t sector_num : Which sector to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); - -/** - * @brief Erase some sectors. - * Please do not call this function in SDK. - * - * @param uint32_t start_addr : Start addr to erase, should be sector aligned. - * - * @param uint32_t area_len : Length to erase, should be sector aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); - -/** - * @brief Write Data to Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. - * - * @param const uint32_t *src : The pointer to data which is to write. - * - * @param uint32_t len : Length to write, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); - -/** - * @brief Read Data from Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. - * - * @param uint32_t *dest : The buf to read the data. - * - * @param uint32_t len : Length to read, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); - -/** - * @brief SPI1 go into encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_enable(void); - -/** - * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. - * - * @param uint32_t *data : The pointer to data which is to write. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data); - -/** - * @brief SPI1 go out of encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_disable(void); - -/** - * @brief Write data to flash with transparent encryption. - * @note Sectors to be written should already be erased. - * - * @note Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. - * - * @param uint32_t *data : The pointer to data to write. Note, this pointer must - * be 32 bit aligned and the content of the data will be - * modified by the encryption function. - * - * @param uint32_t len : Length to write, should be 32 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. - * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); - - -/** @brief Wait until SPI flash write operation is complete - * - * @note Please do not call this function in SDK. - * - * Reads the Write In Progress bit of the SPI flash status register, - * repeats until this bit is zero (indicating write complete). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete - * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); - - -/** @brief Enable Quad I/O pin functions - * - * @note Please do not call this function in SDK. - * - * Sets the HD & WP pin functions for Quad I/O modes, based on the - * efuse SPI pin configuration. - * - * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. - * - * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). - * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. - * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. - * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used - * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). - * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. - */ -void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); - -/** - * @brief Clear WEL bit unconditionally. - * - * @return always ESP_ROM_SPIFLASH_RESULT_OK - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); - -/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions - * - */ -extern esp_rom_spiflash_chip_t g_rom_flashchip; - extern uint8_t g_rom_spiflash_dummy_len_plus[]; /** diff --git a/components/esp_rom/include/esp32c3/rom/spi_flash.h b/components/esp_rom/include/esp32c3/rom/spi_flash.h index b591d4000f..83f330680d 100644 --- a/components/esp_rom/include/esp32c3/rom/spi_flash.h +++ b/components/esp_rom/include/esp32c3/rom/spi_flash.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_SPI_FLASH_H_ #define _ROM_SPI_FLASH_H_ @@ -24,14 +16,6 @@ extern "C" { #endif -/** \defgroup spi_flash_apis, spi flash operation related apis - * @brief spi_flash apis - */ - -/** @addtogroup spi_flash_apis - * @{ - */ - #define PERIPHS_SPI_FLASH_CMD SPI_MEM_CMD_REG(1) #define PERIPHS_SPI_FLASH_ADDR SPI_MEM_ADDR_REG(1) #define PERIPHS_SPI_FLASH_CTRL SPI_MEM_CTRL_REG(1) @@ -87,430 +71,10 @@ extern "C" { #define FLASH_ID_GD25LQ32C 0xC86016 typedef enum { - ESP_ROM_SPIFLASH_QIO_MODE = 0, - ESP_ROM_SPIFLASH_QOUT_MODE, - ESP_ROM_SPIFLASH_DIO_MODE, - ESP_ROM_SPIFLASH_DOUT_MODE, - ESP_ROM_SPIFLASH_FASTRD_MODE, - ESP_ROM_SPIFLASH_SLOWRD_MODE -} esp_rom_spiflash_read_mode_t; - -typedef enum { - ESP_ROM_SPIFLASH_RESULT_OK, - ESP_ROM_SPIFLASH_RESULT_ERR, - ESP_ROM_SPIFLASH_RESULT_TIMEOUT -} esp_rom_spiflash_result_t; - -typedef struct { - uint32_t device_id; - uint32_t chip_size; // chip size in bytes - uint32_t block_size; - uint32_t sector_size; - uint32_t page_size; - uint32_t status_mask; -} esp_rom_spiflash_chip_t; - -typedef struct { - uint8_t data_length; - uint8_t read_cmd0; - uint8_t read_cmd1; - uint8_t write_cmd; - uint16_t data_mask; - uint16_t data; -} esp_rom_spiflash_common_cmd_t; - -/** - * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. - * - * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). - * - * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. - * - * @return None - */ -void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); - -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - -/** - * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. - * Values usually read from falsh by rom code, function usually callde by rom code. - * if value with bit(3) set, the value is valid, bit[2:0] is the real value. - * - * @return None - */ -void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); - -/** - * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); - -/** - * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t legacy: In legacy mode, more SPI command is used in line. - * - * @return None - */ -void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy); - -/** - * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief Write status to Falsh status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t status_value : Value to . - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); - -/** - * @brief Use a command to Read Flash status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t*status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); - -/** - * @brief Config SPI Flash read mode when init. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. - * - * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); - -/** - * @brief Config SPI Flash clock divisor. - * Please do not call this function in SDK. - * - * @param uint8_t freqdiv: clock divisor. - * - * @param uint8_t spi: 0 for SPI0, 1 for SPI1. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); - -/** - * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. - * - * @return uint16_t 0 : do not send command any more. - * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. - */ -uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); - -/** - * @brief Unlock SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); - -/** - * @brief SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Lock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_lock(void); - -/** - * @brief Update SPI Flash parameter. - * Please do not call this function in SDK. - * - * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. - * - * @param uint32_t chip_size : The Flash size. - * - * @param uint32_t block_size : The Flash block size. - * - * @param uint32_t sector_size : The Flash sector size. - * - * @param uint32_t page_size : The Flash page size. - * - * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, - uint32_t sector_size, uint32_t page_size, uint32_t status_mask); - -/** - * @brief Erase whole flash chip. - * Please do not call this function in SDK. - * - * @param None - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); - -/** - * @brief Erase a 64KB block of flash - * Uses SPI flash command D8H. - * Please do not call this function in SDK. - * - * @param uint32_t block_num : Which block to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); - -/** - * @brief Erase a sector of flash. - * Uses SPI flash command 20H. - * Please do not call this function in SDK. - * - * @param uint32_t sector_num : Which sector to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); - -/** - * @brief Erase some sectors. - * Please do not call this function in SDK. - * - * @param uint32_t start_addr : Start addr to erase, should be sector aligned. - * - * @param uint32_t area_len : Length to erase, should be sector aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); - -/** - * @brief Write Data to Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. - * - * @param const uint32_t *src : The pointer to data which is to write. - * - * @param uint32_t len : Length to write, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); - -/** - * @brief Read Data from Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. - * - * @param uint32_t *dest : The buf to read the data. - * - * @param uint32_t len : Length to read, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); - -/** - * @brief SPI1 go into encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_enable(void); - -/** - * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. - * - * @param uint32_t *data : The pointer to data which is to write. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data); - -/** - * @brief SPI1 go out of encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_disable(void); - -/** - * @brief Write data to flash with transparent encryption. - * @note Sectors to be written should already be erased. - * - * @note Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. - * - * @param uint32_t *data : The pointer to data to write. Note, this pointer must - * be 32 bit aligned and the content of the data will be - * modified by the encryption function. - * - * @param uint32_t len : Length to write, should be 32 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. - * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); - - -/* TODO: figure out how to map these to their new names */ -typedef enum { - SPI_ENCRYPT_DESTINATION_FLASH, -} SpiEncryptDest; - -typedef esp_rom_spiflash_result_t SpiFlashOpResult; - -SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len); -SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len); -void SPI_Write_Encrypt_Enable(void); -void SPI_Write_Encrypt_Disable(void); - -/** @brief Wait until SPI flash write operation is complete - * - * @note Please do not call this function in SDK. - * - * Reads the Write In Progress bit of the SPI flash status register, - * repeats until this bit is zero (indicating write complete). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete - * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); - - -/** @brief Enable Quad I/O pin functions - * - * @note Please do not call this function in SDK. - * - * Sets the HD & WP pin functions for Quad I/O modes, based on the - * efuse SPI pin configuration. - * - * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. - * - * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). - * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. - * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. - * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used - * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). - * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. - */ -void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); - + SPI_FLASH_RESULT_OK, + SPI_FLASH_RESULT_ERR, + SPI_FLASH_RESULT_TIMEOUT +} SpiFlashOpResult; typedef void (* spi_flash_func_t)(void); typedef SpiFlashOpResult (* spi_flash_op_t)(void); @@ -534,35 +98,6 @@ typedef struct { spi_flash_op_t wait_idle; } spiflash_legacy_funcs_t; - -extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs; - -/** @brief Global ROM spiflash data, as used by legacy - SPI flash functions -*/ -typedef struct { - esp_rom_spiflash_chip_t chip; - uint8_t dummy_len_plus[3]; - uint8_t sig_matrix; -} spiflash_legacy_data_t; - -extern spiflash_legacy_data_t *rom_spiflash_legacy_data; - -/* Defines to make the C3 ROM legacvy data access compatible with previous chips */ -#define g_rom_flashchip (rom_spiflash_legacy_data->chip) -#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus) - -/** - * @brief Clear WEL bit unconditionally. - * - * @return always ESP_ROM_SPIFLASH_RESULT_OK - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); - -/** - * @} - */ - #ifdef __cplusplus } #endif diff --git a/components/esp_rom/include/esp32h2/rom/spi_flash.h b/components/esp_rom/include/esp32h2/rom/spi_flash.h index 139aee5066..9f3a1dab8c 100644 --- a/components/esp_rom/include/esp32h2/rom/spi_flash.h +++ b/components/esp_rom/include/esp32h2/rom/spi_flash.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_SPI_FLASH_H_ #define _ROM_SPI_FLASH_H_ @@ -24,14 +16,6 @@ extern "C" { #endif -/** \defgroup spi_flash_apis, spi flash operation related apis - * @brief spi_flash apis - */ - -/** @addtogroup spi_flash_apis - * @{ - */ - #define PERIPHS_SPI_FLASH_CMD SPI_MEM_CMD_REG(1) #define PERIPHS_SPI_FLASH_ADDR SPI_MEM_ADDR_REG(1) #define PERIPHS_SPI_FLASH_CTRL SPI_MEM_CTRL_REG(1) @@ -87,430 +71,10 @@ extern "C" { #define FLASH_ID_GD25LQ32C 0xC86016 typedef enum { - ESP_ROM_SPIFLASH_QIO_MODE = 0, - ESP_ROM_SPIFLASH_QOUT_MODE, - ESP_ROM_SPIFLASH_DIO_MODE, - ESP_ROM_SPIFLASH_DOUT_MODE, - ESP_ROM_SPIFLASH_FASTRD_MODE, - ESP_ROM_SPIFLASH_SLOWRD_MODE -} esp_rom_spiflash_read_mode_t; - -typedef enum { - ESP_ROM_SPIFLASH_RESULT_OK, - ESP_ROM_SPIFLASH_RESULT_ERR, - ESP_ROM_SPIFLASH_RESULT_TIMEOUT -} esp_rom_spiflash_result_t; - -typedef struct { - uint32_t device_id; - uint32_t chip_size; // chip size in bytes - uint32_t block_size; - uint32_t sector_size; - uint32_t page_size; - uint32_t status_mask; -} esp_rom_spiflash_chip_t; - -typedef struct { - uint8_t data_length; - uint8_t read_cmd0; - uint8_t read_cmd1; - uint8_t write_cmd; - uint16_t data_mask; - uint16_t data; -} esp_rom_spiflash_common_cmd_t; - -/** - * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. - * - * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). - * - * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. - * - * @return None - */ -void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); - -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - -/** - * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. - * Values usually read from falsh by rom code, function usually callde by rom code. - * if value with bit(3) set, the value is valid, bit[2:0] is the real value. - * - * @return None - */ -void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); - -/** - * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); - -/** - * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t legacy: In legacy mode, more SPI command is used in line. - * - * @return None - */ -void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy); - -/** - * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief Write status to Falsh status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t status_value : Value to . - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); - -/** - * @brief Use a command to Read Flash status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t*status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); - -/** - * @brief Config SPI Flash read mode when init. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. - * - * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); - -/** - * @brief Config SPI Flash clock divisor. - * Please do not call this function in SDK. - * - * @param uint8_t freqdiv: clock divisor. - * - * @param uint8_t spi: 0 for SPI0, 1 for SPI1. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); - -/** - * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. - * - * @return uint16_t 0 : do not send command any more. - * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. - */ -uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); - -/** - * @brief Unlock SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); - -/** - * @brief SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Lock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_lock(void); - -/** - * @brief Update SPI Flash parameter. - * Please do not call this function in SDK. - * - * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. - * - * @param uint32_t chip_size : The Flash size. - * - * @param uint32_t block_size : The Flash block size. - * - * @param uint32_t sector_size : The Flash sector size. - * - * @param uint32_t page_size : The Flash page size. - * - * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, - uint32_t sector_size, uint32_t page_size, uint32_t status_mask); - -/** - * @brief Erase whole flash chip. - * Please do not call this function in SDK. - * - * @param None - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); - -/** - * @brief Erase a 64KB block of flash - * Uses SPI flash command D8H. - * Please do not call this function in SDK. - * - * @param uint32_t block_num : Which block to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); - -/** - * @brief Erase a sector of flash. - * Uses SPI flash command 20H. - * Please do not call this function in SDK. - * - * @param uint32_t sector_num : Which sector to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); - -/** - * @brief Erase some sectors. - * Please do not call this function in SDK. - * - * @param uint32_t start_addr : Start addr to erase, should be sector aligned. - * - * @param uint32_t area_len : Length to erase, should be sector aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); - -/** - * @brief Write Data to Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. - * - * @param const uint32_t *src : The pointer to data which is to write. - * - * @param uint32_t len : Length to write, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); - -/** - * @brief Read Data from Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. - * - * @param uint32_t *dest : The buf to read the data. - * - * @param uint32_t len : Length to read, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); - -/** - * @brief SPI1 go into encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_enable(void); - -/** - * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. - * - * @param uint32_t *data : The pointer to data which is to write. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data); - -/** - * @brief SPI1 go out of encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_disable(void); - -/** - * @brief Write data to flash with transparent encryption. - * @note Sectors to be written should already be erased. - * - * @note Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. - * - * @param uint32_t *data : The pointer to data to write. Note, this pointer must - * be 32 bit aligned and the content of the data will be - * modified by the encryption function. - * - * @param uint32_t len : Length to write, should be 32 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. - * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); - - -/* TODO: figure out how to map these to their new names */ -typedef enum { - SPI_ENCRYPT_DESTINATION_FLASH, -} SpiEncryptDest; - -typedef esp_rom_spiflash_result_t SpiFlashOpResult; - -SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len); -SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len); -void SPI_Write_Encrypt_Enable(void); -void SPI_Write_Encrypt_Disable(void); - -/** @brief Wait until SPI flash write operation is complete - * - * @note Please do not call this function in SDK. - * - * Reads the Write In Progress bit of the SPI flash status register, - * repeats until this bit is zero (indicating write complete). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete - * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); - - -/** @brief Enable Quad I/O pin functions - * - * @note Please do not call this function in SDK. - * - * Sets the HD & WP pin functions for Quad I/O modes, based on the - * efuse SPI pin configuration. - * - * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. - * - * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). - * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. - * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. - * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used - * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). - * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. - */ -void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); - + SPI_FLASH_RESULT_OK, + SPI_FLASH_RESULT_ERR, + SPI_FLASH_RESULT_TIMEOUT +} SpiFlashOpResult; typedef void (* spi_flash_func_t)(void); typedef SpiFlashOpResult (* spi_flash_op_t)(void); @@ -537,27 +101,6 @@ typedef struct { extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs; -/** @brief Global ROM spiflash data, as used by legacy - SPI flash functions -*/ -typedef struct { - esp_rom_spiflash_chip_t chip; - uint8_t dummy_len_plus[3]; - uint8_t sig_matrix; -} spiflash_legacy_data_t; - -extern spiflash_legacy_data_t *rom_spiflash_legacy_data; - -/* Defines to make the H2 ROM legacvy data access compatible with previous chips */ -#define g_rom_flashchip (rom_spiflash_legacy_data->chip) -#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus) - -/** - * @brief Clear WEL bit unconditionally. - * - * @return always ESP_ROM_SPIFLASH_RESULT_OK - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); /** * @} diff --git a/components/esp_rom/include/esp32s2/rom/opi_flash.h b/components/esp_rom/include/esp32s2/rom/opi_flash.h index bb209f67f0..9aa0b97c23 100644 --- a/components/esp_rom/include/esp32s2/rom/opi_flash.h +++ b/components/esp_rom/include/esp32s2/rom/opi_flash.h @@ -9,6 +9,7 @@ #include #include #include "spi_flash.h" +#include "esp_rom_spiflash.h" #ifdef __cplusplus extern "C" { diff --git a/components/esp_rom/include/esp32s2/rom/spi_flash.h b/components/esp_rom/include/esp32s2/rom/spi_flash.h index beb2fcdf30..c34e95cb90 100644 --- a/components/esp_rom/include/esp32s2/rom/spi_flash.h +++ b/components/esp_rom/include/esp32s2/rom/spi_flash.h @@ -1,16 +1,8 @@ -// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_SPI_FLASH_H_ #define _ROM_SPI_FLASH_H_ @@ -29,14 +21,6 @@ extern "C" { #endif -/** \defgroup spi_flash_apis, spi flash operation related apis - * @brief spi_flash apis - */ - -/** @addtogroup spi_flash_apis - * @{ - */ - /************************************************************* * Note ************************************************************* @@ -123,447 +107,10 @@ extern "C" { #define FLASH_ID_GD25LQ32C 0xC86016 typedef enum { - ESP_ROM_SPIFLASH_QIO_MODE = 0, - ESP_ROM_SPIFLASH_QOUT_MODE, - ESP_ROM_SPIFLASH_DIO_MODE, - ESP_ROM_SPIFLASH_DOUT_MODE, - ESP_ROM_SPIFLASH_FASTRD_MODE, - ESP_ROM_SPIFLASH_SLOWRD_MODE, - ESP_ROM_SPIFLASH_OPI_STR_MODE, - ESP_ROM_SPIFLASH_OPI_DTR_MODE, - ESP_ROM_SPIFLASH_OOUT_MODE, - ESP_ROM_SPIFLASH_OIO_STR_MODE, - ESP_ROM_SPIFLASH_OIO_DTR_MODE, -} esp_rom_spiflash_read_mode_t; - -typedef enum { - ESP_ROM_SPIFLASH_RESULT_OK, - ESP_ROM_SPIFLASH_RESULT_ERR, - ESP_ROM_SPIFLASH_RESULT_TIMEOUT -} esp_rom_spiflash_result_t; - -typedef struct { - uint32_t device_id; - uint32_t chip_size; // chip size in bytes - uint32_t block_size; - uint32_t sector_size; - uint32_t page_size; - uint32_t status_mask; -} esp_rom_spiflash_chip_t; - -typedef struct { - uint8_t data_length; - uint8_t read_cmd0; - uint8_t read_cmd1; - uint8_t write_cmd; - uint16_t data_mask; - uint16_t data; -} esp_rom_spiflash_common_cmd_t; - -/** - * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. - * - * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). - * - * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. - * - * @return None - */ -void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); - -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - -/** - * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. - * Values usually read from falsh by rom code, function usually callde by rom code. - * if value with bit(3) set, the value is valid, bit[2:0] is the real value. - * - * @return None - */ -void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); - -/** - * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); - -/** - * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t legacy: In legacy mode, more SPI command is used in line. - * - * @return None - */ -void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy); - -/** - * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief Write status to Falsh status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t status_value : Value to . - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); - -/** - * @brief Use a command to Read Flash status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t*status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); - -/** - * @brief Config SPI Flash read mode when init. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. - * - * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); - -/** - * @brief Config SPI Flash clock divisor. - * Please do not call this function in SDK. - * - * @param uint8_t freqdiv: clock divisor. - * - * @param uint8_t spi: 0 for SPI0, 1 for SPI1. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); - -/** - * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. - * - * @return uint16_t 0 : do not send command any more. - * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. - */ -uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); - -/** - * @brief Unlock SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); - -/** - * @brief SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Lock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_lock(void); - -/** - * @brief Update SPI Flash parameter. - * Please do not call this function in SDK. - * - * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. - * - * @param uint32_t chip_size : The Flash size. - * - * @param uint32_t block_size : The Flash block size. - * - * @param uint32_t sector_size : The Flash sector size. - * - * @param uint32_t page_size : The Flash page size. - * - * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, - uint32_t sector_size, uint32_t page_size, uint32_t status_mask); - -/** - * @brief Erase whole flash chip. - * Please do not call this function in SDK. - * - * @param None - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); - -/** - * @brief Erase a 64KB block of flash - * Uses SPI flash command D8H. - * Please do not call this function in SDK. - * - * @param uint32_t block_num : Which block to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); - -/** - * @brief Erase a sector of flash. - * Uses SPI flash command 20H. - * Please do not call this function in SDK. - * - * @param uint32_t sector_num : Which sector to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); - -/** - * @brief Erase some sectors. - * Please do not call this function in SDK. - * - * @param uint32_t start_addr : Start addr to erase, should be sector aligned. - * - * @param uint32_t area_len : Length to erase, should be sector aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); - -/** - * @brief Write Data to Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. - * - * @param const uint32_t *src : The pointer to data which is to write. - * - * @param uint32_t len : Length to write, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); - -/** - * @brief Read Data from Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. - * - * @param uint32_t *dest : The buf to read the data. - * - * @param uint32_t len : Length to read, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); - -/** - * @brief SPI1 go into encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_enable(void); - -/** - * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. - * - * @param uint32_t *data : The pointer to data which is to write. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data); - -/** - * @brief SPI1 go out of encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_disable(void); - -/** - * @brief Write data to flash with transparent encryption. - * @note Sectors to be written should already be erased. - * - * @note Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. - * - * @param uint32_t *data : The pointer to data to write. Note, this pointer must - * be 32 bit aligned and the content of the data will be - * modified by the encryption function. - * - * @param uint32_t len : Length to write, should be 32 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. - * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); - - -/* TODO: figure out how to map these to their new names */ -typedef enum { - SPI_ENCRYPT_DESTINATION_FLASH, - SPI_ENCRYPT_DESTINATION_PSRAM, -} SpiEncryptDest; - -typedef esp_rom_spiflash_result_t SpiFlashOpResult; - -SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void* data, uint32_t len); -SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void* data, uint32_t len); -void SPI_Write_Encrypt_Enable(void); -void SPI_Write_Encrypt_Disable(void); - -/** @brief Wait until SPI flash write operation is complete - * - * @note Please do not call this function in SDK. - * - * Reads the Write In Progress bit of the SPI flash status register, - * repeats until this bit is zero (indicating write complete). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete - * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); - - -/** @brief Enable Quad I/O pin functions - * - * @note Please do not call this function in SDK. - * - * Sets the HD & WP pin functions for Quad I/O modes, based on the - * efuse SPI pin configuration. - * - * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. - * - * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). - * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. - * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. - * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used - * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). - * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. - */ -void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); - -/** - * @brief Clear WEL bit unconditionally. - * - * @return always ESP_ROM_SPIFLASH_RESULT_OK - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); - -/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions - * - */ -extern esp_rom_spiflash_chip_t g_rom_flashchip; + SPI_FLASH_RESULT_OK, + SPI_FLASH_RESULT_ERR, + SPI_FLASH_RESULT_TIMEOUT +} SpiFlashOpResult; extern uint8_t g_rom_spiflash_dummy_len_plus[]; diff --git a/components/esp_rom/include/esp32s3/rom/opi_flash.h b/components/esp_rom/include/esp32s3/rom/opi_flash.h index 8976e7b53e..539314eb03 100644 --- a/components/esp_rom/include/esp32s3/rom/opi_flash.h +++ b/components/esp_rom/include/esp32s3/rom/opi_flash.h @@ -10,6 +10,7 @@ #include #include #include "spi_flash.h" +#include "esp_rom_spiflash.h" #ifdef __cplusplus extern "C" { diff --git a/components/esp_rom/include/esp32s3/rom/spi_flash.h b/components/esp_rom/include/esp32s3/rom/spi_flash.h index 293306c9b9..a070f450c1 100644 --- a/components/esp_rom/include/esp32s3/rom/spi_flash.h +++ b/components/esp_rom/include/esp32s3/rom/spi_flash.h @@ -1,16 +1,8 @@ -// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include @@ -21,14 +13,6 @@ extern "C" { #endif -/** \defgroup spi_flash_apis, spi flash operation related apis - * @brief spi_flash apis - */ - -/** @addtogroup spi_flash_apis - * @{ - */ - /************************************************************* * Note ************************************************************* @@ -114,52 +98,21 @@ extern "C" { #define FLASH_ID_GD25LQ32C 0xC86016 -typedef enum { - ESP_ROM_SPIFLASH_QIO_MODE = 0, - ESP_ROM_SPIFLASH_QOUT_MODE, - ESP_ROM_SPIFLASH_DIO_MODE, - ESP_ROM_SPIFLASH_DOUT_MODE, - ESP_ROM_SPIFLASH_FASTRD_MODE, - ESP_ROM_SPIFLASH_SLOWRD_MODE, - ESP_ROM_SPIFLASH_OPI_STR_MODE, - ESP_ROM_SPIFLASH_OPI_DTR_MODE, - ESP_ROM_SPIFLASH_OOUT_MODE, - ESP_ROM_SPIFLASH_OIO_STR_MODE, - ESP_ROM_SPIFLASH_OIO_DTR_MODE, -} esp_rom_spiflash_read_mode_t; typedef enum { - ESP_ROM_SPIFLASH_RESULT_OK, - ESP_ROM_SPIFLASH_RESULT_ERR, - ESP_ROM_SPIFLASH_RESULT_TIMEOUT -} esp_rom_spiflash_result_t; - -typedef struct { - uint32_t device_id; - uint32_t chip_size; // chip size in bytes - uint32_t block_size; - uint32_t sector_size; - uint32_t page_size; - uint32_t status_mask; -} esp_rom_spiflash_chip_t; - -typedef struct { - uint8_t data_length; - uint8_t read_cmd0; - uint8_t read_cmd1; - uint8_t write_cmd; - uint16_t data_mask; - uint16_t data; -} esp_rom_spiflash_common_cmd_t; + SPI_FLASH_RESULT_OK, + SPI_FLASH_RESULT_ERR, + SPI_FLASH_RESULT_TIMEOUT +} SpiFlashOpResult; typedef void (*spi_flash_func_t)(void); -typedef esp_rom_spiflash_result_t (*spi_flash_op_t)(void); -typedef esp_rom_spiflash_result_t (*spi_flash_erase_t)(uint32_t); -typedef esp_rom_spiflash_result_t (*spi_flash_rd_t)(uint32_t, void*, int); -typedef esp_rom_spiflash_result_t (*spi_flash_wr_t)(uint32_t, const uint32_t*, int); -typedef esp_rom_spiflash_result_t (*spi_flash_ewr_t)(uint32_t, const void*, uint32_t); -typedef esp_rom_spiflash_result_t (*spi_flash_wren_t)(void*); -typedef esp_rom_spiflash_result_t (* spi_flash_erase_area_t)(uint32_t, uint32_t); +typedef SpiFlashOpResult (*spi_flash_op_t)(void); +typedef SpiFlashOpResult (*spi_flash_erase_t)(uint32_t); +typedef SpiFlashOpResult (*spi_flash_rd_t)(uint32_t, void*, int); +typedef SpiFlashOpResult (*spi_flash_wr_t)(uint32_t, const uint32_t*, int); +typedef SpiFlashOpResult (*spi_flash_ewr_t)(uint32_t, const void*, uint32_t); +typedef SpiFlashOpResult (*spi_flash_wren_t)(void*); +typedef SpiFlashOpResult (* spi_flash_erase_area_t)(uint32_t, uint32_t); typedef struct { uint8_t pp_addr_bit_len; @@ -180,417 +133,6 @@ typedef struct { spi_flash_erase_area_t erase_area; } spiflash_legacy_funcs_t; - -/** - * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. - * - * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). - * - * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. - * - * @return None - */ -void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); - -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - -/** - * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. - * Values usually read from falsh by rom code, function usually callde by rom code. - * if value with bit(3) set, the value is valid, bit[2:0] is the real value. - * - * @return None - */ -void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); - -/** - * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); - -/** - * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t legacy: In legacy mode, more SPI command is used in line. - * - * @return None - */ -void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy); - -/** - * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t *status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); - -/** - * @brief Write status to Falsh status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t status_value : Value to . - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); - -/** - * @brief Use a command to Read Flash status register. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. - * - * @param uint32_t*status : The pointer to which to return the Flash status value. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); - -/** - * @brief Config SPI Flash read mode when init. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. - * - * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); - -/** - * @brief Config SPI Flash clock divisor. - * Please do not call this function in SDK. - * - * @param uint8_t freqdiv: clock divisor. - * - * @param uint8_t spi: 0 for SPI0, 1 for SPI1. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : config error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); - -/** - * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. - * - * @return uint16_t 0 : do not send command any more. - * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. - */ -uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); - -/** - * @brief Unlock SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); - -/** - * @brief SPI write protect. - * Please do not call this function in SDK. - * - * @param None. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Lock error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_lock(void); - -/** - * @brief Update SPI Flash parameter. - * Please do not call this function in SDK. - * - * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. - * - * @param uint32_t chip_size : The Flash size. - * - * @param uint32_t block_size : The Flash block size. - * - * @param uint32_t sector_size : The Flash sector size. - * - * @param uint32_t page_size : The Flash page size. - * - * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, - uint32_t sector_size, uint32_t page_size, uint32_t status_mask); - -/** - * @brief Erase whole flash chip. - * Please do not call this function in SDK. - * - * @param None - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); - -/** - * @brief Erase a 64KB block of flash - * Uses SPI flash command D8H. - * Please do not call this function in SDK. - * - * @param uint32_t block_num : Which block to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); - -/** - * @brief Erase a sector of flash. - * Uses SPI flash command 20H. - * Please do not call this function in SDK. - * - * @param uint32_t sector_num : Which sector to erase. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); - -/** - * @brief Erase some sectors. - * Please do not call this function in SDK. - * - * @param uint32_t start_addr : Start addr to erase, should be sector aligned. - * - * @param uint32_t area_len : Length to erase, should be sector aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); - -/** - * @brief Write Data to Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. - * - * @param const uint32_t *src : The pointer to data which is to write. - * - * @param uint32_t len : Length to write, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); - -/** - * @brief Read Data from Flash, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. - * - * @param uint32_t *dest : The buf to read the data. - * - * @param uint32_t len : Length to read, should be 4 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); - -/** - * @brief SPI1 go into encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_enable(void); - -/** - * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. - * Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. - * - * @param uint32_t *data : The pointer to data which is to write. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK. - * ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data); - -/** - * @brief SPI1 go out of encrypto mode. - * Please do not call this function in SDK. - * - * @param None - * - * @return None - */ -void esp_rom_spiflash_write_encrypted_disable(void); - -/** - * @brief Write data to flash with transparent encryption. - * @note Sectors to be written should already be erased. - * - * @note Please do not call this function in SDK. - * - * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. - * - * @param uint32_t *data : The pointer to data to write. Note, this pointer must - * be 32 bit aligned and the content of the data will be - * modified by the encryption function. - * - * @param uint32_t len : Length to write, should be 32 bytes aligned. - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. - * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. - * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); - - -/* TODO: figure out how to map these to their new names */ -typedef enum { - SPI_ENCRYPT_DESTINATION_FLASH, - SPI_ENCRYPT_DESTINATION_PSRAM, -} SpiEncryptDest; - -typedef esp_rom_spiflash_result_t SpiFlashOpResult; - -SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len); -SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len); -void SPI_Write_Encrypt_Enable(void); -void SPI_Write_Encrypt_Disable(void); - -/** @brief Wait until SPI flash write operation is complete - * - * @note Please do not call this function in SDK. - * - * Reads the Write In Progress bit of the SPI flash status register, - * repeats until this bit is zero (indicating write complete). - * - * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete - * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. - */ -esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); - - -/** @brief Enable Quad I/O pin functions - * - * @note Please do not call this function in SDK. - * - * Sets the HD & WP pin functions for Quad I/O modes, based on the - * efuse SPI pin configuration. - * - * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. - * - * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). - * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. - * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. - * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used - * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). - * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. - */ -void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); - -/** - * @brief Clear WEL bit unconditionally. - * - * @return always ESP_ROM_SPIFLASH_RESULT_OK - */ -esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); -typedef struct { - esp_rom_spiflash_chip_t chip; - uint8_t dummy_len_plus[3]; - uint8_t sig_matrix; -} spiflash_legacy_data_t; - -extern spiflash_legacy_data_t *rom_spiflash_legacy_data; - -#define g_rom_flashchip (rom_spiflash_legacy_data->chip) -#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus) - #ifdef __cplusplus } #endif diff --git a/components/esp_rom/include/esp_rom_spiflash.h b/components/esp_rom/include/esp_rom_spiflash.h new file mode 100644 index 0000000000..c4646a7472 --- /dev/null +++ b/components/esp_rom/include/esp_rom_spiflash.h @@ -0,0 +1,468 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +/** \defgroup spi_flash_apis, spi flash operation related apis + * @brief spi_flash apis + */ + +/** @addtogroup spi_flash_apis + * @{ + */ + +typedef enum { + ESP_ROM_SPIFLASH_QIO_MODE = 0, + ESP_ROM_SPIFLASH_QOUT_MODE, + ESP_ROM_SPIFLASH_DIO_MODE, + ESP_ROM_SPIFLASH_DOUT_MODE, + ESP_ROM_SPIFLASH_FASTRD_MODE, + ESP_ROM_SPIFLASH_SLOWRD_MODE, + ESP_ROM_SPIFLASH_OPI_STR_MODE, + ESP_ROM_SPIFLASH_OPI_DTR_MODE, + ESP_ROM_SPIFLASH_OOUT_MODE, + ESP_ROM_SPIFLASH_OIO_STR_MODE, + ESP_ROM_SPIFLASH_OIO_DTR_MODE, +} esp_rom_spiflash_read_mode_t; + +typedef enum { + ESP_ROM_SPIFLASH_RESULT_OK, + ESP_ROM_SPIFLASH_RESULT_ERR, + ESP_ROM_SPIFLASH_RESULT_TIMEOUT +} esp_rom_spiflash_result_t; + +typedef struct { + uint32_t device_id; + uint32_t chip_size; // chip size in bytes + uint32_t block_size; + uint32_t sector_size; + uint32_t page_size; + uint32_t status_mask; +} esp_rom_spiflash_chip_t; + +typedef struct { + uint8_t data_length; + uint8_t read_cmd0; + uint8_t read_cmd1; + uint8_t write_cmd; + uint16_t data_mask; + uint16_t data; +} esp_rom_spiflash_common_cmd_t; + +/** + * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. + * Please do not call this function in SDK. + * + * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). + * + * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. + * + * @return None + */ +void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); + +/** + * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. + * Please do not call this function in SDK. + * + * @param uint8_t wp_gpio_num: WP gpio number. + * + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd + * + * @return None + */ +void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); + +/** + * @brief Set SPI Flash pad drivers. + * Please do not call this function in SDK. + * + * @param uint8_t wp_gpio_num: WP gpio number. + * + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd + * + * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid + * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. + * Values usually read from falsh by rom code, function usually callde by rom code. + * if value with bit(3) set, the value is valid, bit[2:0] is the real value. + * + * @return None + */ +void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); + +/** + * @brief Select SPI Flash function for pads. + * Please do not call this function in SDK. + * + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd + * + * @return None + */ +void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); + +/** + * @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode. + * Please do not call this function in SDK. + * + * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping + * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd + * + * @param uint8_t legacy: In legacy mode, more SPI command is used in line. + * + * @return None + */ +void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy); + +/** + * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR). + * Please do not call this function in SDK. + * + * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. + * + * @param uint32_t *status : The pointer to which to return the Flash status value. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : read error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status); + +/** + * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2). + * Please do not call this function in SDK. + * + * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. + * + * @param uint32_t *status : The pointer to which to return the Flash status value. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : read error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status); + +/** + * @brief Write status to Flash status register. + * Please do not call this function in SDK. + * + * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. + * + * @param uint32_t status_value : Value to . + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : write OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : write error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value); + +/** + * @brief Use a command to Read Flash status register. + * Please do not call this function in SDK. + * + * @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file. + * + * @param uint32_t*status : The pointer to which to return the Flash status value. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : read OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : read error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd); + +/** + * @brief Config SPI Flash read mode when init. + * Please do not call this function in SDK. + * + * @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD. + * + * This function does not try to set the QIO Enable bit in the status register, caller is responsible for this. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : config error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode); + +/** + * @brief Config SPI Flash clock divisor. + * Please do not call this function in SDK. + * + * @param uint8_t freqdiv: clock divisor. + * + * @param uint8_t spi: 0 for SPI0, 1 for SPI1. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : config OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : config error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi); + +/** + * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. + * Please do not call this function in SDK. + * + * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. + * + * @return uint16_t 0 : do not send command any more. + * 1 : go to the next command. + * n > 1 : skip (n - 1) commands. + */ +uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); + +/** + * @brief Unlock SPI write protect. + * Please do not call this function in SDK. + * + * @param None. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void); + +/** + * @brief SPI write protect. + * Please do not call this function in SDK. + * + * @param None. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Lock error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_lock(void); + +/** + * @brief Update SPI Flash parameter. + * Please do not call this function in SDK. + * + * @param uint32_t deviceId : Device ID read from SPI, the low 32 bit. + * + * @param uint32_t chip_size : The Flash size. + * + * @param uint32_t block_size : The Flash block size. + * + * @param uint32_t sector_size : The Flash sector size. + * + * @param uint32_t page_size : The Flash page size. + * + * @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD). + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Update error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size, + uint32_t sector_size, uint32_t page_size, uint32_t status_mask); + +/** + * @brief Erase whole flash chip. + * Please do not call this function in SDK. + * + * @param None + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void); + +/** + * @brief Erase a 64KB block of flash + * Uses SPI flash command D8H. + * Please do not call this function in SDK. + * + * @param uint32_t block_num : Which block to erase. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num); + +/** + * @brief Erase a sector of flash. + * Uses SPI flash command 20H. + * Please do not call this function in SDK. + * + * @param uint32_t sector_num : Which sector to erase. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num); + +/** + * @brief Erase some sectors. + * Please do not call this function in SDK. + * + * @param uint32_t start_addr : Start addr to erase, should be sector aligned. + * + * @param uint32_t area_len : Length to erase, should be sector aligned. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Erase error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len); + +/** + * @brief Write Data to Flash, you should Erase it yourself if need. + * Please do not call this function in SDK. + * + * @param uint32_t dest_addr : Address to write, should be 4 bytes aligned. + * + * @param const uint32_t *src : The pointer to data which is to write. + * + * @param uint32_t len : Length to write, should be 4 bytes aligned. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Write error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len); + +/** + * @brief Read Data from Flash, you should Erase it yourself if need. + * Please do not call this function in SDK. + * + * @param uint32_t src_addr : Address to read, should be 4 bytes aligned. + * + * @param uint32_t *dest : The buf to read the data. + * + * @param uint32_t len : Length to read, should be 4 bytes aligned. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Read error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len); + +/** + * @brief SPI1 go into encrypto mode. + * Please do not call this function in SDK. + * + * @param None + * + * @return None + */ +void esp_rom_spiflash_write_encrypted_enable(void); + +/** + * @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need. + * Please do not call this function in SDK. + * + * @param uint32_t flash_addr : Address to write, should be 32 bytes aligned. + * + * @param uint32_t *data : The pointer to data which is to write. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK. + * ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data); + +/** + * @brief SPI1 go out of encrypto mode. + * Please do not call this function in SDK. + * + * @param None + * + * @return None + */ +void esp_rom_spiflash_write_encrypted_disable(void); + +/** + * @brief Write data to flash with transparent encryption. + * @note Sectors to be written should already be erased. + * + * @note Please do not call this function in SDK. + * + * @param uint32_t flash_addr : Address to write, should be 32 byte aligned. + * + * @param uint32_t *data : The pointer to data to write. Note, this pointer must + * be 32 bit aligned and the content of the data will be + * modified by the encryption function. + * + * @param uint32_t len : Length to write, should be 32 bytes aligned. + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully. + * ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error. + * ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len); + + +/** @brief Wait until SPI flash write operation is complete + * + * @note Please do not call this function in SDK. + * + * Reads the Write In Progress bit of the SPI flash status register, + * repeats until this bit is zero (indicating write complete). + * + * @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete + * ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status. + */ +esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi); + + +/** @brief Enable Quad I/O pin functions + * + * @note Please do not call this function in SDK. + * + * Sets the HD & WP pin functions for Quad I/O modes, based on the + * efuse SPI pin configuration. + * + * @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O. + * + * @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig(). + * - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored. + * - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored. + * - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used + * to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI). + * Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral. + */ +void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig); + +/** + * @brief Clear WEL bit unconditionally. + * + * @return always ESP_ROM_SPIFLASH_RESULT_OK + */ +esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); + +typedef struct { + esp_rom_spiflash_chip_t chip; + uint8_t dummy_len_plus[3]; + uint8_t sig_matrix; +} spiflash_legacy_data_t; + + +/* Flash data defined in ROM*/ +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 +extern esp_rom_spiflash_chip_t g_rom_flashchip; +#else +extern spiflash_legacy_data_t *rom_spiflash_legacy_data; +#define g_rom_flashchip (rom_spiflash_legacy_data->chip) +#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus) +#endif + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index c58fee6570..eae13483b4 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -85,19 +85,9 @@ #include "bootloader_mem.h" #if CONFIG_APP_BUILD_TYPE_ELF_RAM -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" +#include "esp_rom_spiflash.h" #elif CONFIG_IDF_TARGET_ESP8684 #include "esp8684/rom/spi_flash.h" -#endif #endif // CONFIG_APP_BUILD_TYPE_ELF_RAM // Set efuse ROM_LOG_MODE on first boot diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c index db31f6ac41..13b9543695 100644 --- a/components/spi_flash/cache_utils.c +++ b/components/spi_flash/cache_utils.c @@ -14,25 +14,20 @@ #include #if CONFIG_IDF_TARGET_ESP32 #include "soc/dport_reg.h" -#include #include #elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" #include "esp32s2/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" #include "esp32s3/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" #include "esp32c3/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" #include "esp32h2/rom/cache.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" @@ -42,6 +37,7 @@ #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #endif +#include "esp_rom_spiflash.h" #include #include "sdkconfig.h" #ifndef CONFIG_FREERTOS_UNICORE diff --git a/components/spi_flash/esp32/flash_ops_esp32.c b/components/spi_flash/esp32/flash_ops_esp32.c index da4a1622a4..2ae5b8fe54 100644 --- a/components/spi_flash/esp32/flash_ops_esp32.c +++ b/components/spi_flash/esp32/flash_ops_esp32.c @@ -1,20 +1,13 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include "esp_spi_flash.h" #include "esp32/rom/spi_flash.h" #include "esp32/rom/cache.h" +#include "esp_rom_spiflash.h" static inline void IRAM_ATTR spi_flash_guard_start(void) { diff --git a/components/spi_flash/esp32/spi_flash_rom_patch.c b/components/spi_flash/esp32/spi_flash_rom_patch.c index d25150d852..69738a505e 100644 --- a/components/spi_flash/esp32/spi_flash_rom_patch.c +++ b/components/spi_flash/esp32/spi_flash_rom_patch.c @@ -1,20 +1,13 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "sdkconfig.h" #include "esp32/rom/spi_flash.h" #include "soc/spi_periph.h" #include "spi_flash_defs.h" +#include "esp_rom_spiflash.h" #define SPI_IDX 1 diff --git a/components/spi_flash/esp32c3/flash_ops_esp32c3.c b/components/spi_flash/esp32c3/flash_ops_esp32c3.c index 039b2ce246..8765cfc6a9 100644 --- a/components/spi_flash/esp32c3/flash_ops_esp32c3.c +++ b/components/spi_flash/esp32c3/flash_ops_esp32c3.c @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -24,6 +16,7 @@ #include "esp_flash.h" #include "esp_log.h" #include "esp_attr.h" +#include "esp_rom_spiflash.h" static const char *TAG = "spiflash_c3"; diff --git a/components/spi_flash/esp32c3/spi_flash_rom_patch.c b/components/spi_flash/esp32c3/spi_flash_rom_patch.c index 7180f3883f..c272b3fb62 100644 --- a/components/spi_flash/esp32c3/spi_flash_rom_patch.c +++ b/components/spi_flash/esp32c3/spi_flash_rom_patch.c @@ -1,20 +1,13 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "sdkconfig.h" #include "esp32c3/rom/spi_flash.h" #include "soc/spi_periph.h" #include "spi_flash_defs.h" +#include "esp_rom_spiflash.h" #define SPI_IDX 1 diff --git a/components/spi_flash/esp32h2/flash_ops_esp32h2.c b/components/spi_flash/esp32h2/flash_ops_esp32h2.c index 10231bdfdd..e69733898e 100644 --- a/components/spi_flash/esp32h2/flash_ops_esp32h2.c +++ b/components/spi_flash/esp32h2/flash_ops_esp32h2.c @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -24,6 +16,7 @@ #include "esp_flash.h" #include "esp_log.h" #include "esp_attr.h" +#include "esp_rom_spiflash.h" static const char *TAG = "spiflash_h2"; diff --git a/components/spi_flash/esp32h2/spi_flash_rom_patch.c b/components/spi_flash/esp32h2/spi_flash_rom_patch.c index a133de307c..cc2dcd5a64 100644 --- a/components/spi_flash/esp32h2/spi_flash_rom_patch.c +++ b/components/spi_flash/esp32h2/spi_flash_rom_patch.c @@ -1,20 +1,13 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "sdkconfig.h" #include "esp32h2/rom/spi_flash.h" #include "soc/spi_periph.h" #include "spi_flash_defs.h" +#include "esp_rom_spiflash.h" #define SPI_IDX 1 diff --git a/components/spi_flash/esp32s2/flash_ops_esp32s2.c b/components/spi_flash/esp32s2/flash_ops_esp32s2.c index ccdf0636c5..cf80475194 100644 --- a/components/spi_flash/esp32s2/flash_ops_esp32s2.c +++ b/components/spi_flash/esp32s2/flash_ops_esp32s2.c @@ -1,16 +1,8 @@ -// Copyright 2018 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -24,6 +16,7 @@ #include "hal/spi_flash_hal.h" #include "esp_flash.h" #include "esp_log.h" +#include "esp_rom_spiflash.h" static const char *TAG = "spiflash_s2"; @@ -71,7 +64,7 @@ esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_a ops->start(); } flash_rom_init(); - rc = SPI_Encrypt_Write(dest_addr, src, size); + rc = esp_rom_spiflash_write_encrypted(dest_addr, (uint32_t*)src, size); if (ops && ops->end) { ops->end(); } diff --git a/components/spi_flash/esp32s2/spi_flash_rom_patch.c b/components/spi_flash/esp32s2/spi_flash_rom_patch.c index 139a56bd2b..23ee08e56c 100644 --- a/components/spi_flash/esp32s2/spi_flash_rom_patch.c +++ b/components/spi_flash/esp32s2/spi_flash_rom_patch.c @@ -1,20 +1,13 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "sdkconfig.h" #include "esp32s2/rom/spi_flash.h" #include "soc/spi_periph.h" #include "spi_flash_defs.h" +#include "esp_rom_spiflash.h" #define SPI_IDX 1 diff --git a/components/spi_flash/esp32s3/flash_ops_esp32s3.c b/components/spi_flash/esp32s3/flash_ops_esp32s3.c index e8e8ed7e2c..f4891fbdbe 100644 --- a/components/spi_flash/esp32s3/flash_ops_esp32s3.c +++ b/components/spi_flash/esp32s3/flash_ops_esp32s3.c @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include @@ -24,6 +16,7 @@ #include "hal/spi_flash_hal.h" #include "esp_flash.h" #include "esp_log.h" +#include "esp_rom_spiflash.h" static const char *TAG = "spiflash_s3"; diff --git a/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c b/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c index a725528513..41682cd431 100644 --- a/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c +++ b/components/spi_flash/esp32s3/spi_flash_oct_flash_init.c @@ -10,6 +10,7 @@ #include "esp_rom_gpio.h" #include "esp32s3/rom/gpio.h" #include "esp32s3/rom/spi_flash.h" +#include "esp_rom_spiflash.h" #include "esp32s3/rom/opi_flash.h" #include "esp_private/spi_flash_os.h" #include "opi_flash_private.h" diff --git a/components/spi_flash/esp32s3/spi_timing_config.h b/components/spi_flash/esp32s3/spi_timing_config.h index 06af783c9f..a8d064d491 100644 --- a/components/spi_flash/esp32s3/spi_timing_config.h +++ b/components/spi_flash/esp32s3/spi_timing_config.h @@ -8,6 +8,7 @@ #include "esp_flash_partitions.h" #include "esp32s3/rom/spi_flash.h" +#include "esp_rom_spiflash.h" #include "esp32s3/rom/opi_flash.h" #include "mspi_timing_tuning_configs.h" diff --git a/components/spi_flash/esp_flash_api.c b/components/spi_flash/esp_flash_api.c index 7b0719c277..ba13b7f132 100644 --- a/components/spi_flash/esp_flash_api.c +++ b/components/spi_flash/esp_flash_api.c @@ -16,22 +16,12 @@ #include "esp_flash_internal.h" #include "spi_flash_defs.h" #include "esp_rom_caps.h" +#include "esp_rom_spiflash.h" #if CONFIG_IDF_TARGET_ESP32S2 #include "esp_crypto_lock.h" // for locking flash encryption peripheral #endif //CONFIG_IDF_TARGET_ESP32S2 -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" #elif CONFIG_IDF_TARGET_ESP8684 #include "esp8684/rom/spi_flash.h" -#endif static const char TAG[] = "spi_flash"; diff --git a/components/spi_flash/esp_flash_spi_init.c b/components/spi_flash/esp_flash_spi_init.c index 36441c148e..22cd9fa04c 100644 --- a/components/spi_flash/esp_flash_spi_init.c +++ b/components/spi_flash/esp_flash_spi_init.c @@ -20,21 +20,8 @@ #include "esp_flash_internal.h" #include "esp_rom_gpio.h" #include "esp_private/spi_flash_os.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 +#include "esp_rom_spiflash.h" #include "esp32c3/rom/efuse.h" -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP8684 -#include "esp8684/rom/efuse.h" -#include "esp8684/rom/spi_flash.h" -#endif __attribute__((unused)) static const char TAG[] = "spi_flash"; diff --git a/components/spi_flash/flash_mmap.c b/components/spi_flash/flash_mmap.c index 4de236cc56..2315d5f91c 100644 --- a/components/spi_flash/flash_mmap.c +++ b/components/spi_flash/flash_mmap.c @@ -19,26 +19,24 @@ #include "esp_attr.h" #include "esp_spi_flash.h" #include "esp_flash_encrypt.h" +#include "esp_rom_spiflash.h" #include "esp_log.h" #include "cache_utils.h" #if CONFIG_IDF_TARGET_ESP32 #include "soc/dport_reg.h" #include "esp32/rom/cache.h" -#include "esp32/rom/spi_flash.h" #include "esp32/spiram.h" #include "soc/mmu.h" // TODO: IDF-3821 #define INVALID_PHY_PAGE 0xffff #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rom/cache.h" -#include "esp32s2/rom/spi_flash.h" #include "esp32s2/spiram.h" #include "soc/extmem_reg.h" #include "soc/cache_memory.h" #include "soc/mmu.h" #elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" #include "esp32s3/rom/cache.h" #include "esp32s3/spiram.h" #include "soc/extmem_reg.h" @@ -46,12 +44,10 @@ #include "soc/mmu.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" -#include "esp32c3/rom/spi_flash.h" #include "soc/cache_memory.h" #include "soc/mmu.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/cache.h" -#include "esp32h2/rom/spi_flash.h" #include "soc/cache_memory.h" #include "soc/mmu.h" #elif CONFIG_IDF_TARGET_ESP8684 diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index df77fb1b04..d6381a2054 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -27,23 +27,20 @@ #include "esp32/rom/spi_flash.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/rom/cache.h" -#include "esp32s2/rom/spi_flash.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "soc/spi_mem_reg.h" -#include "esp32s3/rom/spi_flash.h" #include "esp32s3/rom/opi_flash.h" #include "esp32s3/rom/cache.h" #include "esp32s3/opi_flash_private.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/cache.h" -#include "esp32c3/rom/spi_flash.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/cache.h" -#include "esp32h2/rom/spi_flash.h" #elif CONFIG_IDF_TARGET_ESP8684 #include "esp8684/rom/cache.h" #include "esp8684/rom/spi_flash.h" #endif +#include "esp_rom_spiflash.h" #include "esp_flash_partitions.h" #include "cache_utils.h" #include "esp_flash.h" diff --git a/components/spi_flash/include/esp_private/spi_flash_os.h b/components/spi_flash/include/esp_private/spi_flash_os.h index e73511bc11..952a6ed544 100644 --- a/components/spi_flash/include/esp_private/spi_flash_os.h +++ b/components/spi_flash/include/esp_private/spi_flash_os.h @@ -19,19 +19,11 @@ */ #pragma once +#include "esp_rom_spiflash.h" #include #include #include "sdkconfig.h" #include "esp_err.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#endif #include "esp_flash.h" #include "hal/spi_flash_hal.h" diff --git a/components/spi_flash/sim/SpiFlash.h b/components/spi_flash/sim/SpiFlash.h index 070d4621bf..89a3048001 100644 --- a/components/spi_flash/sim/SpiFlash.h +++ b/components/spi_flash/sim/SpiFlash.h @@ -1,16 +1,8 @@ -// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SpiFlash_H_ #define _SpiFlash_H_ @@ -19,6 +11,7 @@ #include "esp_err.h" #include "esp32/rom/spi_flash.h" +#include "esp_rom_spiflash.h" /** * @brief This class is used to emulate flash devices. diff --git a/components/spi_flash/sim/flash_mock.cpp b/components/spi_flash/sim/flash_mock.cpp index 03ddeceefc..90c19f3d0a 100644 --- a/components/spi_flash/sim/flash_mock.cpp +++ b/components/spi_flash/sim/flash_mock.cpp @@ -8,6 +8,7 @@ #include "esp_err.h" #include "esp32/rom/spi_flash.h" +#include "esp_rom_spiflash.h" SpiFlash spiflash = SpiFlash(); diff --git a/components/spi_flash/sim/flash_mock_util.c b/components/spi_flash/sim/flash_mock_util.c index 2db51c58ae..62c0146272 100644 --- a/components/spi_flash/sim/flash_mock_util.c +++ b/components/spi_flash/sim/flash_mock_util.c @@ -3,6 +3,7 @@ #include "esp_err.h" #include "esp32/rom/spi_flash.h" +#include "esp_rom_spiflash.h" bool spi_flash_check_and_flush_cache(size_t start_addr, size_t length) { diff --git a/components/spi_flash/test/test_large_flash_writes.c b/components/spi_flash/test/test_large_flash_writes.c index 11824cd11b..30701cd02d 100644 --- a/components/spi_flash/test/test_large_flash_writes.c +++ b/components/spi_flash/test/test_large_flash_writes.c @@ -1,16 +1,8 @@ -// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ // Test for spi_flash_write() with large buffers (in RAM or on flash) @@ -25,7 +17,7 @@ #include #include #include -#include +#include "esp_rom_spiflash.h" #include "../cache_utils.h" #include "soc/timer_periph.h" diff --git a/components/spi_flash/test/test_read_write.c b/components/spi_flash/test/test_read_write.c index 9608c7b56b..76f4201c1f 100644 --- a/components/spi_flash/test/test_read_write.c +++ b/components/spi_flash/test/test_read_write.c @@ -21,15 +21,8 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" #endif +#include "esp_rom_spiflash.h" #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684) // TODO: SPI_FLASH IDF-4025 diff --git a/components/spi_flash/test/test_spi_flash.c b/components/spi_flash/test/test_spi_flash.c index e9bf6c859b..036270e7e1 100644 --- a/components/spi_flash/test/test_spi_flash.c +++ b/components/spi_flash/test/test_spi_flash.c @@ -13,20 +13,12 @@ #include "ccomp_timer.h" #include "esp_log.h" #include "esp_rom_sys.h" +#include "esp_rom_spiflash.h" #include "esp_timer.h" #include "bootloader_flash.h" //for bootloader_flash_xmc_startup #include "sdkconfig.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#endif #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP8684) diff --git a/components/spiffs/esp_spiffs.c b/components/spiffs/esp_spiffs.c index 32b831954c..6315f161e4 100644 --- a/components/spiffs/esp_spiffs.c +++ b/components/spiffs/esp_spiffs.c @@ -21,19 +21,9 @@ #include #include "esp_vfs.h" #include "esp_err.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32C3 -#include "esp32c3/rom/spi_flash.h" -#elif CONFIG_IDF_TARGET_ESP32H2 -#include "esp32h2/rom/spi_flash.h" +#include "esp_rom_spiflash.h" #elif CONFIG_IDF_TARGET_ESP8684 #include "esp8684/rom/spi_flash.h" -#endif #include "spiffs_api.h" diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index 894b23cf4f..dddc010e84 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -623,7 +623,6 @@ components/esp_rom/include/esp32/rom/miniz.h components/esp_rom/include/esp32/rom/rsa_pss.h components/esp_rom/include/esp32/rom/rtc.h components/esp_rom/include/esp32/rom/sha.h -components/esp_rom/include/esp32/rom/spi_flash.h components/esp_rom/include/esp32/rom/tbconsole.h components/esp_rom/include/esp32/rom/tjpgd.h components/esp_rom/include/esp32/rom/uart.h @@ -646,7 +645,6 @@ components/esp_rom/include/esp32c3/rom/rom_layout.h components/esp_rom/include/esp32c3/rom/rsa_pss.h components/esp_rom/include/esp32c3/rom/rtc.h components/esp_rom/include/esp32c3/rom/sha.h -components/esp_rom/include/esp32c3/rom/spi_flash.h components/esp_rom/include/esp32c3/rom/tjpgd.h components/esp_rom/include/esp32c3/rom/uart.h components/esp_rom/include/esp32h2/rom/aes.h @@ -668,7 +666,6 @@ components/esp_rom/include/esp32h2/rom/rom_layout.h components/esp_rom/include/esp32h2/rom/rsa_pss.h components/esp_rom/include/esp32h2/rom/rtc.h components/esp_rom/include/esp32h2/rom/sha.h -components/esp_rom/include/esp32h2/rom/spi_flash.h components/esp_rom/include/esp32h2/rom/tjpgd.h components/esp_rom/include/esp32h2/rom/uart.h components/esp_rom/include/esp32s2/rom/aes.h @@ -688,7 +685,6 @@ components/esp_rom/include/esp32s2/rom/opi_flash.h components/esp_rom/include/esp32s2/rom/rsa_pss.h components/esp_rom/include/esp32s2/rom/rtc.h components/esp_rom/include/esp32s2/rom/sha.h -components/esp_rom/include/esp32s2/rom/spi_flash.h components/esp_rom/include/esp32s2/rom/uart.h components/esp_rom/include/esp32s2/rom/usb/cdc_acm.h components/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h @@ -718,7 +714,6 @@ components/esp_rom/include/esp32s3/rom/opi_flash.h components/esp_rom/include/esp32s3/rom/rom_layout.h components/esp_rom/include/esp32s3/rom/rsa_pss.h components/esp_rom/include/esp32s3/rom/sha.h -components/esp_rom/include/esp32s3/rom/spi_flash.h components/esp_rom/include/esp32s3/rom/tjpgd.h components/esp_rom/include/esp32s3/rom/uart.h components/esp_rom/include/esp32s3/rom/usb/cdc_acm.h @@ -2047,15 +2042,6 @@ components/soc/include/soc/usb_periph.h components/soc/lldesc.c components/soc/soc_include_legacy_warn.c components/spi_flash/cache_utils.h -components/spi_flash/esp32/flash_ops_esp32.c -components/spi_flash/esp32/spi_flash_rom_patch.c -components/spi_flash/esp32c3/flash_ops_esp32c3.c -components/spi_flash/esp32c3/spi_flash_rom_patch.c -components/spi_flash/esp32h2/flash_ops_esp32h2.c -components/spi_flash/esp32h2/spi_flash_rom_patch.c -components/spi_flash/esp32s2/flash_ops_esp32s2.c -components/spi_flash/esp32s2/spi_flash_rom_patch.c -components/spi_flash/esp32s3/flash_ops_esp32s3.c components/spi_flash/include/esp_flash.h components/spi_flash/include/esp_flash_internal.h components/spi_flash/include/esp_flash_spi_init.h @@ -2073,7 +2059,6 @@ components/spi_flash/include/spi_flash_chip_mxic.h components/spi_flash/include/spi_flash_chip_winbond.h components/spi_flash/memspi_host_driver.c components/spi_flash/sim/SpiFlash.cpp -components/spi_flash/sim/SpiFlash.h components/spi_flash/sim/flash_mock.cpp components/spi_flash/sim/flash_mock_util.c components/spi_flash/sim/sdkconfig/sdkconfig.h @@ -2086,7 +2071,6 @@ components/spi_flash/spi_flash_chip_mxic_opi.c components/spi_flash/spi_flash_chip_winbond.c components/spi_flash/test/test_esp_flash.c components/spi_flash/test/test_flash_encryption.c -components/spi_flash/test/test_large_flash_writes.c components/spi_flash/test/test_mmap.c components/spi_flash/test/test_out_of_bounds_write.c components/spi_flash/test/test_partition_ext.c