kopia lustrzana https://github.com/espressif/esp-idf
bootloader: disconnect VRTC from SAR input in bootloader_random_disable
Bootloader enables SAR ADC in test mode to get some entropy for the RNG. The bits which control the ADC test mux were not disabled, which caused extra ~24uA current to be drawn from VRTC, increasing deep sleep current consumption. This change disables relevant test mode bits in bootloader_random_disable.pull/382/head
rodzic
1405fd1fef
commit
3b583c150f
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@ -135,4 +135,8 @@ void bootloader_random_disable(void)
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/* Reset i2s peripheral */
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SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
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CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
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/* Disable pull supply voltage to SAR ADC */
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CLEAR_PERI_REG_MASK(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_ENT_RTC);
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SET_PERI_REG_BITS(RTC_CNTL_TEST_MUX_REG, RTC_CNTL_DTEST_RTC, 0, RTC_CNTL_DTEST_RTC_S);
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}
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