refactor(esp32c5): change beta3 path in esp_rom

components/esp_rom/CMakeLists.txt

@@ -1,6 +1,15 @@
 idf_build_get_property(target IDF_TARGET)
 
-set(include_dirs "include" "include/${target}")
+# TODO: IDF-9197
+if(CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION)
+    set(target_folder "esp32c5/beta3/esp32c5")
+elseif(CONFIG_IDF_TARGET_ESP32C5_MP_VERSION)
+    set(target_folder "esp32c5/mp/esp32c5")
+else()
+    set(target_folder "${target}")
+endif()
+
+set(include_dirs "include" "include/${target_folder}")
 
 set(private_required_comp "")
 
@@ -12,7 +21,10 @@ if(target STREQUAL "linux")
                         "${target}/esp_rom_md5.c"
                         "${target}/esp_rom_efuse.c")
 else()
-    list(APPEND include_dirs "${target}")
+    list(APPEND include_dirs "${target_folder}")
+    if(CONFIG_IDF_TARGET_ESP32C5)
+        list(APPEND include_dirs "include/${target_folder}/..")
+    endif()
     list(APPEND sources "patches/esp_rom_crc.c"
                         "patches/esp_rom_sys.c"
                         "patches/esp_rom_uart.c"
@@ -67,7 +79,7 @@ set(ld_folder "ld")
 # Append a target linker script at the target-specific path,
 # only the 'name' part is different for each script
 function(rom_linker_script name)
-    target_linker_script(${COMPONENT_LIB} INTERFACE "${target}/${ld_folder}/${target}.rom.${name}.ld")
+    target_linker_script(${COMPONENT_LIB} INTERFACE "${target_folder}/${ld_folder}/${target}.rom.${name}.ld")
 endfunction()
 
 if(target STREQUAL "linux")
@@ -79,7 +91,7 @@ if(target STREQUAL "linux")
         target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-integer-overflow -Wno-shift-count-overflow)
     endif()
 else()
-    target_linker_script(${COMPONENT_LIB} INTERFACE "${target}/${ld_folder}/${target}.rom.ld")
+    target_linker_script(${COMPONENT_LIB} INTERFACE "${target_folder}/${ld_folder}/${target}.rom.ld")
     rom_linker_script("api")
 
     if(CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB)

components/esp_rom/esp32c5/Kconfig.soc_caps.in

@@ -1,80 +1,7 @@
-#####################################################
-# This file is auto-generated from SoC caps
-# using gen_soc_caps_kconfig.py, do not edit manually
-#####################################################
+if IDF_TARGET_ESP32C5_BETA3_VERSION
+    orsource "./beta3/esp32c5/Kconfig.soc_caps.in"
+endif
 
-config ESP_ROM_HAS_CRC_LE
-    bool
-    default y
-
-config ESP_ROM_HAS_CRC_BE
-    bool
-    default y
-
-config ESP_ROM_HAS_JPEG_DECODE
-    bool
-    default y
-
-config ESP_ROM_UART_CLK_IS_XTAL
-    bool
-    default y
-
-config ESP_ROM_USB_SERIAL_DEVICE_NUM
-    int
-    default 3
-
-config ESP_ROM_HAS_RETARGETABLE_LOCKING
-    bool
-    default y
-
-config ESP_ROM_GET_CLK_FREQ
-    bool
-    default y
-
-config ESP_ROM_HAS_RVFPLIB
-    bool
-    default y
-
-config ESP_ROM_HAS_HAL_WDT
-    bool
-    default y
-
-config ESP_ROM_HAS_HAL_SYSTIMER
-    bool
-    default y
-
-config ESP_ROM_HAS_HEAP_TLSF
-    bool
-    default y
-
-config ESP_ROM_TLSF_CHECK_PATCH
-    bool
-    default y
-
-config ESP_ROM_HAS_LAYOUT_TABLE
-    bool
-    default y
-
-config ESP_ROM_HAS_SPI_FLASH
-    bool
-    default y
-
-config ESP_ROM_WITHOUT_REGI2C
-    bool
-    default y
-
-config ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
-    bool
-    default y
-
-config ESP_ROM_WDT_INIT_PATCH
-    bool
-    default y
-
-config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
-    bool
-    default y
-
-config ESP_ROM_USB_OTG_NUM
-    int
-    default -1
+if IDF_TARGET_ESP32C5_MP_VERSION
+    orsource "./mp/esp32c5/Kconfig.soc_caps.in"
+endif

components/esp_rom/esp32c5/beta3/esp32c5/Kconfig.soc_caps.in

@@ -0,0 +1,80 @@
+#####################################################
+# This file is auto-generated from SoC caps
+# using gen_soc_caps_kconfig.py, do not edit manually
+#####################################################
+
+config ESP_ROM_HAS_CRC_LE
+    bool
+    default y
+
+config ESP_ROM_HAS_CRC_BE
+    bool
+    default y
+
+config ESP_ROM_HAS_JPEG_DECODE
+    bool
+    default y
+
+config ESP_ROM_UART_CLK_IS_XTAL
+    bool
+    default y
+
+config ESP_ROM_USB_SERIAL_DEVICE_NUM
+    int
+    default 3
+
+config ESP_ROM_HAS_RETARGETABLE_LOCKING
+    bool
+    default y
+
+config ESP_ROM_GET_CLK_FREQ
+    bool
+    default y
+
+config ESP_ROM_HAS_RVFPLIB
+    bool
+    default y
+
+config ESP_ROM_HAS_HAL_WDT
+    bool
+    default y
+
+config ESP_ROM_HAS_HAL_SYSTIMER
+    bool
+    default y
+
+config ESP_ROM_HAS_HEAP_TLSF
+    bool
+    default y
+
+config ESP_ROM_TLSF_CHECK_PATCH
+    bool
+    default y
+
+config ESP_ROM_HAS_LAYOUT_TABLE
+    bool
+    default y
+
+config ESP_ROM_HAS_SPI_FLASH
+    bool
+    default y
+
+config ESP_ROM_WITHOUT_REGI2C
+    bool
+    default y
+
+config ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT
+    bool
+    default y
+
+config ESP_ROM_WDT_INIT_PATCH
+    bool
+    default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
+
+config ESP_ROM_USB_OTG_NUM
+    int
+    default -1

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.heap.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.heap.ld for esp32c5
  *
  *

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.ld for esp32c5
  *
  *
@@ -575,4 +580,3 @@ slc_reattach = 0x40000c64;
 slc_send_to_host_chain = 0x40000c68;
 slc_set_host_io_max_window = 0x40000c6c;
 slc_to_host_chain_recycle = 0x40000c70;
-

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.libgcc.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.libgcc.ld for esp32c5
  *
  *
@@ -112,4 +117,3 @@ __umodsi3 = 0x400009d0;
 __unorddf2 = 0x400009d4;
 __extenddftf2 = 0x400009d8;
 __trunctfdf2 = 0x400009dc;
-

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.newlib-normal.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.newlib-normal.ld for esp32c5
  *
  *
@@ -34,4 +39,3 @@ vsnprintf = 0x40000614;
 vsniprintf = 0x40000618;
 sscanf = 0x4000061c;
 siscanf = 0x40000620;
-

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.newlib.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.newlib.ld for esp32c5
  *
  *
@@ -92,4 +97,3 @@ __swsetup_r = 0x400005cc;
 /* Data (.data, .bss, .rodata) */
 syscall_table_ptr = 0x4087ffd4;
 _global_impure_ptr = 0x4087ffd0;
-

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.rvfp.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.rvfp.ld for esp32c5
  *
  *

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.spiflash.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM function interface esp32c5.rom.spiflash.ld for esp32c5
  *
  *
@@ -158,4 +163,3 @@ spi_flash_encryption_hal_prepare = 0x40000380;
 spi_flash_encryption_hal_done = 0x40000384;
 spi_flash_encryption_hal_destroy = 0x40000388;
 spi_flash_encryption_hal_check = 0x4000038c;
-

components/esp_rom/esp32c5/beta3/esp32c5/ld/esp32c5.rom.version.ld

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 /* ROM version variables for esp32c5
  *
  * These addresses should be compatible with any ROM version for this chip.

components/esp_rom/include/esp32c5/beta3/esp32c5/rom/miniz.h

@@ -5,4 +5,4 @@
  */
 
 #warning "{target}/rom/miniz.h is deprecated, please use (#include "miniz.h") instead"
-#include "../../miniz.h"
+#include "../../../../miniz.h"

tools/ci/check_public_headers_exceptions.txt

@@ -100,7 +100,6 @@ components/esp_rom/include/esp32c2/rom/rtc.h
 components/esp_rom/include/esp32c6/rom/rtc.h
 components/esp_rom/include/esp32h2/rom/rtc.h
 components/esp_rom/include/esp32p4/rom/rtc.h
-components/esp_rom/include/esp32c5/rom/rtc.h
 components/esp_rom/include/esp32/rom/sha.h
 components/esp_rom/include/esp32/rom/secure_boot.h
 components/esp_rom/include/esp32c3/rom/spi_flash.h