kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/spi_concurrency_3.1' into 'release/v3.1'
spi_master: fix a possible concurrency issue See merge request idf/esp-idf!5188release/v3.1
commit
378a13ba18
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@ -539,6 +539,9 @@ static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
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/*------------ new transaction starts here ------------------*/
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//ToDo: This is a stupidly simple low-cs-first priority scheme. Make this configurable somehow. - JD
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//Disable interrupt before checking to avoid concurrency issue.
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esp_intr_disable(host->intr);
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for (i=0; i<NO_CS; i++) {
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if (host->device[i]) {
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r=xQueueReceiveFromISR(host->device[i]->trans_queue, &host->cur_trans_buf, &do_yield);
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@ -548,13 +551,14 @@ static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
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}
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}
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if (i==NO_CS) {
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//No packet waiting. Disable interrupt.
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esp_intr_disable(host->intr);
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#ifdef CONFIG_PM_ENABLE
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//Release APB frequency lock
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esp_pm_lock_release(host->pm_lock);
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#endif
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} else {
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//enable the interrupt again if there is packet to send
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esp_intr_enable(host->intr);
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host->hw->slave.trans_done=0; //clear int bit
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//We have a transaction. Send it.
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spi_device_t *dev=host->device[i];
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@ -415,12 +415,14 @@ static void IRAM_ATTR spi_intr(void *arg)
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}
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}
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//Disable interrupt before checking to avoid concurrency issue.
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esp_intr_disable(host->intr);
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//Grab next transaction
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r = xQueueReceiveFromISR(host->trans_queue, &trans, &do_yield);
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if (!r) {
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//No packet waiting. Disable interrupt.
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esp_intr_disable(host->intr);
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} else {
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if (r) {
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//enable the interrupt again if there is packet to send
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esp_intr_enable(host->intr);
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//We have a transaction. Send it.
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host->hw->slave.trans_done = 0; //clear int bit
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host->cur_trans = trans;
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