From 36b2737bb1d23adb89bbf2d9179cf545e9c150f4 Mon Sep 17 00:00:00 2001 From: Felipe Neves Date: Wed, 29 Jul 2020 15:04:47 -0300 Subject: [PATCH] freertos/xtensa: make vportYIELD_FROM_ISR compatible with version that both takes argument or not --- components/freertos/test/test_isr_latency.c | 4 +--- .../xtensa/include/freertos/portmacro.h | 14 +++++++---- components/freertos/xtensa/port.c | 24 +++++++++++++++++++ components/freertos/xtensa/portmacro_priv.h | 4 +--- 4 files changed, 35 insertions(+), 11 deletions(-) diff --git a/components/freertos/test/test_isr_latency.c b/components/freertos/test/test_isr_latency.c index 10c5d3069e..ab626633e6 100644 --- a/components/freertos/test/test_isr_latency.c +++ b/components/freertos/test/test_isr_latency.c @@ -29,9 +29,7 @@ static void software_isr(void *arg) { xt_set_intclear(1 << SW_ISR_LEVEL_1); xSemaphoreGiveFromISR(sync, &yield); - if(yield) { - portYIELD_FROM_ISR(); - } + portYIELD_FROM_ISR(yield); cycle_before_exit = portGET_RUN_TIME_COUNTER_VALUE(); } diff --git a/components/freertos/xtensa/include/freertos/portmacro.h b/components/freertos/xtensa/include/freertos/portmacro.h index 9c00fa16d9..bc58e75052 100644 --- a/components/freertos/xtensa/include/freertos/portmacro.h +++ b/components/freertos/xtensa/include/freertos/portmacro.h @@ -75,7 +75,7 @@ extern "C" { #include #include #include - +#include #include #include #include /* required for XSHAL_CLIB */ @@ -321,13 +321,17 @@ static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint #define portALT_GET_RUN_TIME_COUNTER_VALUE(x) x = (uint32_t)esp_timer_get_time() #endif - -/* Kernel utilities. */ void vPortYield( void ); +void xEvaluateYieldFromISR(int argc, ...); void _frxt_setup_switch( void ); -#define portYIELD() vPortYield() -#define portYIELD_FROM_ISR() {traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch();} +//Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with, +//or without arguments. +#define GET_ARGUMENT_COUNT(...) GET_ARGUMENT_COUNT_INNER(0, ##__VA_ARGS__,1,0) +#define GET_ARGUMENT_COUNT_INNER(zero, one, count, ...) count + +#define portYIELD() vPortYield() +#define portYIELD_FROM_ISR(...) xEvaluateYieldFromISR(GET_ARGUMENT_COUNT(__VA_ARGS__), ##__VA_ARGS__) /* Yielding within an API call (when interrupts are off), means the yield should be delayed until interrupts are re-enabled. diff --git a/components/freertos/xtensa/port.c b/components/freertos/xtensa/port.c index 62eb61fdf5..4dbb647284 100644 --- a/components/freertos/xtensa/port.c +++ b/components/freertos/xtensa/port.c @@ -387,6 +387,30 @@ BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void) return (port_interruptNesting[xPortGetCoreID()] != 0); } +void IRAM_ATTR xEvaluateYieldFromISR(int argc, ...) +{ + BaseType_t xYield; + va_list ap; + va_start(ap, argc); + + if(argc) { + xYield = (BaseType_t)va_arg(ap, int); + va_end(ap); + } else { + //Yield does not exist, it is a empty vPortYieldFromISR macro: + va_end(ap); + traceISR_EXIT_TO_SCHEDULER(); + _frxt_setup_switch(); + return; + } + + //Yield exists, so need evaluate it first then switch: + if(xYield) { + traceISR_EXIT_TO_SCHEDULER(); + _frxt_setup_switch(); + } +} + void vPortAssertIfInISR(void) { configASSERT(xPortInIsrContext()); diff --git a/components/freertos/xtensa/portmacro_priv.h b/components/freertos/xtensa/portmacro_priv.h index 9c6ad2a3e9..e75c1f6b87 100644 --- a/components/freertos/xtensa/portmacro_priv.h +++ b/components/freertos/xtensa/portmacro_priv.h @@ -75,6 +75,4 @@ #define portVALID_STACK_MEM(ptr) esp_ptr_byte_accessible(ptr) #else #define portVALID_STACK_MEM(ptr) (esp_ptr_internal(ptr) && esp_ptr_byte_accessible(ptr)) -#endif - - +#endif \ No newline at end of file