From 3625db723c8900b27491085f2a201e208f65637f Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 6 Jul 2023 10:33:39 +0800 Subject: [PATCH] doc(mm): added cache msync API direction related descriptions --- docs/en/api-reference/system/mm.rst | 5 +++++ docs/zh_CN/api-reference/system/mm.rst | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/docs/en/api-reference/system/mm.rst b/docs/en/api-reference/system/mm.rst index 39d0079e4d..63bfd17b95 100644 --- a/docs/en/api-reference/system/mm.rst +++ b/docs/en/api-reference/system/mm.rst @@ -153,6 +153,11 @@ SPI Flash can be accessed by SPI1 (ESP-IDF `esp_flash` driver APIs), or by point PSRAM can also be accessed by EDMA. Data desynchronisation may happen because hardware does not guarantee the data consistency under such condition. You should call :cpp:func:`esp_cache_msync` to synchronise the Cache and the PSRAM. + :cpp:func:`esp_cache_msync` has two synchronization directions, + + * c:macro:`ESP_CACHE_MSYNC_FLAG_DIR_C2M`: from cache to memory. By default (if you don't specify a direction), the synchronization is in this direction. Content in the address you specified will be written back to the memory. + * c:macro:`ESP_CACHE_MSYNC_FLAG_DIR_M2C`: from memory to cache. By default, content in the address you specified will be invalidated from the cache. + Thread Safety ============= diff --git a/docs/zh_CN/api-reference/system/mm.rst b/docs/zh_CN/api-reference/system/mm.rst index 8ff9ddeaa3..80cb019b42 100644 --- a/docs/zh_CN/api-reference/system/mm.rst +++ b/docs/zh_CN/api-reference/system/mm.rst @@ -1 +1 @@ -.. include:: /../en/api-reference/system/mm.rst +.. include:: ../../../en/api-reference/system/mm.rst